lpc: Reduce differences between lpc11xx and lpc43xx code.
This commit is contained in:
Gareth McMullin
parent
54eb3a719f
commit
cd5d569d38
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@ -195,14 +195,6 @@ static const char tdesc_cortex_mf[] =
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" </feature>"
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"</target>";
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#define REG_SP 13
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#define REG_LR 14
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#define REG_PC 15
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#define REG_XPSR 16
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#define REG_MSP 17
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#define REG_PSP 18
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#define REG_SPECIAL 19
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bool cortexm_probe(target *t)
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{
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t->driver = cortexm_driver_str;
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@ -143,6 +143,16 @@
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#define CORTEXM_DWT_FUNC_FUNC_WRITE (6 << 0)
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#define CORTEXM_DWT_FUNC_FUNC_ACCESS (7 << 0)
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#define REG_SP 13
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#define REG_LR 14
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#define REG_PC 15
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#define REG_XPSR 16
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#define REG_MSP 17
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#define REG_PSP 18
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#define REG_SPECIAL 19
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#define ARM_THUMB_BREAKPOINT 0xBE00
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bool cortexm_attach(target *t);
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void cortexm_detach(target *t);
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void cortexm_halt_resume(target *t, bool step);
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@ -0,0 +1,83 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2015 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __LPC_COMMON_H
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#define __LPC_COMMON_H
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#define IAP_CMD_INIT 49
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#define IAP_CMD_PREPARE 50
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#define IAP_CMD_PROGRAM 51
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#define IAP_CMD_ERASE 52
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#define IAP_CMD_BLANKCHECK 53
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#define IAP_CMD_SET_ACTIVE_BANK 60
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#define IAP_STATUS_CMD_SUCCESS 0
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#define IAP_STATUS_INVALID_COMMAND 1
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#define IAP_STATUS_SRC_ADDR_ERROR 2
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#define IAP_STATUS_DST_ADDR_ERROR 3
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#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4
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#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5
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#define IAP_STATUS_COUNT_ERROR 6
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#define IAP_STATUS_INVALID_SECTOR 7
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#define IAP_STATUS_SECTOR_NOT_BLANK 8
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#define IAP_STATUS_SECTOR_NOT_PREPARED 9
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#define IAP_STATUS_COMPARE_ERROR 10
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#define IAP_STATUS_BUSY 11
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/* CPU Frequency */
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#define CPU_CLK_KHZ 12000
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struct flash_param {
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uint16_t opcode;/* opcode to return to after calling the ROM */
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uint16_t pad0;
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uint32_t command;/* IAP command */
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union {
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uint32_t words[5];/* command parameters */
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t flash_bank;
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} prepare;
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t cpu_clk_khz;
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uint32_t flash_bank;
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} erase;
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struct {
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uint32_t dest;
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uint32_t source;
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uint32_t byte_count;
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uint32_t cpu_clk_khz;
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} program;
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t flash_bank;
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} blank_check;
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struct {
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uint32_t flash_bank;
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uint32_t cpu_clk_khz;
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} make_active;
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};
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uint32_t result[5]; /* result data */
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} __attribute__((aligned(4)));
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#endif
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@ -1,6 +1,9 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2011 Mike Smith <drziplok@me.com>
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* Copyright (C) 2015 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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@ -14,26 +17,15 @@
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "general.h"
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#include "adiv5.h"
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#include "target.h"
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#include "cortexm.h"
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#include "lpc_common.h"
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#define IAP_PGM_CHUNKSIZE 256 /* should fit in RAM on any device */
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struct flash_param {
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uint16_t opcodes[2]; /* two opcodes to return to after calling the ROM */
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uint32_t command[5]; /* command operands */
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uint32_t result[4]; /* result data */
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};
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struct flash_program {
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struct flash_param p;
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uint8_t data[IAP_PGM_CHUNKSIZE];
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};
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static struct flash_program flash_pgm;
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#define MSP 17 /* Main stack pointer register number */
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#define MIN_RAM_SIZE_FOR_LPC8xx 1024
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#define MIN_RAM_SIZE_FOR_LPC1xxx 2048
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#define RAM_USAGE_FOR_IAP_ROUTINES 32 /* IAP routines use 32 bytes at top of ram */
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@ -41,24 +33,6 @@ static struct flash_program flash_pgm;
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#define IAP_ENTRYPOINT 0x1fff1ff1
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#define IAP_RAM_BASE 0x10000000
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#define IAP_CMD_PREPARE 50
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#define IAP_CMD_PROGRAM 51
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#define IAP_CMD_ERASE 52
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#define IAP_CMD_BLANKCHECK 53
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#define IAP_STATUS_CMD_SUCCESS 0
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#define IAP_STATUS_INVALID_COMMAND 1
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#define IAP_STATUS_SRC_ADDR_ERROR 2
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#define IAP_STATUS_DST_ADDR_ERROR 3
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#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4
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#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5
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#define IAP_STATUS_COUNT_ERROR 6
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#define IAP_STATUS_INVALID_SECTOR 7
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#define IAP_STATUS_SECTOR_NOT_BLANK 8
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#define IAP_STATUS_SECTOR_NOT_PREPARED 9
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#define IAP_STATUS_COMPARE_ERROR 10
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#define IAP_STATUS_BUSY 11
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static const char lpc8xx_driver[] = "lpc8xx";
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static const char lpc11xx_driver[] = "lpc11xx";
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static void lpc11x_iap_call(target *t, struct flash_param *param, unsigned param_len);
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@ -67,6 +41,11 @@ static int lpc11xx_flash_erase(target *t, uint32_t addr, size_t len);
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static int lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src,
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size_t len);
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struct flash_program {
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struct flash_param p;
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uint8_t data[IAP_PGM_CHUNKSIZE];
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};
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/*
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* Note that this memory map is actually for the largest of the lpc11xx devices;
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* There seems to be no good way to decode the part number to determine the RAM
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@ -168,8 +147,8 @@ lpc11x_iap_call(target *t, struct flash_param *param, unsigned param_len)
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uint32_t regs[t->regs_size / sizeof(uint32_t)];
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/* fill out the remainder of the parameters and copy the structure to RAM */
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param->opcodes[0] = 0xbe00;
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param->opcodes[1] = 0x0000;
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param->opcode = ARM_THUMB_BREAKPOINT;
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param->pad0 = 0x0000;
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target_mem_write(t, IAP_RAM_BASE, param, param_len);
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/* set up for the call to the IAP ROM */
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@ -179,11 +158,11 @@ lpc11x_iap_call(target *t, struct flash_param *param, unsigned param_len)
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// stack pointer - top of the smallest ram less 32 for IAP usage
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if (t->driver == lpc8xx_driver)
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regs[MSP] = IAP_RAM_BASE + MIN_RAM_SIZE_FOR_LPC8xx - RAM_USAGE_FOR_IAP_ROUTINES;
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regs[REG_MSP] = IAP_RAM_BASE + MIN_RAM_SIZE_FOR_LPC8xx - RAM_USAGE_FOR_IAP_ROUTINES;
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else
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regs[MSP] = IAP_RAM_BASE + MIN_RAM_SIZE_FOR_LPC1xxx - RAM_USAGE_FOR_IAP_ROUTINES;
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regs[14] = IAP_RAM_BASE | 1;
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regs[15] = IAP_ENTRYPOINT;
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regs[REG_MSP] = IAP_RAM_BASE + MIN_RAM_SIZE_FOR_LPC1xxx - RAM_USAGE_FOR_IAP_ROUTINES;
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regs[REG_LR] = IAP_RAM_BASE | 1;
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regs[REG_PC] = IAP_ENTRYPOINT;
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target_regs_write(t, regs);
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/* start the target and wait for it to halt again */
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@ -205,11 +184,12 @@ static int flash_page_size(target *t)
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static int
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lpc11xx_flash_prepare(target *t, uint32_t addr, int len)
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{
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struct flash_program flash_pgm;
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/* prepare the sector(s) to be erased */
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memset(&flash_pgm.p, 0, sizeof(flash_pgm.p));
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flash_pgm.p.command[0] = IAP_CMD_PREPARE;
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flash_pgm.p.command[1] = addr / flash_page_size(t);
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flash_pgm.p.command[2] = (addr + len - 1) / flash_page_size(t);
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flash_pgm.p.command = IAP_CMD_PREPARE;
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flash_pgm.p.prepare.start_sector = addr / flash_page_size(t);
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flash_pgm.p.prepare.end_sector = (addr + len - 1) / flash_page_size(t);
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lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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@ -222,6 +202,7 @@ lpc11xx_flash_prepare(target *t, uint32_t addr, int len)
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static int
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lpc11xx_flash_erase(target *t, uint32_t addr, size_t len)
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{
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struct flash_program flash_pgm;
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if (addr % flash_page_size(t))
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return -1;
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@ -231,15 +212,18 @@ lpc11xx_flash_erase(target *t, uint32_t addr, size_t len)
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return -1;
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/* and now erase them */
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flash_pgm.p.command[0] = IAP_CMD_ERASE;
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flash_pgm.p.command[1] = addr / flash_page_size(t);
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flash_pgm.p.command[2] = (addr + len - 1) / flash_page_size(t);
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flash_pgm.p.command[3] = 12000; /* XXX safe to assume this? */
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flash_pgm.p.command = IAP_CMD_ERASE;
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flash_pgm.p.erase.start_sector = addr / flash_page_size(t);
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flash_pgm.p.erase.end_sector = (addr + len - 1) / flash_page_size(t);
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flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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}
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flash_pgm.p.command[0] = IAP_CMD_BLANKCHECK;
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/* check erase ok */
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flash_pgm.p.command = IAP_CMD_BLANKCHECK;
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lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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@ -255,6 +239,7 @@ lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len)
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unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
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unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE;
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unsigned chunk;
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struct flash_program flash_pgm;
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for (chunk = first_chunk; chunk <= last_chunk; chunk++) {
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@ -269,8 +254,8 @@ lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len)
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size_t copylen = IAP_PGM_CHUNKSIZE - chunk_offset;
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if (copylen > len)
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copylen = len;
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memcpy(&flash_pgm.data[chunk_offset], src, copylen);
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memcpy(flash_pgm.data + chunk_offset, src, copylen);
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/* if we are programming the vectors, calculate the magic number */
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if ((chunk == 0) && (chunk_offset == 0)) {
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if (copylen < 32) {
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@ -290,9 +275,7 @@ lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len)
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len -= copylen;
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src += copylen;
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chunk_offset = 0;
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} else {
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/* interior chunk, must be aligned and full-sized */
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memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE);
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len -= IAP_PGM_CHUNKSIZE;
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@ -304,12 +287,12 @@ lpc11xx_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len)
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return -1;
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/* set the destination address and program */
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flash_pgm.p.command[0] = IAP_CMD_PROGRAM;
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flash_pgm.p.command[1] = chunk * IAP_PGM_CHUNKSIZE;
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flash_pgm.p.command[2] = IAP_RAM_BASE + offsetof(struct flash_program, data);
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flash_pgm.p.command[3] = IAP_PGM_CHUNKSIZE;
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/* assuming we are running off IRC - safe lower bound */
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flash_pgm.p.command[4] = 12000; /* XXX safe to presume this? */
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flash_pgm.p.command = IAP_CMD_PROGRAM;
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flash_pgm.p.program.dest = chunk * IAP_PGM_CHUNKSIZE;
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flash_pgm.p.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data);
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flash_pgm.p.program.byte_count = IAP_PGM_CHUNKSIZE;
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flash_pgm.p.program.cpu_clk_khz = CPU_CLK_KHZ;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc11x_iap_call(t, &flash_pgm.p, sizeof(flash_pgm));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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144
src/lpc43xx.c
144
src/lpc43xx.c
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@ -1,7 +1,8 @@
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/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
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* Copyright (C) 2014 Allen Ibara <aibara>
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* Copyright (C) 2015 Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -19,17 +20,13 @@
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#include "general.h"
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#include "command.h"
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#include "adiv5.h"
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#include "target.h"
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#include "gdb_packet.h"
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#include "cortexm.h"
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#include "lpc_common.h"
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#define LPC43XX_CHIPID 0x40043200
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#define ARM_CPUID 0xE000ED00
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#define ARM_THUMB_BREAKPOINT 0xBE00
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#define R_MSP 17 // Main stack pointer register number
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#define R_PC 15 // Program counter register number
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#define R_LR 14 // Link register number
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#define IAP_ENTRYPOINT_LOCATION 0x10400100
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@ -47,25 +44,6 @@
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#define IAP_PGM_CHUNKSIZE 4096
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#define IAP_CMD_INIT 49
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#define IAP_CMD_PREPARE 50
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#define IAP_CMD_PROGRAM 51
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#define IAP_CMD_ERASE 52
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#define IAP_CMD_BLANKCHECK 53
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#define IAP_CMD_SET_ACTIVE_BANK 60
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#define IAP_STATUS_CMD_SUCCESS 0
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#define IAP_STATUS_INVALID_COMMAND 1
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#define IAP_STATUS_SRC_ADDR_ERROR 2
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#define IAP_STATUS_DST_ADDR_ERROR 3
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#define IAP_STATUS_SRC_ADDR_NOT_MAPPED 4
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#define IAP_STATUS_DST_ADDR_NOT_MAPPED 5
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#define IAP_STATUS_COUNT_ERROR 6
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#define IAP_STATUS_INVALID_SECTOR 7
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#define IAP_STATUS_SECTOR_NOT_BLANK 8
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#define IAP_STATUS_SECTOR_NOT_PREPARED 9
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#define IAP_STATUS_COMPARE_ERROR 10
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#define IAP_STATUS_BUSY 11
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#define FLASH_BANK_A_BASE 0x1A000000
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#define FLASH_BANK_A_SIZE 0x80000
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@ -75,45 +53,6 @@
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#define FLASH_NUM_SECTOR 15
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#define FLASH_LARGE_SECTOR_OFFSET 0x00010000
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/* CPU Frequency */
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#define CPU_CLK_KHZ 12000
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struct flash_param {
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uint16_t opcode; /* opcode to return to after calling the ROM */
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uint16_t pad0;
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uint32_t command; /* IAP command */
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union {
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uint32_t words[5]; /* command parameters */
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t flash_bank;
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} prepare;
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struct {
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t cpu_clk_khz;
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uint32_t flash_bank;
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} erase;
|
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struct {
|
||||
uint32_t dest;
|
||||
uint32_t source;
|
||||
uint32_t byte_count;
|
||||
uint32_t cpu_clk_khz;
|
||||
} program;
|
||||
struct {
|
||||
uint32_t start_sector;
|
||||
uint32_t end_sector;
|
||||
uint32_t flash_bank;
|
||||
} blank_check;
|
||||
struct {
|
||||
uint32_t flash_bank;
|
||||
uint32_t cpu_clk_khz;
|
||||
} make_active;
|
||||
} params;
|
||||
uint32_t result[5]; /* result data */
|
||||
} __attribute__((aligned(4)));
|
||||
|
||||
struct flash_program {
|
||||
struct flash_param p;
|
||||
uint8_t data[IAP_PGM_CHUNKSIZE];
|
||||
|
|
@ -242,9 +181,9 @@ static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[])
|
|||
for (bank = 0; bank < FLASH_NUM_BANK; bank++)
|
||||
{
|
||||
flash_pgm.p.command = IAP_CMD_PREPARE;
|
||||
flash_pgm.p.params.prepare.start_sector = 0;
|
||||
flash_pgm.p.params.prepare.end_sector = FLASH_NUM_SECTOR-1;
|
||||
flash_pgm.p.params.prepare.flash_bank = bank;
|
||||
flash_pgm.p.prepare.start_sector = 0;
|
||||
flash_pgm.p.prepare.end_sector = FLASH_NUM_SECTOR-1;
|
||||
flash_pgm.p.prepare.flash_bank = bank;
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
|
|
@ -252,10 +191,10 @@ static bool lpc43xx_cmd_erase(target *t, int argc, const char *argv[])
|
|||
}
|
||||
|
||||
flash_pgm.p.command = IAP_CMD_ERASE;
|
||||
flash_pgm.p.params.erase.start_sector = 0;
|
||||
flash_pgm.p.params.prepare.end_sector = FLASH_NUM_SECTOR-1;
|
||||
flash_pgm.p.params.erase.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.params.erase.flash_bank = bank;
|
||||
flash_pgm.p.erase.start_sector = 0;
|
||||
flash_pgm.p.prepare.end_sector = FLASH_NUM_SECTOR-1;
|
||||
flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.erase.flash_bank = bank;
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS)
|
||||
|
|
@ -343,8 +282,8 @@ static void lpc43xx_iap_call(target *t, struct flash_param *param, unsigned para
|
|||
target_mem_read(t, &iap_entry, IAP_ENTRYPOINT_LOCATION, sizeof(iap_entry));
|
||||
|
||||
/* fill out the remainder of the parameters and copy the structure to RAM */
|
||||
param->opcode = ARM_THUMB_BREAKPOINT; /* breakpoint */
|
||||
param->pad0 = 0x0000; /* pad */
|
||||
param->opcode = ARM_THUMB_BREAKPOINT;
|
||||
param->pad0 = 0x0000;
|
||||
target_mem_write(t, IAP_RAM_BASE, param, param_len);
|
||||
|
||||
/* set up for the call to the IAP ROM */
|
||||
|
|
@ -352,9 +291,9 @@ static void lpc43xx_iap_call(target *t, struct flash_param *param, unsigned para
|
|||
regs[0] = IAP_RAM_BASE + offsetof(struct flash_param, command);
|
||||
regs[1] = IAP_RAM_BASE + offsetof(struct flash_param, result);
|
||||
|
||||
regs[R_MSP] = IAP_RAM_BASE + IAP_RAM_SIZE;
|
||||
regs[R_LR] = IAP_RAM_BASE | 1;
|
||||
regs[R_PC] = iap_entry;
|
||||
regs[REG_MSP] = IAP_RAM_BASE + IAP_RAM_SIZE;
|
||||
regs[REG_LR] = IAP_RAM_BASE | 1;
|
||||
regs[REG_PC] = iap_entry;
|
||||
target_regs_write(t, regs);
|
||||
|
||||
/* start the target and wait for it to halt again */
|
||||
|
|
@ -370,11 +309,11 @@ static int lpc43xx_flash_prepare(target *t, uint32_t addr, int len)
|
|||
struct flash_program flash_pgm;
|
||||
|
||||
/* prepare the sector(s) to be erased */
|
||||
memset(&flash_pgm.p, 0, sizeof(flash_pgm.p));
|
||||
flash_pgm.p.command = IAP_CMD_PREPARE;
|
||||
flash_pgm.p.params.prepare.start_sector = sector_number(addr);
|
||||
flash_pgm.p.params.prepare.end_sector = sector_number(addr+len);
|
||||
flash_pgm.p.params.prepare.flash_bank = flash_bank(addr);
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
flash_pgm.p.prepare.start_sector = sector_number(addr);
|
||||
flash_pgm.p.prepare.end_sector = sector_number(addr+len);
|
||||
flash_pgm.p.prepare.flash_bank = flash_bank(addr);
|
||||
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
|
|
@ -402,10 +341,10 @@ static int lpc43xx_flash_erase(target *t, uint32_t addr, size_t len)
|
|||
|
||||
/* and now erase them */
|
||||
flash_pgm.p.command = IAP_CMD_ERASE;
|
||||
flash_pgm.p.params.erase.start_sector = sector_number(addr);
|
||||
flash_pgm.p.params.erase.end_sector = sector_number(addr+len);
|
||||
flash_pgm.p.params.erase.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.params.erase.flash_bank = flash_bank(addr);
|
||||
flash_pgm.p.erase.start_sector = sector_number(addr);
|
||||
flash_pgm.p.erase.end_sector = sector_number(addr+len);
|
||||
flash_pgm.p.erase.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.erase.flash_bank = flash_bank(addr);
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
|
|
@ -414,9 +353,9 @@ static int lpc43xx_flash_erase(target *t, uint32_t addr, size_t len)
|
|||
|
||||
/* check erase ok */
|
||||
flash_pgm.p.command = IAP_CMD_BLANKCHECK;
|
||||
flash_pgm.p.params.blank_check.start_sector = sector_number(addr);
|
||||
flash_pgm.p.params.blank_check.end_sector = sector_number(addr+len);
|
||||
flash_pgm.p.params.blank_check.flash_bank = flash_bank(addr);
|
||||
flash_pgm.p.blank_check.start_sector = sector_number(addr);
|
||||
flash_pgm.p.blank_check.end_sector = sector_number(addr+len);
|
||||
flash_pgm.p.blank_check.flash_bank = flash_bank(addr);
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm.p));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
|
|
@ -437,17 +376,13 @@ static int lpc43xx_flash_write(target *t,
|
|||
{
|
||||
unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE;
|
||||
unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
|
||||
unsigned chunk_offset;
|
||||
unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE;
|
||||
unsigned chunk;
|
||||
struct flash_program flash_pgm;
|
||||
|
||||
for (chunk = first_chunk; chunk <= last_chunk; chunk++) {
|
||||
if (chunk == first_chunk) {
|
||||
chunk_offset = dest % IAP_PGM_CHUNKSIZE;
|
||||
} else {
|
||||
chunk_offset = 0;
|
||||
}
|
||||
|
||||
DEBUG("chunk %u len %zu\n", chunk, len);
|
||||
/* first and last chunk may require special handling */
|
||||
if ((chunk == first_chunk) || (chunk == last_chunk)) {
|
||||
|
||||
|
|
@ -464,6 +399,7 @@ static int lpc43xx_flash_write(target *t,
|
|||
/* update to suit */
|
||||
len -= copylen;
|
||||
src += copylen;
|
||||
chunk_offset = 0;
|
||||
} else {
|
||||
/* interior chunk, must be aligned and full-sized */
|
||||
memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE);
|
||||
|
|
@ -472,21 +408,15 @@ static int lpc43xx_flash_write(target *t,
|
|||
}
|
||||
|
||||
/* prepare... */
|
||||
if (lpc43xx_flash_prepare(t, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE)) {
|
||||
if (lpc43xx_flash_prepare(t, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE))
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* copy buffer into target memory */
|
||||
target_mem_write(t,
|
||||
IAP_RAM_BASE + offsetof(struct flash_program, data),
|
||||
flash_pgm.data, sizeof(flash_pgm.data));
|
||||
|
||||
/* set the destination address and program */
|
||||
flash_pgm.p.command = IAP_CMD_PROGRAM;
|
||||
flash_pgm.p.params.program.dest = chunk * IAP_PGM_CHUNKSIZE;
|
||||
flash_pgm.p.params.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data);
|
||||
flash_pgm.p.params.program.byte_count = IAP_PGM_CHUNKSIZE;
|
||||
flash_pgm.p.params.program.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.program.dest = chunk * IAP_PGM_CHUNKSIZE;
|
||||
flash_pgm.p.program.source = IAP_RAM_BASE + offsetof(struct flash_program, data);
|
||||
flash_pgm.p.program.byte_count = IAP_PGM_CHUNKSIZE;
|
||||
flash_pgm.p.program.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
|
|
@ -524,8 +454,8 @@ static bool lpc43xx_cmd_mkboot(target *t, int argc, const char *argv[])
|
|||
|
||||
/* special command to compute/write magic vector for signature */
|
||||
flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK;
|
||||
flash_pgm.p.params.make_active.flash_bank = bank;
|
||||
flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.make_active.flash_bank = bank;
|
||||
flash_pgm.p.make_active.cpu_clk_khz = CPU_CLK_KHZ;
|
||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||
lpc43xx_iap_call(t, &flash_pgm.p, sizeof(flash_pgm));
|
||||
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue