Add STM32F03X and STM32F07X handling.
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@ -58,7 +58,9 @@ static int stm32f1_flash_write(struct target_s *target, uint32_t dest,
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static const char stm32f1_driver_str[] = "STM32, Medium density.";
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static const char stm32f1_driver_str[] = "STM32, Medium density.";
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static const char stm32hd_driver_str[] = "STM32, High density.";
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static const char stm32hd_driver_str[] = "STM32, High density.";
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static const char stm32f3_driver_str[] = "STM32F3xx";
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static const char stm32f3_driver_str[] = "STM32F3xx";
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static const char stm32f0_driver_str[] = "STM32F0xx";
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static const char stm32f03_driver_str[] = "STM32F03x";
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static const char stm32f05_driver_str[] = "STM32F05x";
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static const char stm32f07_driver_str[] = "STM32F07x";
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static const char stm32f1_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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static const char stm32f1_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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/* "<!DOCTYPE memory-map "
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/* "<!DOCTYPE memory-map "
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@ -190,8 +192,20 @@ bool stm32f1_probe(struct target_s *target)
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target->idcode = adiv5_ap_mem_read(adiv5_target_ap(target), DBGMCU_IDCODE_F0) & 0xfff;
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target->idcode = adiv5_ap_mem_read(adiv5_target_ap(target), DBGMCU_IDCODE_F0) & 0xfff;
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switch(target->idcode) {
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switch(target->idcode) {
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case 0x440: /* STM32F0 */
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case 0x444: /* STM32F03 */
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target->driver = stm32f0_driver_str;
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case 0x440: /* STM32F05 */
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case 0x448: /* STM32F07 */
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switch(target->idcode) {
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case 0x444: /* STM32F03 */
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target->driver = stm32f03_driver_str;
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break;
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case 0x440: /* STM32F05 */
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target->driver = stm32f05_driver_str;
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break;
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case 0x448: /* STM32F07 */
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target->driver = stm32f07_driver_str;
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break;
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}
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target->xml_mem_map = stm32f1_xml_memory_map;
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target->xml_mem_map = stm32f1_xml_memory_map;
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target->flash_erase = stm32md_flash_erase;
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target->flash_erase = stm32md_flash_erase;
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target->flash_write = stm32f1_flash_write;
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target->flash_write = stm32f1_flash_write;
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