pc-stlinkv2: Fix reg_read|write
- Fix wrong placed brace in cortexm_regs_write() - Start writing with r0 - With register read, save only registers listed
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@ -451,17 +451,18 @@ static void cortexm_regs_read(target *t, void *data)
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{
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uint32_t *regs = data;
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ADIv5_AP_t *ap = cortexm_ap(t);
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unsigned i;
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#if defined(STLINKV2)
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uint32_t base_regs[21];
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extern void stlink_regs_read(ADIv5_AP_t *ap, void *data);
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extern uint32_t stlink_reg_read(ADIv5_AP_t *ap, int idx);
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stlink_regs_read(ap, data);
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regs += sizeof(regnum_cortex_m);
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stlink_regs_read(ap, base_regs);
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for(i = 0; i < sizeof(regnum_cortex_m) / 4; i++)
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*regs++ = base_regs[regnum_cortex_m[i]];
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if (t->target_options & TOPT_FLAVOUR_V7MF)
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for(size_t t = 0; t < sizeof(regnum_cortex_mf) / 4; t++)
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*regs++ = stlink_reg_read(ap, regnum_cortex_mf[t]);
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#else
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unsigned i;
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/* FIXME: Describe what's really going on here */
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adiv5_ap_write(ap, ADIV5_AP_CSW, ap->csw | ADIV5_AP_CSW_SIZE_WORD);
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@ -494,15 +495,15 @@ static void cortexm_regs_write(target *t, const void *data)
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ADIv5_AP_t *ap = cortexm_ap(t);
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#if defined(STLINKV2)
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extern void stlink_reg_write(ADIv5_AP_t *ap, int num, uint32_t val);
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for(size_t z = 1; z < sizeof(regnum_cortex_m) / 4; z++) {
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for(size_t z = 0; z < sizeof(regnum_cortex_m) / 4; z++) {
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stlink_reg_write(ap, regnum_cortex_m[z], *regs);
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regs++;
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}
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if (t->target_options & TOPT_FLAVOUR_V7MF)
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for(size_t z = 0; z < sizeof(regnum_cortex_mf) / 4; z++) {
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stlink_reg_write(ap, regnum_cortex_mf[z], *regs);
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regs++;
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}
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}
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#else
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unsigned i;
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