Style clean up.
This commit is contained in:
parent
f06bc0fd79
commit
d7c30caa3e
239
src/lpc43xx.c
239
src/lpc43xx.c
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@ -18,6 +18,7 @@
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*/
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*/
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#include <stddef.h>
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#include <stddef.h>
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#include <stdlib.h>
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#include "command.h"
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#include "command.h"
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#include "general.h"
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#include "general.h"
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#include "adiv5.h"
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#include "adiv5.h"
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@ -73,11 +74,11 @@
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#define CPU_CLK_KHZ 12000
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#define CPU_CLK_KHZ 12000
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struct flash_param {
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struct flash_param {
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uint16_t opcode; /* opcode to return to after calling the ROM */
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uint16_t opcode; /* opcode to return to after calling the ROM */
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uint16_t pad0;
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uint16_t pad0;
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uint32_t command; /* IAP command */
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uint32_t command; /* IAP command */
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union {
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union {
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uint32_t words[5]; /* command parameters */
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uint32_t words[5]; /* command parameters */
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struct {
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struct {
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uint32_t start_sector;
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uint32_t start_sector;
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uint32_t end_sector;
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uint32_t end_sector;
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@ -105,11 +106,11 @@ struct flash_param {
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uint32_t cpu_clk_khz;
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uint32_t cpu_clk_khz;
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} make_active;
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} make_active;
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} params;
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} params;
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uint32_t result[5]; /* result data */
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uint32_t result[5]; /* result data */
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} __attribute__((aligned(4)));
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} __attribute__((aligned(4)));
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struct flash_program {
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struct flash_program {
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struct flash_param p;
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struct flash_param p;
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uint8_t data[IAP_PGM_CHUNKSIZE];
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uint8_t data[IAP_PGM_CHUNKSIZE];
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};
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};
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@ -117,10 +118,13 @@ static bool lpc43xx_cmd_erase(target *target, int argc, const char *argv[]);
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static bool lpc43xx_cmd_reset(target *target, int argc, const char *argv[]);
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static bool lpc43xx_cmd_reset(target *target, int argc, const char *argv[]);
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static bool lpc43xx_cmd_mkboot(target *target, int argc, const char *argv[]);
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static bool lpc43xx_cmd_mkboot(target *target, int argc, const char *argv[]);
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static int lpc43xx_flash_init(struct target_s *target);
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static int lpc43xx_flash_init(struct target_s *target);
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len);
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param,
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static int lpc43xx_flash_prepare(struct target_s *target, uint32_t addr, int len);
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unsigned param_len);
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static int lpc43xx_flash_prepare(struct target_s *target,
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uint32_t addr, int len);
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static int lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len);
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static int lpc43xx_flash_write(struct target_s *target,
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uint32_t dest, const uint8_t *src, int len);
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static void lpc43xx_set_internal_clock(struct target_s *target);
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static void lpc43xx_set_internal_clock(struct target_s *target);
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const struct command_s lpc43xx_cmd_list[] = {
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const struct command_s lpc43xx_cmd_list[] = {
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@ -163,47 +167,50 @@ bool lpc43xx_probe(struct target_s *target)
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cpuid = adiv5_ap_mem_read(adiv5_target_ap(target), ARM_CPUID);
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cpuid = adiv5_ap_mem_read(adiv5_target_ap(target), ARM_CPUID);
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switch(chipid) {
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switch(chipid) {
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case 0x4906002B: /* Parts with on-chip flash */
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case 0x4906002B: /* Parts with on-chip flash */
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switch (cpuid & 0xFF00FFF0) {
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switch (cpuid & 0xFF00FFF0) {
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case 0x4100C240:
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case 0x4100C240:
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target->driver = "LPC43xx Cortex-M4";
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target->driver = "LPC43xx Cortex-M4";
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if (cpuid == 0x410FC241)
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if (cpuid == 0x410FC241)
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{
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{
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/* LPC4337 */
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/* LPC4337 */
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target->xml_mem_map = lpc4337_xml_memory_map;
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target->xml_mem_map = lpc4337_xml_memory_map;
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target->flash_erase = lpc43xx_flash_erase;
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target->flash_erase = lpc43xx_flash_erase;
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target->flash_write = lpc43xx_flash_write;
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target->flash_write = lpc43xx_flash_write;
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target_add_commands(target, lpc43xx_cmd_list, "LPC43xx");
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target_add_commands(target, lpc43xx_cmd_list, "LPC43xx");
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}
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break;
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case 0x4100C200:
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target->driver = "LPC43xx Cortex-M0";
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break;
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default:
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target->driver = "LPC43xx <Unknown>";
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}
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}
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return true;
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break;
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case 0x5906002B: /* Flashless parts */
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case 0x4100C200:
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case 0x6906002B:
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target->driver = "LPC43xx Cortex-M0";
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switch (cpuid & 0xFF00FFF0) {
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break;
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case 0x4100C240:
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default:
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target->driver = "LPC43xx Cortex-M4";
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target->driver = "LPC43xx <Unknown>";
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break;
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}
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case 0x4100C200:
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return true;
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target->driver = "LPC43xx Cortex-M0";
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case 0x5906002B: /* Flashless parts */
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break;
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case 0x6906002B:
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default:
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switch (cpuid & 0xFF00FFF0) {
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target->driver = "LPC43xx <Unknown>";
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case 0x4100C240:
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}
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target->driver = "LPC43xx Cortex-M4";
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return true;
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break;
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case 0x4100C200:
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target->driver = "LPC43xx Cortex-M0";
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break;
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default:
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target->driver = "LPC43xx <Unknown>";
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}
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return true;
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}
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}
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return false;
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return false;
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}
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}
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/* Reset all major systems _except_ debug */
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/* Reset all major systems _except_ debug */
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static bool lpc43xx_cmd_reset(target *target, int __attribute__((unused)) argc, const char __attribute__((unused)) *argv[])
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static bool lpc43xx_cmd_reset(target *target, int argc, const char *argv[])
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{
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{
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(void)argc;
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(void)argv;
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/* Cortex-M4 Application Interrupt and Reset Control Register */
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/* Cortex-M4 Application Interrupt and Reset Control Register */
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static const uint32_t AIRCR = 0xE000ED0C;
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static const uint32_t AIRCR = 0xE000ED0C;
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/* Magic value key */
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/* Magic value key */
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return true;
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return true;
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}
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}
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static bool lpc43xx_cmd_erase(target *target, int __attribute__((unused)) argc, const char __attribute__((unused)) *argv[])
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static bool lpc43xx_cmd_erase(target *target, int argc, const char *argv[])
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{
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{
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(void)argc;
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(void)argv;
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uint32_t bank = 0;
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uint32_t bank = 0;
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struct flash_program flash_pgm;
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struct flash_program flash_pgm;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm.p));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS)
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS)
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{
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return -1;
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return -1;
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}
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return 0;
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return 0;
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}
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}
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*/
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*/
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static int32_t flash_bank(uint32_t addr)
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static int32_t flash_bank(uint32_t addr)
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{
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{
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int32_t retVal;
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if ((addr >= FLASH_BANK_A_BASE) &&
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(addr < (FLASH_BANK_A_BASE + FLASH_BANK_A_SIZE)))
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return 0;
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if ((addr >= FLASH_BANK_B_BASE) &&
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(addr < (FLASH_BANK_B_BASE + FLASH_BANK_B_SIZE)))
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return 1;
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if (addr >= FLASH_BANK_A_BASE && addr < (FLASH_BANK_A_BASE+FLASH_BANK_A_SIZE))
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return -1;
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{
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retVal = 0;
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}
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else if (addr >= FLASH_BANK_B_BASE && addr < (FLASH_BANK_B_BASE+FLASH_BANK_B_SIZE))
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{
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retVal = 1;
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}
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else
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{
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retVal = -1;
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}
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return retVal;
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}
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}
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/**
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/**
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*/
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*/
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static int32_t sector_number(uint32_t addr)
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static int32_t sector_number(uint32_t addr)
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{
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{
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int32_t retVal = 0;
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int32_t bank = flash_bank(addr);
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int32_t bank = flash_bank(addr);
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if (bank == 0)
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switch (bank) {
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{
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case 0:
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addr = addr - FLASH_BANK_A_BASE;
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addr = addr - FLASH_BANK_A_BASE;
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}
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break;
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else if (bank == 1)
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case 1:
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{
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addr = addr - FLASH_BANK_B_BASE;
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addr = addr - FLASH_BANK_B_BASE;
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}
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break;
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else
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default:
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{
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return -1;
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retVal = -1;
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}
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}
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if (retVal != -1)
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/* from 47.5 "Sector numbers" (page 1218) UM10503.pdf (Rev 1.6) */
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{
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if (addr < FLASH_LARGE_SECTOR_OFFSET) {
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/* from 47.5 "Sector numbers" (page 1218) UM10503.pdf (Rev 1.6) */
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return addr >> 13;
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if (addr < FLASH_LARGE_SECTOR_OFFSET)
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} else {
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{
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return 8 + ((addr - FLASH_LARGE_SECTOR_OFFSET) >> 16);
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retVal = addr >> 13;
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}
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else
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{
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retVal = 8 + ((addr - FLASH_LARGE_SECTOR_OFFSET) >> 16);
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}
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}
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}
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return retVal;
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}
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}
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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return 0;
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return 0;
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}
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}
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static int
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static int lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len)
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lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len)
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{
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{
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struct flash_program flash_pgm;
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struct flash_program flash_pgm;
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/* min block size */
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/* min block size */
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if (addr % 8192)
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if (addr % 8192)
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{
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return -1;
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return -1;
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}
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/* init */
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/* init */
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if (lpc43xx_flash_init(target))
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if (lpc43xx_flash_init(target))
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{
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return -1;
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return -1;
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}
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/* prepare... */
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/* prepare... */
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if (lpc43xx_flash_prepare(target, addr, len))
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if (lpc43xx_flash_prepare(target, addr, len))
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{
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return -1;
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return -1;
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}
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/* and now erase them */
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/* and now erase them */
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flash_pgm.p.command = IAP_CMD_ERASE;
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flash_pgm.p.command = IAP_CMD_ERASE;
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@ -437,7 +419,8 @@ static void lpc43xx_set_internal_clock(struct target_s *target)
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target_mem_write_words(target, 0x40050000 + 0x06C, &val2, sizeof(val2));
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target_mem_write_words(target, 0x40050000 + 0x06C, &val2, sizeof(val2));
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}
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}
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len)
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static int lpc43xx_flash_write(struct target_s *target,
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uint32_t dest, const uint8_t *src, int len)
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{
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{
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unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE;
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unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE;
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unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
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unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
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@ -445,14 +428,10 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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unsigned chunk;
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unsigned chunk;
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struct flash_program flash_pgm;
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struct flash_program flash_pgm;
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for (chunk = first_chunk; chunk <= last_chunk; chunk++)
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for (chunk = first_chunk; chunk <= last_chunk; chunk++) {
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{
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if (chunk == first_chunk) {
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if (chunk == first_chunk)
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{
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chunk_offset = dest % IAP_PGM_CHUNKSIZE;
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chunk_offset = dest % IAP_PGM_CHUNKSIZE;
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}
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} else {
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else
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{
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chunk_offset = 0;
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chunk_offset = 0;
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}
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}
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@ -473,7 +452,6 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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len -= copylen;
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len -= copylen;
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src += copylen;
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src += copylen;
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} else {
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} else {
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/* interior chunk, must be aligned and full-sized */
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/* interior chunk, must be aligned and full-sized */
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memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE);
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memcpy(flash_pgm.data, src, IAP_PGM_CHUNKSIZE);
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len -= IAP_PGM_CHUNKSIZE;
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len -= IAP_PGM_CHUNKSIZE;
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@ -481,8 +459,7 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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}
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}
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/* prepare... */
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/* prepare... */
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if (lpc43xx_flash_prepare(target, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE))
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if (lpc43xx_flash_prepare(target, chunk * IAP_PGM_CHUNKSIZE, IAP_PGM_CHUNKSIZE)) {
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{
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return -1;
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return -1;
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}
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}
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@ -507,7 +484,7 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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return 0;
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return 0;
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}
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}
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/*
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/*
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* Call Boot ROM code to make a flash bank bootable by computing and writing the
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* Call Boot ROM code to make a flash bank bootable by computing and writing the
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* correct signature into the exception table near the start of the bank.
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* correct signature into the exception table near the start of the bank.
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*
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*
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@ -517,41 +494,33 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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static bool lpc43xx_cmd_mkboot(target *target, int argc, const char *argv[])
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static bool lpc43xx_cmd_mkboot(target *target, int argc, const char *argv[])
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{
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{
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/* Usage: mkboot 0 or mkboot 1 */
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/* Usage: mkboot 0 or mkboot 1 */
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if (argc == 2)
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if (argc != 2) {
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{
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const long int bank = strtol(argv[1], NULL, 0);
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if (bank == 0 || bank == 1)
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{
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lpc43xx_flash_init(target);
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struct flash_program flash_pgm;
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/* special command to compute/write magic vector for signature */
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flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK;
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flash_pgm.p.params.make_active.flash_bank = bank;
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flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ;
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|
||||||
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
|
||||||
lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm));
|
|
||||||
if (flash_pgm.p.result[0] == IAP_STATUS_CMD_SUCCESS) {
|
|
||||||
gdb_outf("Set bootable OK.\n");
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
gdb_outf("Set bootable failed.\n");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
gdb_outf("Unexpected bank number, should be 0 or 1.\n");
|
|
||||||
}
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
|
||||||
gdb_outf("Expected bank argument 0 or 1.\n");
|
gdb_outf("Expected bank argument 0 or 1.\n");
|
||||||
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
const long int bank = strtol(argv[1], NULL, 0);
|
||||||
|
|
||||||
return false;
|
if ((bank != 0) && (bank != 1)) {
|
||||||
|
gdb_outf("Unexpected bank number, should be 0 or 1.\n");
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
lpc43xx_flash_init(target);
|
||||||
|
struct flash_program flash_pgm;
|
||||||
|
|
||||||
|
/* special command to compute/write magic vector for signature */
|
||||||
|
flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK;
|
||||||
|
flash_pgm.p.params.make_active.flash_bank = bank;
|
||||||
|
flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ;
|
||||||
|
flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
|
||||||
|
lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm));
|
||||||
|
if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
|
||||||
|
gdb_outf("Set bootable failed.\n");
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
gdb_outf("Set bootable OK.\n");
|
||||||
|
return true;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue