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swdptap: Refactored swdptap_seq_out and cleaned up

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dragonmux 2022-07-16 02:57:19 +01:00 committed by Piotr Esden-Tempski
parent 29baa2725c
commit da1038313f
1 changed files with 32 additions and 24 deletions
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56
src/platforms/common/swdptap.c
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@ -119,32 +119,40 @@ static bool swdptap_seq_in_parity(uint32_t *ret, size_t clock_cycles)
return parity & 1; return parity & 1;
} }
static void swdptap_seq_out(uint32_t tms_states, size_t ticks) static void swdptap_seq_out_swd_delay(uint32_t tms_states, size_t clock_cycles) __attribute__((optimize(3)));
static void swdptap_seq_out_swd_delay(const uint32_t tms_states, const size_t clock_cycles)
{
for (size_t cycle = 0; cycle < clock_cycles;) {
++cycle;
gpio_set(SWCLK_PORT, SWCLK_PIN);
for (volatile int32_t cnt = swd_delay_cnt - 2; cnt > 0; cnt--)
continue;
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & (1 << cycle));
gpio_clear(SWCLK_PORT, SWCLK_PIN);
for (volatile int32_t cnt = swd_delay_cnt - 2; cnt > 0; cnt--)
continue;
}
}
static void swdptap_seq_out_no_delay(uint32_t tms_states, size_t clock_cycles) __attribute__((optimize(3)));
static void swdptap_seq_out_no_delay(const uint32_t tms_states, const size_t clock_cycles)
{
for (size_t cycle = 0; cycle < clock_cycles;) {
++cycle;
gpio_set(SWCLK_PORT, SWCLK_PIN);
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & (1 << cycle));
gpio_clear(SWCLK_PORT, SWCLK_PIN);
}
}
static void swdptap_seq_out(const uint32_t tms_states, const size_t clock_cycles)
{ {
#ifdef DEBUG_SWD_BITS
for (int i = 0; i < ticks; i++)
DEBUG("%d", (tms_states & (1 << i)) ? 1 : 0);
#endif
register volatile int32_t cnt;
swdptap_turnaround(SWDIO_STATUS_DRIVE); swdptap_turnaround(SWDIO_STATUS_DRIVE);
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1); gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1U);
if (swd_delay_cnt) { if (swd_delay_cnt)
while (ticks--) { swdptap_seq_out_swd_delay(tms_states, clock_cycles);
gpio_set(SWCLK_PORT, SWCLK_PIN); else
for(cnt = swd_delay_cnt; --cnt > 0;); swdptap_seq_out_no_delay(tms_states, clock_cycles);
tms_states >>= 1;
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1);
gpio_clear(SWCLK_PORT, SWCLK_PIN);
for(cnt = swd_delay_cnt; --cnt > 0;);
}
} else {
while (ticks--) {
gpio_set(SWCLK_PORT, SWCLK_PIN);
tms_states >>= 1;
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & 1);
gpio_clear(SWCLK_PORT, SWCLK_PIN);
}
}
} }
static void swdptap_seq_out_parity(uint32_t tms_states, size_t ticks) static void swdptap_seq_out_parity(uint32_t tms_states, size_t ticks)