Merge pull request #129 from gsmcmullin/srst_cleanup

Cleanup of SRST handling.
This commit is contained in:
Gareth McMullin 2016-04-19 13:20:36 -07:00
commit da10f8a6bc
21 changed files with 70 additions and 62 deletions

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@ -50,8 +50,6 @@ int adiv5_swdp_scan(void)
ADIv5_DP_t *dp = (void*)calloc(1, sizeof(*dp));
swdptap_init();
if(connect_assert_srst)
jtagtap_srst(true); /* will be deasserted after attach */
/* Read the SW-DP IDCODE register to syncronise */
/* This could be done with adiv_swdp_low_access(), but this doesn't
* allow the ack to be checked here. */

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@ -68,6 +68,7 @@ const struct command_s cmd_list[] = {
{NULL, NULL, NULL}
};
static bool connect_assert_srst;
int command_process(target *t, char *cmd)
{
@ -151,6 +152,9 @@ static bool cmd_jtag_scan(target *t, int argc, char **argv)
irlens[argc-1] = 0;
}
if(connect_assert_srst)
platform_srst_set_val(true); /* will be deasserted after attach */
int devs = -1;
volatile struct exception e;
TRY_CATCH (e, EXCEPTION_ALL) {
@ -165,14 +169,11 @@ static bool cmd_jtag_scan(target *t, int argc, char **argv)
break;
}
if(devs < 0) {
if(devs <= 0) {
platform_srst_set_val(false);
gdb_out("JTAG device scan failed!\n");
return false;
}
if(devs == 0) {
gdb_out("JTAG scan found no devices!\n");
return false;
}
gdb_outf("Device IR Len IDCODE Description\n");
for(int i = 0; i < jtag_dev_count; i++)
gdb_outf("%d\t%d\t0x%08lX %s\n", i,
@ -187,6 +188,9 @@ bool cmd_swdp_scan(void)
{
gdb_outf("Target voltage: %s\n", platform_target_voltage());
if(connect_assert_srst)
platform_srst_set_val(true); /* will be deasserted after attach */
int devs = -1;
volatile struct exception e;
TRY_CATCH (e, EXCEPTION_ALL) {
@ -201,7 +205,8 @@ bool cmd_swdp_scan(void)
break;
}
if(devs < 0) {
if(devs <= 0) {
platform_srst_set_val(false);
gdb_out("SW-DP scan failed!\n");
return false;
}

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@ -27,8 +27,6 @@
*/
#include "general.h"
#include "exception.h"
#include "jtagtap.h"
#include "jtag_scan.h"
#include "adiv5.h"
#include "target.h"
#include "command.h"
@ -273,7 +271,7 @@ bool cortexm_attach(target *t)
target_halt_request(t);
tries = 10;
while(!connect_assert_srst && !target_halt_wait(t) && --tries)
while(!platform_srst_get_val() && !target_halt_wait(t) && --tries)
platform_delay(2);
if(!tries)
return false;
@ -318,8 +316,7 @@ bool cortexm_attach(target *t)
t->clear_hw_wp = cortexm_clear_hw_wp;
t->check_hw_wp = cortexm_check_hw_wp;
if(connect_assert_srst)
jtagtap_srst(false);
platform_srst_set_val(false);
return true;
}
@ -426,8 +423,8 @@ static void cortexm_pc_write(target *t, const uint32_t val)
static void cortexm_reset(target *t)
{
if ((t->target_options & CORTEXM_TOPT_INHIBIT_SRST) == 0) {
jtagtap_srst(true);
jtagtap_srst(false);
platform_srst_set_val(true);
platform_srst_set_val(false);
}
/* Read DHCSR here to clear S_RESET_ST bit before reset */

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@ -27,8 +27,6 @@ int jtagtap_init(void);
void jtagtap_reset(void);
void jtagtap_srst(bool assert);
uint8_t jtagtap_next(const uint8_t TMS, const uint8_t TDI);
/* tap_next executes one state transision in the JTAG TAP state machine:
* - Ensure TCK is low

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@ -36,6 +36,7 @@ void platform_timeout_set(uint32_t ms);
bool platform_timeout_is_expired(void);
void platform_delay(uint32_t delay);
void platform_srst_set_val(bool assert);
bool platform_srst_get_val(void);
bool platform_target_get_power(void);
void platform_target_set_power(bool power);
void platform_request_boot(void);

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@ -206,7 +206,6 @@ struct target_command_s {
};
extern target *target_list;
extern bool connect_assert_srst;
target *target_new(unsigned size);
void target_list_free(void);

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@ -105,8 +105,6 @@ int jtag_scan(const uint8_t *irlens)
*/
DEBUG("Resetting TAP\n");
jtagtap_init();
if(connect_assert_srst)
jtagtap_srst(true); /* will be deasserted after attach */
jtagtap_reset();
if (irlens) {

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@ -78,6 +78,9 @@ void platform_init(void)
cdcacm_init();
}
void platform_srst_set_val(bool assert) { (void)assert; }
bool platform_srst_get_val(void) { return false; }
const char *platform_target_voltage(void)
{
return "ABSENT!";

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@ -78,6 +78,9 @@ void platform_init(void)
cdcacm_init();
}
void platform_srst_set_val(bool assert) { (void)assert; }
bool platform_srst_get_val(void) { return false; }
const char *platform_target_voltage(void)
{
return "ABSENT!";

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@ -85,6 +85,22 @@ platform_init(void)
0xff, 0xff);
}
void platform_srst_set_val(bool assert)
{
volatile int i;
if (assert) {
gpio_clear(SRST_PORT, SRST_PIN);
for(i = 0; i < 10000; i++) asm("nop");
} else {
gpio_set(SRST_PORT, SRST_PIN);
}
}
bool platform_srst_get_val(void)
{
return gpio_get(SRST_PORT, SRST_PIN) == 0;
}
void platform_timeout_set(uint32_t ms)
{
timeout_counter = ms / 10;

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@ -67,15 +67,6 @@ void jtagtap_reset(void)
jtagtap_soft_reset();
}
void jtagtap_srst(bool assert)
{
(void)assert;
platform_buffer_flush();
//ftdi_write_data(ftdic, "\x80\x88\xAB", 3);
//usleep(1000);
//ftdi_write_data(ftdic, "\x80\xA8\xAB", 3);
}
#ifndef PROVIDE_GENERIC_TAP_TMS_SEQ
void
jtagtap_tms_seq(uint32_t MS, int ticks)

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@ -229,6 +229,14 @@ void platform_init(int argc, char **argv)
assert(gdb_if_init() == 0);
}
void platform_srst_set_val(bool assert)
{
(void)assert;
platform_buffer_flush();
}
bool platform_srst_get_val(void) { return false; }
void platform_buffer_flush(void)
{
assert(ftdi_write_data(ftdic, outbuf, bufptr) == bufptr);

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@ -164,6 +164,18 @@ void platform_srst_set_val(bool assert)
} else {
gpio_set_val(SRST_PORT, SRST_PIN, !assert);
}
if (assert) {
for(int i = 0; i < 10000; i++) asm("nop");
}
}
bool platform_srst_get_val(void)
{
if (platform_hwversion() == 0) {
return gpio_get(SRST_PORT, SRST_SENSE_PIN) == 0;
} else {
return gpio_get(SRST_PORT, SRST_PIN) == 0;
}
}
bool platform_target_get_power(void)

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@ -80,6 +80,7 @@
#define PWR_BR_PIN GPIO1
#define SRST_PORT GPIOA
#define SRST_PIN GPIO2
#define SRST_SENSE_PIN GPIO7
#define USB_PU_PORT GPIOA
#define USB_PU_PIN GPIO8
@ -111,9 +112,6 @@
gpio_set_mode(USBUSART_PORT, GPIO_MODE_OUTPUT_2_MHZ, \
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, USBUSART_TX_PIN);
#define SRST_SET_VAL(x) \
platform_srst_set_val(x)
#define USB_DRIVER stm32f103_usb_driver
#define USB_IRQ NVIC_USB_LP_CAN_RX0_IRQ
#define USB_ISR usb_lp_can_rx0_isr

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@ -118,6 +118,13 @@ void platform_srst_set_val(bool assert)
gpio_set(SRST_PORT, pin);
}
bool platform_srst_get_val()
{
uint16_t pin;
pin = platform_hwversion() == 0 ? SRST_PIN_V1 : SRST_PIN_V2;
return gpio_get(SRST_PORT, pin) == 0;
}
const char *platform_target_voltage(void)
{
return "unknown";

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@ -98,9 +98,6 @@
gpio_set_mode(USBUSART_PORT, GPIO_MODE_OUTPUT_2_MHZ, \
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, USBUSART_TX_PIN);
#define SRST_SET_VAL(x) \
platform_srst_set_val(x)
#define USB_DRIVER stm32f103_usb_driver
#define USB_IRQ NVIC_USB_LP_CAN_RX0_IRQ
#define USB_ISR usb_lp_can_rx0_isr

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@ -50,19 +50,6 @@ void jtagtap_reset(void)
jtagtap_soft_reset();
}
void jtagtap_srst(bool assert)
{
(void)assert;
#ifdef SRST_SET_VAL
SRST_SET_VAL(assert);
if(assert) {
int i;
for(i = 0; i < 10000; i++)
asm volatile("nop");
}
#endif
}
inline uint8_t jtagtap_next(uint8_t dTMS, uint8_t dTDO)
{
uint16_t ret;

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@ -84,6 +84,9 @@ void platform_init(void)
usbuart_init();
}
void platform_srst_set_val(bool assert) { (void)assert; }
bool platform_srst_get_val(void) { return false; }
const char *platform_target_voltage(void)
{
return "unknown";

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@ -25,18 +25,6 @@ jtagtap_reset(void)
jtagtap_soft_reset();
}
void
jtagtap_srst(bool assert)
{
volatile int i;
if (assert) {
gpio_clear(SRST_PORT, SRST_PIN);
for(i = 0; i < 10000; i++) asm("nop");
} else {
gpio_set(SRST_PORT, SRST_PIN);
}
}
uint8_t
jtagtap_next(const uint8_t dTMS, const uint8_t dTDO)
{

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@ -426,7 +426,7 @@ bool samd_probe(target *t)
target_add_commands(t, samd_cmd_list, "SAMD");
/* If we're not in reset here */
if (!connect_assert_srst) {
if (!platform_srst_get_val()) {
/* We'll have to release the target from
* extended reset to make attach possible */
if (target_mem_read32(t, SAMD_DSU_CTRLSTAT) &

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@ -22,7 +22,6 @@
#include "target.h"
target *target_list = NULL;
bool connect_assert_srst;
target *target_new(unsigned size)
{