jtagtap: Implemented jtagtap_cycle for running extra clock cycles on the bus when needed
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@ -49,6 +49,7 @@ typedef struct jtag_proc_s {
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*/
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void (*jtagtap_tdi_tdo_seq)(uint8_t *data_out, const bool final_tms, const uint8_t *data_in, size_t clock_cycles);
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void (*jtagtap_tdi_seq)(const bool final_tms, const uint8_t *data_in, size_t clock_cycles);
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void (*jtagtap_cycle)(const bool tms, const bool tdi, const size_t clock_cycles);
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} jtag_proc_t;
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extern jtag_proc_t jtag_proc;
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@ -33,6 +33,7 @@ static void jtagtap_tms_seq(uint32_t tms_states, size_t ticks);
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static void jtagtap_tdi_tdo_seq(uint8_t *data_out, bool final_tms, const uint8_t *data_in, size_t ticks);
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static void jtagtap_tdi_seq(bool final_tms, const uint8_t *data_in, size_t ticks);
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static bool jtagtap_next(bool tms, bool tdi);
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static void jtagtap_cycle(bool tms, bool tdi, size_t clock_cycles);
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int jtagtap_init()
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{
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@ -43,6 +44,7 @@ int jtagtap_init()
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jtag_proc.jtagtap_tms_seq = jtagtap_tms_seq;
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jtag_proc.jtagtap_tdi_tdo_seq = jtagtap_tdi_tdo_seq;
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jtag_proc.jtagtap_tdi_seq = jtagtap_tdi_seq;
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jtag_proc.jtagtap_cycle = jtagtap_cycle;
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/* Go to JTAG mode for SWJ-DP */
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for (size_t i = 0; i <= 50U; ++i)
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@ -66,25 +68,36 @@ static void jtagtap_reset(void)
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jtagtap_soft_reset();
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}
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static bool jtagtap_next(const bool tms, const bool tdi)
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static bool jtagtap_next_swd_delay()
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{
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register volatile int32_t cnt;
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gpio_set_val(TMS_PORT, TMS_PIN, tms);
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gpio_set_val(TDI_PORT, TDI_PIN, tdi);
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gpio_set(TCK_PORT, TCK_PIN);
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for (cnt = swd_delay_cnt - 2U; cnt > 0; cnt--)
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for (volatile int32_t cnt = swd_delay_cnt - 2U; cnt > 0; cnt--)
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continue;
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const uint16_t result = gpio_get(TDO_PORT, TDO_PIN);
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gpio_clear(TCK_PORT, TCK_PIN);
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for (cnt = swd_delay_cnt - 2U; cnt > 0; cnt--)
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for (volatile int32_t cnt = swd_delay_cnt - 2U; cnt > 0; cnt--)
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continue;
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//DEBUG("jtagtap_next(TMS = %u, TDI = %u) = %u\n", tms, tdi, result);
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return result != 0;
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}
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static bool jtagtap_next_no_delay()
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{
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gpio_set(TCK_PORT, TCK_PIN);
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const uint16_t result = gpio_get(TDO_PORT, TDO_PIN);
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gpio_clear(TCK_PORT, TCK_PIN);
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return result != 0;
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}
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static bool jtagtap_next(const bool tms, const bool tdi)
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{
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gpio_set_val(TMS_PORT, TMS_PIN, tms);
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gpio_set_val(TDI_PORT, TDI_PIN, tdi);
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if (swd_delay_cnt)
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return jtagtap_next_swd_delay();
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else // NOLINT(readability-else-after-return)
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return jtagtap_next_no_delay();
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}
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static void jtagtap_tms_seq_swd_delay(uint32_t tms_states, size_t ticks)
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{
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while (ticks) {
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@ -182,6 +195,7 @@ static void jtagtap_tdi_tdo_seq_no_delay(const uint8_t *const data_in, uint8_t *
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static void jtagtap_tdi_tdo_seq(uint8_t *const data_out, const bool final_tms, const uint8_t *const data_in, size_t ticks)
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{
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gpio_clear(TMS_PORT, TMS_PIN);
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gpio_clear(TDI_PORT, TDI_PIN);
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if (swd_delay_cnt)
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jtagtap_tdi_tdo_seq_swd_delay(data_in, data_out, final_tms, ticks);
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@ -235,8 +249,39 @@ static void jtagtap_tdi_seq_no_delay(const uint8_t *const data_in, const bool fi
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static void jtagtap_tdi_seq(const bool final_tms, const uint8_t *const data_in, const size_t ticks)
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{
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gpio_clear(TMS_PORT, TMS_PIN);
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if (swd_delay_cnt)
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jtagtap_tdi_seq_swd_delay(data_in, final_tms, ticks);
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else
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jtagtap_tdi_seq_no_delay(data_in, final_tms, ticks);
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}
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static void jtagtap_cycle_swd_delay(const size_t clock_cycles)
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{
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for (size_t cycle = 0; cycle < clock_cycles; ++cycle) {
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gpio_set(TCK_PORT, TCK_PIN);
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for (volatile int32_t cnt = swd_delay_cnt - 2; cnt > 0; cnt--)
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continue;
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gpio_clear(TCK_PORT, TCK_PIN);
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for (volatile int32_t cnt = swd_delay_cnt - 2; cnt > 0; cnt--)
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continue;
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}
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}
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static void jtagtap_cycle_no_delay(const size_t clock_cycles)
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{
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for (size_t cycle = 0; cycle < clock_cycles; ++cycle) {
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gpio_set(TCK_PORT, TCK_PIN);
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gpio_set(TCK_PORT, TCK_PIN);
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gpio_clear(TCK_PORT, TCK_PIN);
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}
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}
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static void jtagtap_cycle(const bool tms, const bool tdi, const size_t clock_cycles)
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{
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jtagtap_next(tms, tdi);
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if (swd_delay_cnt)
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jtagtap_cycle_swd_delay(clock_cycles - 1);
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else
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jtagtap_cycle_no_delay(clock_cycles - 1);
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}
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