cortexa: Catch and report faults on address translation.
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@ -83,6 +83,7 @@ struct cortexa_priv {
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unsigned hw_breakpoint_max;
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unsigned hw_breakpoint[16];
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uint32_t bpc0;
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bool mmu_fault;
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};
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/* This may be specific to Cortex-A9 */
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@ -213,10 +214,13 @@ static uint32_t apb_read(target *t, uint16_t reg)
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static uint32_t va_to_pa(target *t, uint32_t va)
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{
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struct cortexa_priv *priv = t->priv;
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write_gpreg(t, 0, va);
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apb_write(t, DBGITR, MCR | ATS1CPR);
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apb_write(t, DBGITR, MRC | PAR);
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uint32_t par = read_gpreg(t, 0);
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if (par & 1)
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priv->mmu_fault = true;
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uint32_t pa = (par & ~0xfff) | (va & 0xfff);
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DEBUG("%s: VA = 0x%08X, PAR = 0x%08X, PA = 0x%08X\n", __func__, va, par, pa);
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return pa;
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@ -249,8 +253,11 @@ static void cortexa_mem_write(target *t, uint32_t dest, const void *src, size_t
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static bool cortexa_check_error(target *t)
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{
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ADIv5_AP_t *ahb = ((struct cortexa_priv*)t->priv)->ahb;
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return adiv5_dp_error(ahb->dp) != 0;
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struct cortexa_priv *priv = t->priv;
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ADIv5_AP_t *ahb = priv->ahb;
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bool err = (adiv5_dp_error(ahb->dp) != 0) || priv->mmu_fault;
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priv->mmu_fault = false;
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return err;
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}
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