Merge pull request #32 from aibara/lpc43xx_updates
Lpc43xx target support updates
This commit is contained in:
commit
eb2f2afa9a
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@ -131,7 +131,7 @@ void arm7tdmi_jtag_handler(jtag_dev_t *dev)
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t->mem_write_words = (void *)do_nothing;
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t->mem_write_words = (void *)do_nothing;
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t->mem_read_bytes = (void *)do_nothing;
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t->mem_read_bytes = (void *)do_nothing;
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t->mem_write_bytes = (void *)do_nothing;
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t->mem_write_bytes = (void *)do_nothing;
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t->regs_size = 16 * 4;
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t->regs_size = 16 * sizeof(uint32_t);
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t->regs_read = (void *)arm7_regs_read;
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t->regs_read = (void *)arm7_regs_read;
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t->regs_write = (void *)arm7_regs_write;
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t->regs_write = (void *)arm7_regs_write;
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t->pc_write = (void *)do_nothing;
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t->pc_write = (void *)do_nothing;
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@ -116,7 +116,7 @@ lpc11xx_probe(struct target_s *target)
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static void
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static void
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lpc11x_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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lpc11x_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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{
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{
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uint32_t regs[target->regs_size / 4];
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uint32_t regs[target->regs_size / sizeof(uint32_t)];
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/* fill out the remainder of the parameters and copy the structure to RAM */
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/* fill out the remainder of the parameters and copy the structure to RAM */
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param->opcodes[0] = 0xbe00;
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param->opcodes[0] = 0xbe00;
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112
src/lpc43xx.c
112
src/lpc43xx.c
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@ -106,22 +106,27 @@ struct flash_param {
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} make_active;
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} make_active;
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} params;
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} params;
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uint32_t result[5]; /* result data */
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uint32_t result[5]; /* result data */
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};
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} __attribute__((aligned(4)));
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struct flash_program {
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struct flash_program {
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struct flash_param p;
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struct flash_param p;
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uint8_t data[IAP_PGM_CHUNKSIZE];
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uint8_t data[IAP_PGM_CHUNKSIZE];
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};
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};
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static bool lpc43xx_cmd_erase(target *t);
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static bool lpc43xx_cmd_erase(target *target, int argc, const char *argv[]);
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static bool lpc43xx_cmd_reset(target *target, int argc, const char *argv[]);
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static bool lpc43xx_cmd_mkboot(target *target, int argc, const char *argv[]);
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static int lpc43xx_flash_init(struct target_s *target);
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static int lpc43xx_flash_init(struct target_s *target);
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len);
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len);
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static int lpc43xx_flash_prepare(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_prepare(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len);
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len);
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static void lpc43xx_set_internal_clock(struct target_s *target);
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const struct command_s lpc43xx_cmd_list[] = {
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const struct command_s lpc43xx_cmd_list[] = {
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{"erase_mass", (cmd_handler)lpc43xx_cmd_erase, "Erase entire flash memory"},
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{"erase_mass", lpc43xx_cmd_erase, "Erase entire flash memory"},
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{"reset", lpc43xx_cmd_reset, "Reset target"},
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{"mkboot", lpc43xx_cmd_mkboot, "Make flash bank bootable"},
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{NULL, NULL, NULL}
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{NULL, NULL, NULL}
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};
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};
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@ -196,7 +201,21 @@ bool lpc43xx_probe(struct target_s *target)
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return false;
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return false;
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}
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}
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static bool lpc43xx_cmd_erase(target *target)
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/* Reset all major systems _except_ debug */
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static bool lpc43xx_cmd_reset(target *target, int __attribute__((unused)) argc, const char __attribute__((unused)) *argv[])
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{
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/* Cortex-M4 Application Interrupt and Reset Control Register */
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static const uint32_t AIRCR = 0xE000ED0C;
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/* Magic value key */
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static const uint32_t reset_val = 0x05FA0004;
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/* System reset on target */
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target_mem_write_words(target, AIRCR, &reset_val, sizeof(reset_val));
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return true;
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}
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static bool lpc43xx_cmd_erase(target *target, int __attribute__((unused)) argc, const char __attribute__((unused)) *argv[])
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{
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{
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uint32_t bank = 0;
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uint32_t bank = 0;
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struct flash_program flash_pgm;
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struct flash_program flash_pgm;
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@ -237,6 +256,9 @@ static int lpc43xx_flash_init(struct target_s *target)
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{
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{
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struct flash_program flash_pgm;
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struct flash_program flash_pgm;
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/* Force internal clock */
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lpc43xx_set_internal_clock(target);
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/* Initialize flash IAP */
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/* Initialize flash IAP */
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flash_pgm.p.command = IAP_CMD_INIT;
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flash_pgm.p.command = IAP_CMD_INIT;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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@ -313,7 +335,7 @@ static int32_t sector_number(uint32_t addr)
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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static void lpc43xx_iap_call(struct target_s *target, struct flash_param *param, unsigned param_len)
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{
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{
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uint32_t regs[target->regs_size / 4];
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uint32_t regs[target->regs_size / sizeof(uint32_t)];
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uint32_t iap_entry;
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uint32_t iap_entry;
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target_mem_read_words(target, &iap_entry, IAP_ENTRYPOINT_LOCATION, sizeof(iap_entry));
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target_mem_read_words(target, &iap_entry, IAP_ENTRYPOINT_LOCATION, sizeof(iap_entry));
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@ -409,16 +431,30 @@ lpc43xx_flash_erase(struct target_s *target, uint32_t addr, int len)
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return 0;
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return 0;
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}
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}
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static void lpc43xx_set_internal_clock(struct target_s *target)
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{
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const uint32_t val2 = (1 << 11) | (1 << 24);
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target_mem_write_words(target, 0x40050000 + 0x06C, &val2, sizeof(val2));
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}
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len)
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static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uint8_t *src, int len)
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{
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{
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unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE;
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unsigned first_chunk = dest / IAP_PGM_CHUNKSIZE;
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unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
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unsigned last_chunk = (dest + len - 1) / IAP_PGM_CHUNKSIZE;
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unsigned chunk_offset = dest % IAP_PGM_CHUNKSIZE;
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unsigned chunk_offset;
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unsigned chunk;
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unsigned chunk;
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struct flash_program flash_pgm;
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struct flash_program flash_pgm;
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for (chunk = first_chunk; chunk <= last_chunk; chunk++)
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for (chunk = first_chunk; chunk <= last_chunk; chunk++)
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{
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{
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if (chunk == first_chunk)
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{
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chunk_offset = dest % IAP_PGM_CHUNKSIZE;
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}
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else
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{
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chunk_offset = 0;
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}
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/* first and last chunk may require special handling */
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/* first and last chunk may require special handling */
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if ((chunk == first_chunk) || (chunk == last_chunk)) {
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if ((chunk == first_chunk) || (chunk == last_chunk)) {
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@ -436,7 +472,6 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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/* update to suit */
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/* update to suit */
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len -= copylen;
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len -= copylen;
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src += copylen;
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src += copylen;
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chunk_offset = 0;
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} else {
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} else {
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/* interior chunk, must be aligned and full-sized */
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/* interior chunk, must be aligned and full-sized */
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@ -467,21 +502,56 @@ static int lpc43xx_flash_write(struct target_s *target, uint32_t dest, const uin
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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return -1;
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}
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}
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/* special command to compute/write magic vector for signature */
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if (chunk == first_chunk)
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{
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flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK;
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flash_pgm.p.params.make_active.flash_bank = flash_bank(dest);
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flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm));
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if (flash_pgm.p.result[0] != IAP_STATUS_CMD_SUCCESS) {
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return -1;
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}
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}
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}
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}
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return 0;
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return 0;
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}
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}
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/*
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* Call Boot ROM code to make a flash bank bootable by computing and writing the
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* correct signature into the exception table near the start of the bank.
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*
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* This is done indepently of writing to give the user a chance to verify flash
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* before changing it.
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*/
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static bool lpc43xx_cmd_mkboot(target *target, int argc, const char *argv[])
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{
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/* Usage: mkboot 0 or mkboot 1 */
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if (argc == 2)
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{
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const long int bank = strtol(argv[1], NULL, 0);
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if (bank == 0 || bank == 1)
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{
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lpc43xx_flash_init(target);
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struct flash_program flash_pgm;
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/* special command to compute/write magic vector for signature */
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flash_pgm.p.command = IAP_CMD_SET_ACTIVE_BANK;
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flash_pgm.p.params.make_active.flash_bank = bank;
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flash_pgm.p.params.make_active.cpu_clk_khz = CPU_CLK_KHZ;
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flash_pgm.p.result[0] = IAP_STATUS_CMD_SUCCESS;
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lpc43xx_iap_call(target, &flash_pgm.p, sizeof(flash_pgm));
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if (flash_pgm.p.result[0] == IAP_STATUS_CMD_SUCCESS) {
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gdb_outf("Set bootable OK.\n");
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return true;
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}
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else
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{
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gdb_outf("Set bootable failed.\n");
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}
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}
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else
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{
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gdb_outf("Unexpected bank number, should be 0 or 1.\n");
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}
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}
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else
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{
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gdb_outf("Expected bank argument 0 or 1.\n");
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}
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return false;
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}
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