stm32g0: Refactored out the cleanup step for the flash routines

This commit is contained in:
dragonmux 2022-08-09 21:54:04 +01:00 committed by Piotr Esden-Tempski
parent de909d96f0
commit f554fbd831
1 changed files with 23 additions and 21 deletions

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@ -329,24 +329,33 @@ static bool stm32g0_wait_busy(target *const t)
return true; return true;
} }
static void stm32g0_flash_op_finish(target *t)
{
target_mem_write32(t, FLASH_SR, FLASH_SR_EOP); // Clear EOP
stm32g0_flash_lock(t);
}
/* /*
* Flash erasure function. * Flash erasure function.
* OTP case: this function clears any previous error and returns. * OTP case: this function clears any previous error and returns.
*/ */
static int stm32g0_flash_erase(target_flash_s *f, target_addr addr, size_t len) static int stm32g0_flash_erase(target_flash_s *f, target_addr addr, size_t len)
{ {
target *t = f->t; target *const t = f->t;
int ret = 0;
/* Wait for Flash ready */ /* Wait for Flash ready */
if (!stm32g0_wait_busy(t)) if (!stm32g0_wait_busy(t)) {
goto exit_error; stm32g0_flash_op_finish(t);
return -1;
}
/* Clear any previous programming error */ /* Clear any previous programming error */
target_mem_write32(t, FLASH_SR, target_mem_read32(t, FLASH_SR)); target_mem_write32(t, FLASH_SR, target_mem_read32(t, FLASH_SR));
if (addr >= FLASH_OTP_START) if (addr >= FLASH_OTP_START) {
goto exit_cleanup; stm32g0_flash_op_finish(t);
return 0;
}
const size_t pages_to_erase = ((len - 1U) / f->blocksize) + 1U; const size_t pages_to_erase = ((len - 1U) / f->blocksize) + 1U;
size_t bank1_end_page = FLASH_BANK2_START_PAGE - 1U; size_t bank1_end_page = FLASH_BANK2_START_PAGE - 1U;
@ -370,24 +379,18 @@ static int stm32g0_flash_erase(target_flash_s *f, target_addr addr, size_t len)
ctrl |= FLASH_CR_START; ctrl |= FLASH_CR_START;
target_mem_write32(t, FLASH_CR, ctrl); target_mem_write32(t, FLASH_CR, ctrl);
if (!stm32g0_wait_busy(t)) if (!stm32g0_wait_busy(t)) {
goto exit_error; stm32g0_flash_op_finish(t);
return -1;
}
} }
/* Check for error */ /* Check for error */
const uint32_t status = target_mem_read32(t, FLASH_SR); const uint32_t status = target_mem_read32(t, FLASH_SR);
if (status & FLASH_SR_ERROR_MASK) { if (status & FLASH_SR_ERROR_MASK)
DEBUG_WARN("stm32g0 flash erase error: sr 0x%" PRIx32 "\n", status); DEBUG_WARN("stm32g0 flash erase error: sr 0x%" PRIx32 "\n", status);
goto exit_error; stm32g0_flash_op_finish(t);
} return (status & FLASH_SR_ERROR_MASK) ? -1 : 0;
goto exit_cleanup;
exit_error:
ret = -1;
exit_cleanup:
target_mem_write32(t, FLASH_SR, FLASH_SR_EOP); // Clear EOP
stm32g0_flash_lock(t);
return ret;
} }
/* /*
@ -437,10 +440,9 @@ static int stm32g0_flash_write(target_flash_s *f, target_addr dest, const void *
exit_error: exit_error:
ret = -1; ret = -1;
exit_cleanup: exit_cleanup:
target_mem_write32(t, FLASH_SR, (uint32_t)FLASH_SR_EOP); // Clear EOP
/* Clear PG: half-word access not to clear unwanted bits */ /* Clear PG: half-word access not to clear unwanted bits */
target_mem_write16(t, FLASH_CR, (uint16_t)0x0); target_mem_write16(t, FLASH_CR, (uint16_t)0x0);
stm32g0_flash_lock(t); stm32g0_flash_op_finish(t);
return ret; return ret;
} }