Fix compiling for native probe
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e4421799ba
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f880734050
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@ -661,8 +661,8 @@ void adiv5_dp_init(ADIv5_DP_t *dp)
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return;
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}
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DEBUG_INFO("DPIDR 0x%08" PRIx32 " (v%d %srev%d)\n", dp->idcode,
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(dp->idcode >> 12) & 0xf,
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(dp->idcode & 0x10000) ? "MINDP " : "", dp->idcode >> 28);
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(uint8_t)((dp->idcode >> 12) & 0xf),
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(dp->idcode & 0x10000) ? "MINDP " : "", (uint16_t)(dp->idcode >> 28));
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volatile uint32_t ctrlstat = 0;
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#if PC_HOSTED == 1
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platform_adiv5_dp_defaults(dp);
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@ -327,7 +327,7 @@ bool cortexm_probe(ADIv5_AP_t *ap)
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break;
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default:
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if (ap->ap_designer != AP_DESIGNER_ATMEL) /* Protected Atmel device?*/{
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DEBUG_WARN("Unexpected CortexM CPUID partno %04x\n", cpuid_partno);
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DEBUG_WARN("Unexpected CortexM CPUID partno %04" PRIx32 "\n", cpuid_partno);
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}
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}
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DEBUG_INFO("CPUID 0x%08" PRIx32 " (%s var %" PRIx32 " rev %" PRIx32 ")\n",
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@ -131,14 +131,14 @@ static bool rp_rom_call(target *t, uint32_t *regs, uint32_t cmd,
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target_halt_resume(t, false);
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if (!timeout)
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return false;
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DEBUG_INFO("Call cmd %04x\n", cmd);
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DEBUG_INFO("Call cmd %04" PRIx32 "\n", cmd);
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platform_timeout to;
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platform_timeout_set(&to, timeout);
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do {
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if (timeout > 400)
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tc_printf(t, "\b%c", spinner[spinindex++ % 4]);
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if (platform_timeout_is_expired(&to)) {
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DEBUG_WARN("RP Run timout %d ms reached: ", timeout);
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DEBUG_WARN("RP Run timout %d ms reached: ", (int)timeout);
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break;
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}
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} while (!target_halt_poll(t, NULL));
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@ -146,7 +146,7 @@ static bool rp_rom_call(target *t, uint32_t *regs, uint32_t cmd,
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target_regs_read(t, dbg_regs);
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bool ret = ((dbg_regs[REG_PC] &~1) != (ps->_debug_trampoline_end & ~1));
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if (ret) {
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DEBUG_WARN("rp_rom_call cmd %04x failed, PC %08" PRIx32 "\n",
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DEBUG_WARN("rp_rom_call cmd %04" PRIx32 " failed, PC %08" PRIx32 "\n",
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cmd, dbg_regs[REG_PC]);
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}
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return ret;
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@ -181,7 +181,7 @@ static int rp_flash_erase(struct target_flash *f, target_addr addr,
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DEBUG_WARN("Unaligned len\n");
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len = (len + 0xfff) & ~0xfff;
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}
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DEBUG_INFO("Erase addr %08" PRIx32 " len 0x%" PRIx32 "\n", addr, len);
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DEBUG_INFO("Erase addr %08" PRIx32 " len 0x%" PRIx32 "\n", addr, (uint32_t)len);
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target *t = f->t;
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rp_flash_prepare(t);
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struct rp_priv_s *ps = (struct rp_priv_s*)t->target_storage;
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@ -236,7 +236,7 @@ static int rp_flash_erase(struct target_flash *f, target_addr addr,
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int rp_flash_write(struct target_flash *f,
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target_addr dest, const void *src, size_t len)
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{
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DEBUG_INFO("RP Write %08" PRIx32 " len 0x%" PRIx32 "\n", dest, len);
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DEBUG_INFO("RP Write %08" PRIx32 " len 0x%" PRIx32 "\n", dest, (uint32_t)len);
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if ((dest & 0xff) || (len & 0xff)) {
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DEBUG_WARN("Unaligned erase\n");
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return -1;
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