adiv5_swdp: Starting point to handle multi-drop
- RP2040 show both DPs - Multidrop test with STM32L552 and STM32H745 allows selection with "-m 0x4500041" (H7), "-m 1" (L552) or "-m 0x01002927" (RP2040)
This commit is contained in:
Uwe Bonnes
parent
be3bfc48a8
commit
fa561c8d66
src/target
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@ -707,13 +707,6 @@ void adiv5_dp_init(ADIv5_DP_t *dp)
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}
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}
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if ((dp->idcode & ADIV5_DP_VERSION_MASK) == ADIV5_DPv2) {
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/* Read TargetID. Can be done with device in WFI, sleep or reset!*/
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adiv5_dp_write(dp, ADIV5_DP_SELECT, ADIV5_DP_BANK2);
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dp->targetid = adiv5_dp_read(dp, ADIV5_DP_CTRLSTAT);
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adiv5_dp_write(dp, ADIV5_DP_SELECT, ADIV5_DP_BANK0);
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DEBUG_INFO("TARGETID %08" PRIx32 "\n", dp->targetid);
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}
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/* Probe for APs on this DP */
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uint32_t last_base = 0;
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int void_aps = 0;
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@ -27,18 +27,20 @@
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#define ADIV5_DP_REG(x) (x)
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#define ADIV5_AP_REG(x) (ADIV5_APnDP | (x))
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#define ADIV5_DP_BANK0 0x00
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#define ADIV5_DP_BANK1 0x10
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#define ADIV5_DP_BANK2 0x20
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#define ADIV5_DP_BANK3 0x30
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#define ADIV5_DP_BANK4 0x40
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/* ADIv5 DP Register addresses */
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#define ADIV5_DP_IDCODE ADIV5_DP_REG(0x0)
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#define ADIV5_DP_ABORT ADIV5_DP_REG(0x0)
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#define ADIV5_DP_CTRLSTAT ADIV5_DP_REG(0x4)
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#define ADIV5_DP_TARGETID (ADIV5_DP_BANK2 | ADIV5_DP_REG(0x4))
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#define ADIV5_DP_SELECT ADIV5_DP_REG(0x8)
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#define ADIV5_DP_RDBUFF ADIV5_DP_REG(0xC)
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#define ADIV5_DP_BANK0 0
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#define ADIV5_DP_BANK1 1
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#define ADIV5_DP_BANK2 2
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#define ADIV5_DP_BANK3 3
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#define ADIV5_DP_BANK4 4
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#define ADIV5_DP_TARGETSEL ADIV5_DP_REG(0xC)
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#define ADIV5_DP_VERSION_MASK 0xf000
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#define ADIV5_DPv1 0x1000
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@ -49,10 +49,51 @@ static unsigned int make_packet_request(uint8_t RnW, uint16_t addr)
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return request;
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}
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/* Provide bare DP access functions without timeout and exception */
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static void dp_line_reset(void)
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{
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 32);
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swd_proc.swdptap_seq_out(0x0FFFFFFF, 32);
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}
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static void dp_write(uint16_t addr, const uint32_t data)
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{
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int bank = (addr >> 4) & 0xf;
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unsigned int request;
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if (bank)
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dp_write(ADIV5_DP_SELECT, bank);
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request = make_packet_request(ADIV5_LOW_WRITE, addr & 0xf);
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swd_proc.swdptap_seq_out(request, 8);
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swd_proc.swdptap_seq_in(3);
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swd_proc.swdptap_seq_out_parity(data, 32);
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if (bank)
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dp_write(ADIV5_DP_SELECT, 0);
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}
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static bool dp_read(uint16_t addr, uint32_t *res)
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{
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int bank = (addr >> 4) & 0xf;
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unsigned int request;
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if (bank)
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dp_write(ADIV5_DP_SELECT, bank);
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request = make_packet_request(ADIV5_LOW_READ, addr & 0xf);
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swd_proc.swdptap_seq_out(request, 8);
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swd_proc.swdptap_seq_in(3);
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if (swd_proc.swdptap_seq_in_parity(res, 32)) {
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return true;
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}
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if (bank)
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dp_write(ADIV5_DP_SELECT, 0);
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return false;
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}
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/* Try first the dormant to SWD procedure.
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* If target id given, scan DPs 0 .. 15 on that device and return.
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* Otherwise
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*/
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int adiv5_swdp_scan(uint32_t targetid)
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{
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uint32_t ack;
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(void) targetid;
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target_list_free();
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#if PC_HOSTED == 1
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if (platform_swdptap_init()) {
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@ -64,41 +105,83 @@ int adiv5_swdp_scan(uint32_t targetid)
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}
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#endif
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/* Switch from JTAG to SWD mode */
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 16);
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/* DORMANT-> SWD sequence*/
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 32);
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 18);
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swd_proc.swdptap_seq_out(0xE79E, 16); /* 0b0111100111100111 */
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 32);
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 18);
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swd_proc.swdptap_seq_out(0, 16);
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/* Read the SW-DP IDCODE register to syncronise */
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/* This could be done with adiv_swdp_low_access(), but this doesn't
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* allow the ack to be checked here. */
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uint32_t request = make_packet_request(ADIV5_LOW_READ, ADIV5_DP_IDCODE);
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swd_proc.swdptap_seq_out(request, 8);
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ack = swd_proc.swdptap_seq_in(3);
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uint32_t idcode;
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if((ack != SWDP_ACK_OK) || swd_proc.swdptap_seq_in_parity(&idcode, 32)) {
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DEBUG_WARN("Read SW-DP IDCODE failed %1" PRIx32 "\n", ack);
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return -1;
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/* 128 bit selection alert sequence for SW-DP-V2 */
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swd_proc.swdptap_seq_out(0x6209f392, 32);
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swd_proc.swdptap_seq_out(0x86852d95, 32);
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swd_proc.swdptap_seq_out(0xe3ddafe9, 32);
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swd_proc.swdptap_seq_out(0x19bc0ea2, 32);
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/* 4 cycle low,
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* 0x1a Arm CoreSight SW-DP activation sequence
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* 20 bits start of reset another reset sequence*/
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swd_proc.swdptap_seq_out(0x1a0, 12);
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uint32_t idcode = 0;
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uint32_t target_id;
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bool is_v2 = true;
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if (!targetid) {
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/* Try to read ID */
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dp_line_reset();
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bool res = dp_read(ADIV5_DP_IDCODE, &idcode);
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if (res) {
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is_v2 = false;
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DEBUG_WARN("Trying old JTAG to SWD sequence\n");
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 32);
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swd_proc.swdptap_seq_out(0xFFFFFFFF, 32);
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swd_proc.swdptap_seq_out(0xE79E, 16); /* 0b0111100111100111 */
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dp_line_reset();
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bool res = dp_read(ADIV5_DP_IDCODE, &idcode);
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if (res) {
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DEBUG_WARN("No usable DP found\n");
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return -1;
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}
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}
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if ((idcode & ADIV5_DP_VERSION_MASK) == ADIV5_DPv2) {
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is_v2 = true;
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bool res = dp_read(ADIV5_DP_TARGETID, &target_id);
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if (res) {
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DEBUG_WARN("Read Targetid failed\n");
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return -1;
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}
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} else {
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is_v2 = false;
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}
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} else {
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target_id = targetid;
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}
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int nr_dps = (is_v2) ? 16: 1;
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uint32_t dp_targetid;
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for (int i = 0; i < nr_dps; i++) {
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if (is_v2) {
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dp_line_reset();
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dp_targetid = (i << 28) | (target_id & 0x0fffffff);
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dp_write(ADIV5_DP_TARGETSEL, dp_targetid);
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bool res = dp_read(ADIV5_DP_IDCODE, &idcode);
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if (res)
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continue;
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if (dp_targetid == 0xf1002927) /* Fixme: Handle RP2040 rescue port */
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continue;
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DEBUG_WARN("DP %2d IDCODE %08" PRIx32 " TID 0x%08" PRIx32 "\n", i, idcode, dp_targetid);
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} else {
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dp_targetid = 0;
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}
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ADIv5_DP_t *dp = (void*)calloc(1, sizeof(*dp));
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if (!dp) { /* calloc failed: heap exhaustion */
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DEBUG_WARN("calloc: failed in %s\n", __func__);
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continue;
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}
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dp->idcode = idcode;
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dp->targetid = dp_targetid;
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dp->dp_read = firmware_swdp_read;
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dp->error = firmware_swdp_error;
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dp->low_access = firmware_swdp_low_access;
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dp->abort = firmware_swdp_abort;
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firmware_swdp_error(dp);
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adiv5_dp_init(dp);
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ADIv5_DP_t *dp = (void*)calloc(1, sizeof(*dp));
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if (!dp) { /* calloc failed: heap exhaustion */
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DEBUG_WARN("calloc: failed in %s\n", __func__);
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return -1;
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}
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dp->idcode = idcode;
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dp->dp_read = firmware_swdp_read;
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dp->error = firmware_swdp_error;
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dp->low_access = firmware_swdp_low_access;
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dp->abort = firmware_swdp_abort;
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firmware_swdp_error(dp);
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adiv5_dp_init(dp);
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return target_list?1:0;
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}
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@ -117,6 +200,15 @@ uint32_t firmware_swdp_read(ADIv5_DP_t *dp, uint16_t addr)
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{
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uint32_t err, clr = 0;
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if ((dp->idcode & ADIV5_DP_VERSION_MASK) == ADIV5_DPv2) {
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/* On protocoll error target gets deselected.
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* With DP Change, another target needs selection.
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* => Reselect with right target! */
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dp_line_reset();
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dp_write(ADIV5_DP_TARGETSEL, dp->targetid);
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uint32_t dummy;
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dp_read(ADIV5_DP_IDCODE, &dummy);
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}
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err = firmware_swdp_read(dp, ADIV5_DP_CTRLSTAT) &
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(ADIV5_DP_CTRLSTAT_STICKYORUN | ADIV5_DP_CTRLSTAT_STICKYCMP |
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ADIV5_DP_CTRLSTAT_STICKYERR | ADIV5_DP_CTRLSTAT_WDATAERR);
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