Removed BlackPillV2 platform variant from the f4 discovery.
Combined platforms make it hard to do build testing, it is better to have duplicate code and be able test all variants.
This commit is contained in:
Piotr Esden-Tempski
Rachel Mant
parent
2624960422
commit
fcdd93e008
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@ -8,12 +8,7 @@ CFLAGS += -Istm32/include -mcpu=cortex-m4 -mthumb \
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-DSTM32F4 -I../libopencm3/include \
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-Iplatforms/stm32
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ifeq ($(BLACKPILL), 1)
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LINKER_SCRIPT=platforms/stm32/blackpillv2.ld
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CFLAGS += -DBLACKPILL=1
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else
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LINKER_SCRIPT=platforms/stm32/f4discovery.ld
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endif
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LDFLAGS_BOOT = -lopencm3_stm32f4 \
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-Wl,-T,$(LINKER_SCRIPT) -nostartfiles -lc -lnosys \
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@ -1,6 +1,6 @@
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# Firmware BMP for STM32F407 DISCO boards
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Kept for historical reasons to load BMP bootloader to the STM32F103 of the onboard STLINK or external STLINKs. As stlink-tool now allows to load BMP firmware via the original STLINK bootloader is no longer really needed.
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Allows the use of the STM32F407 Discovery board main cpu as a Black Magic Probe. Historically it was used to program the on board built in debugger before ST-Link bootloader use was possible.
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## Connections:
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@ -12,35 +12,6 @@ PC6: TDO/TRACESWO<br>
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PC1: TRST<br>
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PC8: SRST<br>
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# Alternate build for stm32f401 stm32f411 MiniF4 aka BlackPillV2 boards.
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https://github.com/WeActTC/MiniSTM32F4x1
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## Connections:
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* JTAG/SWD
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* PA1: TDI
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* PA13: TMS/SWDIO
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* PA14: TCK/SWCLK
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* PB3: TDO/TRACESWO
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* PB5: TRST
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* PB4: SRST
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* USB USART
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* PB6: USART1 TX (usbuart_xxx)
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* PB7: USART1 RX (usbuart_xxx)
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* +3V3.
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* PB8 - turn on IRLML5103 transistor
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How to Build
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========================================
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```
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cd blackmagic
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make clean
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make PROBE_HOST=f4discovery BLACKPILL=1
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```
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How to Flash with dfu
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========================================
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* After build:
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@ -37,10 +37,6 @@
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#include <libopencm3/cm3/systick.h>
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#include <libopencm3/cm3/cortex.h>
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#ifdef BLACKPILL
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#include <libopencm3/usb/dwc/otg_fs.h>
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#endif
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jmp_buf fatal_error_jmpbuf;
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extern char _ebss[];
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@ -51,11 +47,8 @@ void platform_init(void)
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/* Enable GPIO peripherals */
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rcc_periph_clock_enable(RCC_GPIOA);
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rcc_periph_clock_enable(RCC_GPIOC);
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#ifdef BLACKPILL
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rcc_periph_clock_enable(RCC_GPIOB);
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#else
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rcc_periph_clock_enable(RCC_GPIOD);
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#endif
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/* Check the USER button*/
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if (gpio_get(GPIOA, GPIO0) ||
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((magic[0] == BOOTMAGIC0) && (magic[1] == BOOTMAGIC1)))
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@ -73,11 +66,7 @@ void platform_init(void)
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SYSCFG_MEMRM |= 1;
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scb_reset_core();
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}
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#ifdef BLACKPILL
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rcc_clock_setup_pll(&rcc_hse_25mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
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#else
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rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
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#endif
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/* Enable peripherals */
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rcc_periph_clock_enable(RCC_OTGFS);
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@ -87,13 +76,8 @@ void platform_init(void)
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gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9 | GPIO11 | GPIO12);
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gpio_set_af(GPIOA, GPIO_AF10, GPIO9 | GPIO10 | GPIO11 | GPIO12);
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#ifdef BLACKPILL
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GPIOA_OSPEEDR &= 0x3C00000C;
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GPIOA_OSPEEDR |= 0x28000008;
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#else
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GPIOC_OSPEEDR &= ~0xF30;
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GPIOC_OSPEEDR |= 0xA20;
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#endif
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gpio_mode_setup(JTAG_PORT, GPIO_MODE_OUTPUT,
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GPIO_PUPD_NONE,
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@ -124,11 +108,6 @@ void platform_init(void)
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platform_timing_init();
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usbuart_init();
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cdcacm_init();
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#ifdef BLACKPILL
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// https://github.com/libopencm3/libopencm3/pull/1256#issuecomment-779424001
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OTG_FS_GCCFG |= OTG_GCCFG_NOVBUSSENS | OTG_GCCFG_PWRDWN;
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OTG_FS_GCCFG &= ~(OTG_GCCFG_VBUSBSEN | OTG_GCCFG_VBUSASEN);
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#endif
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}
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void platform_srst_set_val(bool assert) { (void)assert; }
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@ -31,75 +31,6 @@
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#include <setjmp.h>
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#define PLATFORM_HAS_TRACESWO
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#ifdef BLACKPILL
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#define PLATFORM_IDENT "(F4Discovery/BlackPillV2) "
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/* Important pin mappings for STM32 implementation:
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* JTAG/SWD
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* PA1: TDI<br>
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* PA13: TMS/SWDIO<br>
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* PA14: TCK/SWCLK<br>
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* PB3: TDO/TRACESWO<br>
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* PB5: TRST<br>
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* PB4: SRST<br>
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* USB USART
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* PB6: USART1 TX
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* PB7: USART1 RX
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* +3V3
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* PB8 - turn on IRLML5103 transistor
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* Force DFU mode button: PA0
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*/
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/* Hardware definitions... */
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#define JTAG_PORT GPIOA
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#define TDI_PORT JTAG_PORT
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#define TMS_PORT JTAG_PORT
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#define TCK_PORT JTAG_PORT
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#define TDO_PORT GPIOB
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#define TDI_PIN GPIO1
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#define TMS_PIN GPIO13
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#define TCK_PIN GPIO14
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#define TDO_PIN GPIO3
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#define SWDIO_PORT JTAG_PORT
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#define SWCLK_PORT JTAG_PORT
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#define SWDIO_PIN TMS_PIN
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#define SWCLK_PIN TCK_PIN
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#define TRST_PORT GPIOB
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#define TRST_PIN GPIO5
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#define SRST_PORT GPIOB
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#define SRST_PIN GPIO4
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#define PWR_BR_PORT GPIOB
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#define PWR_BR_PIN GPIO8
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#define LED_PORT GPIOC
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#define LED_PORT_UART GPIOA
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#define LED_UART GPIO1
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#define LED_IDLE_RUN GPIO15
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#define LED_ERROR GPIO14
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#define LED_BOOTLOADER GPIO13
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#define USBUSART USART1
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#define USBUSART_CR1 USART1_CR1
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#define USBUSART_DR USART1_DR
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#define USBUSART_IRQ NVIC_USART1_IRQ
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#define USBUSART_CLK RCC_USART1
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#define USBUSART_PORT GPIOB
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#define USBUSART_TX_PIN GPIO6
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#define USBUSART_RX_PIN GPIO7
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#define USBUSART_ISR(x) usart1_isr(x)
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#define USBUSART_DMA_BUS DMA2
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#define USBUSART_DMA_CLK RCC_DMA2
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#define USBUSART_DMA_TX_CHAN DMA_STREAM7
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#define USBUSART_DMA_TX_IRQ NVIC_DMA2_STREAM7_IRQ
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#define USBUSART_DMA_TX_ISR(x) dma2_stream7_isr(x)
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#define USBUSART_DMA_RX_CHAN DMA_STREAM5
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#define USBUSART_DMA_RX_IRQ NVIC_DMA2_STREAM5_IRQ
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#define USBUSART_DMA_RX_ISR(x) dma2_stream5_isr(x)
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/* For STM32F4 DMA trigger source must be specified */
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#define USBUSART_DMA_TRG DMA_SxCR_CHSEL_4
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#else
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#define PLATFORM_IDENT "(F4Discovery) "
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/* Important pin mappings for STM32 implementation:
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@ -167,7 +98,6 @@
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#define USBUSART_DMA_RX_ISR(x) dma1_stream1_isr(x)
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/* For STM32F4 DMA trigger source must be specified */
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#define USBUSART_DMA_TRG DMA_SxCR_CHSEL_4
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#endif
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#define BOOTMAGIC0 0xb007da7a
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#define BOOTMAGIC1 0xbaadfeed
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