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8 Commits

Author SHA1 Message Date
Rafael Silva 8e06539eb5 target/lp17xx: remove unnecessary check 
this actually just checked that is was a DP designed by arm for probably a cortex M3 or M4
we already check for M3 afterwards, not very useful
 2022-07-31 11:16:36 +01:00
Rafael Silva 58025feec2 target/adi: rename missleading idcode variable 2022-07-31 11:16:36 +01:00
dragonmux 6f57cdf6ba lpc17xx: Switched to the unified mass erase command and added progress dots to stop GDB timing out 2022-07-13 19:34:57 -07:00
Uwe Bonnes 9ebc44bcea Make more functions static. 2021-09-22 15:16:20 +02:00
Uwe Bonnes 653d486ee2 cortexm: Store CPUID in target structure. 2020-11-27 22:26:48 +01:00
Uwe Bonnes dc3fd2eb06 Classify debug messages 
Firmware BMP with ENABLE_DEBUG=1 will print WARN and INFO as before.
PC-Hosted BMPwill alway print to stderr. Warn is printed unconditional,
INFO, GDB, TARGET, DONGLE and WIRE will print if their appropriate bit in
cl_debuglevel is set via the -v verbose command line argument.
INFO will go to stdout with -t or -l.
 2020-06-05 14:59:30 +02:00
Gareth McMullin 9d7925792f Merge branch 'master' into always_buffer_flash 2018-04-23 10:40:20 +12:00
Akila Ravihansa Perera 471ce2547c Added LPC17xx support (#317) 2018-03-25 12:53:30 -07:00