This adds a TRY_CATCH around the adiv5_ap_read_id() in
adiv5_component_probe() and resets the DP when that happens.
It seems like the STM32WLE5 comes with the AP of the inactive core
enabled in a way that does not make it detectable, and the current code
times out and leaves the whole device hanging.
Catching the timeout and calling adiv5_dp_abort() seems to restore the
device to a useable state.
Tested on Seed LoRa-E5 (STM32E5JC).
This patch puts null terminating characters for the 'type',
'version', and 'serial' strings extracted from blackmagic probe
id strings on linux systems.
STM32WLE5 has the same dual core chip as STM32WL5. For the second
core, the additional AP can be see, but access to e.g. CIDR0 for that
Romtable fails.
Aborting the scan too if again the second read of CIDR0 fails makes
sense anyways!
Special iRST_SENSE handling does not apply at least for BMP 2.1c.
On V2.1c, iRST_SENSE was set as output high and xRST high shorted
iRST_SENSE to ground via Q2
FIXME: Check for older versions!
This changes the USB identification from
"Black Magic Probe(STLINK/V2) v..." to
"Black Magic Probe (STLINK/V2) v..."
Signed-off-by: Martin <Ho-Ro@users.noreply.github.com>
On different platforms, line endings can differ. Git tries to
intelligently convert source code to match native line endings when
doing a checkout, unless a particular configuration flag is set.
An alternate approach is to create a `.gitattributes` file and manually
specify various types of files. This ensures files are properly handled.
It also prevents git from creating patches that consist of nothing more
than replacing line endings.
Signed-off-by: Sean Cross <sean@xobs.io>
This adds support for the NXP S32K148. This is an automotive-grade part
that is derived from the Kinetis line, so it has a very similar
interface to other parts in the family.
Signed-off-by: Sean Cross <sean@xobs.io>
**Summary**
Modifications to fix flash support on the lpc546xx:
- fix IAP entrypoint to be `0x03000204`, not the value at that address
- add a reset and attach sequence before erasing flash sectors. there's
little documentation around this, but experimentally, erasing sector 0
fails when the ROM bootloader is mapped to it (on reset). stepping the
chip once and attaching is enough to snap the chip out of it, permitting
flash erase on sector 0.
- add a few test commands to the lpc546xx table (read_uid, erase/write
sector, etc).
- write the magic CRC value when writing to sector 0
(`lpc_flash_write_magic_vect`).
- move the lpc546xx probe to before the lpc43xx probe, to prevent
getting the lpc546xx into Lockup when reading an illegal memory location
during lpc43xx probing
Fixes#786.
I don't 100% understand the reset/load sequence of this part, but these
changes are sufficient to program and debug the part now.
I didn't do a detailed analysis of what pyocd (via st-link hardware
adapter) and segger jlink do to handle the same, but both of those
worked without modification, so there's some difference in the
sequence they're using.
**Testing**
Verified I can now successfully erase and write an executable in sector
0 (and other sectors).
Verified the new commands work correctly.