"Single" core STM32WLE still sees AP1 but on first scan aborts gracefully
after some errors and on later runs sees AP1 as unusable. Fixes#832.
Decode the Cross trigger interface found on CPU2 on STM32WBxx.
E.g on STM32WXXX AP1 with C2BOOT not set, the AP base registers have valid
values but reading them fails and turns the AP unusable. BMDA reading CIDR
with multiple calls will will loop and finally hang up BMD. Other target
devices may show similar behaviour.
Reading CIDR with a single call allows recovery from in that case and
additional spares target transactions.
Try to look for repeating sectors before reverting to reading the
JEDEC ID of the flash chip. This way we don't interrupt the flash
execution if a valid program is running, but can detect the flash
size if the flash memory has been erased.
F0 needs separation of DMA Interrupts, show problems with 128 Byte USART/DMA
buffers, perhaps caused by the st_usbfs_v2_usb_driver and has no
scb_reset_core.
Add a format file for `clang-format`. This is based on the
`.clang-format` file from Linux, adjusted to work with this project.
Notably, it opts for 120 characters, given that some functions are
rather wide.
Care was chosen to adopt settings that resulted in a minimum of
disruption when run through the formatter, however since no formatter
has been used before this necessarily results in code that does not
conform to the formatter.
Signed-off-by: Sean Cross <sean@xobs.io>
Ubuntu's default /bin/sh is dash, which does not support the `&>`
redirection syntax. This commit moves version.h generation back into the
Makefile, as 8afaedd had it, but restores compatibility with
GNU Make < 4.0, which 8afaedd, broke. This also fixes building on macOS,
as macOS bundles GNU Make 3.81.
The command can be used either by specifying the length only, or
the start address and the length like so:
monitor erase_sector <length>
monitor erase_sector <start_addr> <length>
If no start address is specified, it will begin erasing from the
start of the flash sector.
There seems to be a bug in the bootrom for the rp2040 which means
that the chip erase command is not accepted. This is because the
CS pin must be released (set high) directly after sending the chip
erase command (0x60 or 0xC7) (see Winbond W25Q128JV datasheet for
details). Instead the bootrom sends the address after the command,
thus the SPI flash silently ignores the command. Instead, we must
erase each 64KB block one at a time, but thankfull the bootrom
handles this correctly for us.
There are some cases when the this old method for finding the flash
size will fail, such as if the flash chip has been erased with 0xFF
bytes (rather than blank 0x00 bytes). As this is unreliable,
setting the wrong flash size could cause problems when trying to
inspect memory regions which appear to be out of range.
There is also such a thing as blackpill, that uses stm32f1 instead of
stm32f4. At some point we might get support for the original blackpill
and it will force us to change the name then.
Uwe Bonnes
dragonmux
Rafael Silva
James Turton
SId Price
Jonathan Giles
Sean Cross
Mikaela Szekely
Piotr Esden-Tempski