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sys64738:sys64738/rp-emptyflash-fix
sys64738:sys64738/ft4232-fix
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main ... sys64738/r

Author SHA1 Message Date
Triss 780d6daa53 rp: fix flash initialization failing when bootrom starts USB boot due to flash being empty 2022-09-25 01:49:01 +02:00
1 changed files with 2 additions and 6 deletions
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8
src/target/rp.c
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@ -207,10 +207,8 @@ static bool rp_mass_erase(target *t);
// Our own implementation of bootloader functions for handling flash chip // Our own implementation of bootloader functions for handling flash chip
static void rp_flash_exit_xip(target *const t); static void rp_flash_exit_xip(target *const t);
static void rp_flash_enter_xip(target *const t); static void rp_flash_enter_xip(target *const t);
#if 0
static void rp_flash_connect_internal(target *const t); static void rp_flash_connect_internal(target *const t);
static void rp_flash_flush_cache(target *const t); static void rp_flash_flush_cache(target *const t);
#endif
static void rp_spi_read_sfdp(target *const t, const uint32_t address, void *const buffer, const size_t length) static void rp_spi_read_sfdp(target *const t, const uint32_t address, void *const buffer, const size_t length)
{ {
@ -225,6 +223,7 @@ static void rp_add_flash(target *t)
return; return;
} }
rp_flash_connect_internal(t);
rp_flash_exit_xip(t); rp_flash_exit_xip(t);
spi_parameters_s spi_parameters; spi_parameters_s spi_parameters;
@ -236,6 +235,7 @@ static void rp_add_flash(target *t)
spi_parameters.sector_erase_opcode = SPI_FLASH_CMD_SECTOR_ERASE; spi_parameters.sector_erase_opcode = SPI_FLASH_CMD_SECTOR_ERASE;
} }
rp_flash_flush_cache(t);
rp_flash_enter_xip(t); rp_flash_enter_xip(t);
DEBUG_INFO("Flash size: %uMiB\n", spi_parameters.capacity / (1024U * 1024U)); DEBUG_INFO("Flash size: %uMiB\n", spi_parameters.capacity / (1024U * 1024U));
@ -621,7 +621,6 @@ static void rp_spi_read(
target_mem_write32(t, RP_SSI_ENABLE, ssi_enabled); target_mem_write32(t, RP_SSI_ENABLE, ssi_enabled);
} }
#if 0
// Connect the XIP controller to the flash pads // Connect the XIP controller to the flash pads
static void rp_flash_connect_internal(target *const t) static void rp_flash_connect_internal(target *const t)
{ {
@ -643,7 +642,6 @@ static void rp_flash_connect_internal(target *const t)
target_mem_write32(t, RP_GPIO_QSPI_SD2_CTRL, 0); target_mem_write32(t, RP_GPIO_QSPI_SD2_CTRL, 0);
target_mem_write32(t, RP_GPIO_QSPI_SD3_CTRL, 0); target_mem_write32(t, RP_GPIO_QSPI_SD3_CTRL, 0);
} }
#endif
// Set up the SSI controller for standard SPI mode,i.e. for every byte sent we get one back // Set up the SSI controller for standard SPI mode,i.e. for every byte sent we get one back
// This is only called by flash_exit_xip(), not by any of the other functions. // This is only called by flash_exit_xip(), not by any of the other functions.
@ -778,7 +776,6 @@ static void rp_flash_exit_xip(target *const t)
target_mem_write32(t, RP_GPIO_QSPI_CS_CTRL, 0); target_mem_write32(t, RP_GPIO_QSPI_CS_CTRL, 0);
} }
#if 0
// This is a hook for steps to be taken in between programming the flash and // This is a hook for steps to be taken in between programming the flash and
// doing cached XIP reads from the flash. Called by the bootrom before // doing cached XIP reads from the flash. Called by the bootrom before
// entering flash second stage, and called by the debugger after flash // entering flash second stage, and called by the debugger after flash
@ -793,7 +790,6 @@ static void rp_flash_flush_cache(target *const t)
target_mem_write32(t, RP_XIP_CTRL, ctrl | RP_XIP_CTRL_ENABLE); target_mem_write32(t, RP_XIP_CTRL, ctrl | RP_XIP_CTRL_ENABLE);
rp_spi_chip_select(t, RP_GPIO_QSPI_CS_DRIVE_NORMAL); rp_spi_chip_select(t, RP_GPIO_QSPI_CS_DRIVE_NORMAL);
} }
#endif
// Put the SSI into a mode where XIP accesses translate to standard // Put the SSI into a mode where XIP accesses translate to standard
// serial 03h read commands. The flash remains in its default serial command // serial 03h read commands. The flash remains in its default serial command