118 lines
3.4 KiB
C
118 lines
3.4 KiB
C
/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2017 Uwe Bonnes bon@elektron,ikp,physik.tu-darmstadt.de
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements the platform specific functions for the STM32F072-IF
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* implementation.
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*/
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#include "general.h"
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#include "usb.h"
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#include "aux_serial.h"
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#include "morse.h"
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/cm3/scb.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/usart.h>
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#include <libopencm3/stm32/syscfg.h>
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#include <libopencm3/usb/usbd.h>
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#include <libopencm3/stm32/flash.h>
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extern uint32_t _ebss[];
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#define SYSCFG_MEMRM MMIO32(0x40010000)
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#define SYSMEM_RESET_VECTOR 0x1fffC804
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void platform_init(void)
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{
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volatile uint32_t *magic = (uint32_t *) &_ebss;
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/* If RCC_CFGR is not at it's reset value, the bootloader was executed
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* and SET_ADDRESS got us to this place. On F3 ???, without further efforts,
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* DFU does not start in that case.
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* So issue an reset to allow a clean start!
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*/
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if (RCC_CFGR)
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scb_reset_system();
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SYSCFG_MEMRM &= ~3;
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/* Buttom is BOOT0, so buttom is already evaluated!*/
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if (((magic[0] == BOOTMAGIC0) && (magic[1] == BOOTMAGIC1))) {
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magic[0] = 0;
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magic[1] = 0;
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/* Jump to the built in bootloader by mapping System flash.
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As we just come out of reset, no other deinit is needed!*/
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SYSCFG_MEMRM |= 1;
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void (*bootloader)(void) =
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(void (*)(void)) (*((uint32_t *) SYSMEM_RESET_VECTOR));
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/* We come out of reset, so MSP is already set*/
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bootloader();
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while (1);
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}
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rcc_clock_setup_in_hse_8mhz_out_48mhz();
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/* Enable peripherals */
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rcc_periph_clock_enable(RCC_GPIOA);
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rcc_periph_clock_enable(RCC_GPIOB);
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rcc_periph_clock_enable(RCC_CRC);
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rcc_set_usbclk_source(RCC_PLL);
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GPIOA_OSPEEDR &= ~0xF00C;
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GPIOA_OSPEEDR |= 0x5004; /* Set medium speed on PA1, PA6,PA7*/
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gpio_mode_setup(JTAG_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE,
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TMS_PIN | TCK_PIN |TDI_PIN);
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gpio_mode_setup(TDO_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, TDO_PIN);
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gpio_mode_setup(LED_PORT, GPIO_MODE_OUTPUT,
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GPIO_PUPD_NONE,
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LED_UART | LED_IDLE_RUN | LED_ERROR | LED_BOOTLOADER);
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gpio_mode_setup(NRST_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, NRST_PIN);
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gpio_set(NRST_PORT, NRST_PIN);
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gpio_set_output_options(NRST_PORT, GPIO_OTYPE_OD,
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GPIO_OSPEED_2MHZ, NRST_PIN);
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platform_timing_init();
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blackmagic_usb_init();
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aux_serial_init();
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}
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void platform_nrst_set_val(bool assert)
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{
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gpio_set_val(NRST_PORT, NRST_PIN, !assert);
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}
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bool platform_nrst_get_val(void)
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{
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return (gpio_get(NRST_PORT, NRST_PIN)) ? false : true;
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}
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const char *platform_target_voltage(void)
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{
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return "ABSENT!";
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}
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void platform_request_boot(void)
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{
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uint32_t *magic = (uint32_t *) &_ebss;
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magic[0] = BOOTMAGIC0;
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magic[1] = BOOTMAGIC1;
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scb_reset_system();
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}
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void platform_target_clk_output_enable(bool enable)
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{
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(void)enable;
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}
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