300 lines
8.6 KiB
C
300 lines
8.6 KiB
C
/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2011 Black Sphere Technologies Ltd.
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* Written by Gareth McMullin <gareth@blacksphere.co.nz>
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* Copyright (C) 2020- 2021 Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de)
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements the SW-DP specific functions of the
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* ARM Debug Interface v5 Architecure Specification, ARM doc IHI0031A.
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*/
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#include "general.h"
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#include "exception.h"
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#include "adiv5.h"
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#include "target.h"
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#include "target_internal.h"
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uint8_t make_packet_request(uint8_t RnW, uint16_t addr)
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{
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bool APnDP = addr & ADIV5_APnDP;
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addr &= 0xffU;
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uint8_t request = 0x81U; /* Park and Startbit */
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if (APnDP)
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request ^= 0x22U;
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if (RnW)
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request ^= 0x24U;
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addr &= 0xcU;
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request |= (addr << 1U) & 0x18U;
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if (addr == 4U || addr == 8U)
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request ^= 0x20U;
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return request;
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}
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/* Provide bare DP access functions without timeout and exception */
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static void dp_line_reset(ADIv5_DP_t *dp)
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{
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dp->seq_out(0xFFFFFFFFU, 32U);
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dp->seq_out(0x0FFFFFFFU, 32U);
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}
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bool firmware_dp_low_write(ADIv5_DP_t *dp, uint16_t addr, const uint32_t data)
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{
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unsigned int request = make_packet_request(ADIV5_LOW_WRITE, addr & 0xfU);
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dp->seq_out(request, 8);
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int res = dp->seq_in(3);
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dp->seq_out_parity(data, 32);
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return (res != 1);
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}
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/* Try first the dormant to SWD procedure.
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* If target id given, scan DPs 0 .. 15 on that device and return.
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* Otherwise
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*/
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uint32_t adiv5_swdp_scan(uint32_t targetid)
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{
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volatile struct exception e;
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target_list_free();
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ADIv5_DP_t idp = {
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.dp_low_write = firmware_dp_low_write,
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.error = firmware_swdp_error,
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.dp_read = firmware_swdp_read,
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.low_access = firmware_swdp_low_access,
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.abort = firmware_swdp_abort,
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};
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ADIv5_DP_t *initial_dp = &idp;
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if (swdptap_init(initial_dp))
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return 0;
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platform_target_clk_output_enable(true);
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/* DORMANT-> SWD sequence*/
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initial_dp->seq_out(0xFFFFFFFF, 32);
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initial_dp->seq_out(0xFFFFFFFF, 32);
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/* 128 bit selection alert sequence for SW-DP-V2 */
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initial_dp->seq_out(0x6209f392, 32);
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initial_dp->seq_out(0x86852d95, 32);
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initial_dp->seq_out(0xe3ddafe9, 32);
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initial_dp->seq_out(0x19bc0ea2, 32);
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/* 4 cycle low,
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* 0x1a Arm CoreSight SW-DP activation sequence
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* 20 bits start of reset another reset sequence*/
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initial_dp->seq_out(0x1a0, 12);
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bool scan_multidrop = true;
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volatile uint32_t dp_targetid = targetid;
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if (!dp_targetid) {
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/* No targetID given on the command line Try to read ID */
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scan_multidrop = false;
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dp_line_reset(initial_dp);
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volatile uint32_t dp_dpidr;
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TRY_CATCH (e, EXCEPTION_ALL) {
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dp_dpidr = initial_dp->dp_read(initial_dp, ADIV5_DP_DPIDR);
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}
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if (e.type || initial_dp->fault) {
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DEBUG_WARN("Trying old JTAG to SWD sequence\n");
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initial_dp->seq_out(0xFFFFFFFF, 32);
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initial_dp->seq_out(0xFFFFFFFF, 32);
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initial_dp->seq_out(0xE79E, 16); /* 0b0111100111100111 */
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dp_line_reset(initial_dp);
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initial_dp->fault = 0;
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TRY_CATCH (e, EXCEPTION_ALL) {
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dp_dpidr = initial_dp->dp_read(initial_dp, ADIV5_DP_DPIDR);
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}
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if (e.type || initial_dp->fault) {
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DEBUG_WARN("No usable DP found\n");
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return 0;
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}
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}
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const uint8_t dp_version = (dp_dpidr & ADIV5_DP_DPIDR_VERSION_MASK) >> ADIV5_DP_DPIDR_VERSION_OFFSET;
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if (dp_version >= 2) {
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scan_multidrop = true;
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/* Read TargetID. Can be done with device in WFI, sleep or reset!*/
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adiv5_dp_write(initial_dp, ADIV5_DP_SELECT, 2); /* TARGETID is on bank 2 */
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dp_targetid = adiv5_dp_read(initial_dp, ADIV5_DP_TARGETID);
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adiv5_dp_write(initial_dp, ADIV5_DP_SELECT, 0);
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const uint16_t tdesigner =
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(dp_targetid & ADIV5_DP_TARGETID_TDESIGNER_MASK) >> ADIV5_DP_TARGETID_TDESIGNER_OFFSET;
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const uint16_t tpartno = (dp_targetid & ADIV5_DP_TARGETID_TPARTNO_MASK) >> ADIV5_DP_TARGETID_TPARTNO_OFFSET;
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/* convert it to our internal representation, See JEP-106 code list */
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const uint16_t designer_code = (tdesigner & ADIV5_DP_DESIGNER_JEP106_CONT_MASK) << 1U |
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(tdesigner & ADIV5_DP_DESIGNER_JEP106_CODE_MASK);
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if (designer_code == JEP106_MANUFACTURER_RASPBERRY && tpartno == 0x1002) {
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/* RP2040 */
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/* Release evt. handing RESCUE DP reset*/
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adiv5_dp_write(initial_dp, ADIV5_DP_CTRLSTAT, 0);
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}
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}
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}
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if (!initial_dp->dp_low_write) {
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DEBUG_WARN("CMSIS_DAP < V1.2 can not handle multi-drop!\n");
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/* E.g. CMSIS_DAP < V1.2 can not handle multi-drop!*/
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scan_multidrop = false;
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}
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DEBUG_WARN("scan_multidrop: %s\n", scan_multidrop ? "true" : "false");
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const volatile size_t max_dp = (scan_multidrop) ? 16U : 1U;
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for (volatile size_t i = 0; i < max_dp; i++) {
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if (scan_multidrop) {
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dp_line_reset(initial_dp);
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initial_dp->dp_low_write(initial_dp, ADIV5_DP_TARGETSEL,
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(i << ADIV5_DP_TARGETSEL_TINSTANCE_OFFSET) |
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(dp_targetid & (ADIV5_DP_TARGETSEL_TPARTNO_MASK | ADIV5_DP_TARGETSEL_TDESIGNER_MASK | 1U)));
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TRY_CATCH (e, EXCEPTION_ALL) {
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initial_dp->dp_read(initial_dp, ADIV5_DP_DPIDR);
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}
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if (e.type || initial_dp->fault)
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continue;
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}
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ADIv5_DP_t *dp = calloc(1, sizeof(*dp));
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if (!dp) { /* calloc failed: heap exhaustion */
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DEBUG_WARN("calloc: failed in %s\n", __func__);
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continue;
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}
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memcpy(dp, initial_dp, sizeof(ADIv5_DP_t));
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dp->instance = i;
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adiv5_dp_init(dp, 0);
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}
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return target_list ? 1U : 0U;
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}
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uint32_t firmware_swdp_read(ADIv5_DP_t *dp, uint16_t addr)
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{
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if (addr & ADIV5_APnDP) {
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adiv5_dp_low_access(dp, ADIV5_LOW_READ, addr, 0);
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return adiv5_dp_low_access(dp, ADIV5_LOW_READ, ADIV5_DP_RDBUFF, 0);
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} else
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return firmware_swdp_low_access(dp, ADIV5_LOW_READ, addr, 0);
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}
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uint32_t firmware_swdp_error(ADIv5_DP_t *dp)
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{
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if (dp->version >= 2 && dp->dp_low_write) {
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/* On protocol error target gets deselected.
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* With DP Change, another target needs selection.
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* => Reselect with right target! */
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dp_line_reset(dp);
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dp->dp_low_write(dp, ADIV5_DP_TARGETSEL, dp->targetsel);
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dp->dp_read(dp, ADIV5_DP_DPIDR);
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/* Exception here is unexpected, so do not catch */
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}
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uint32_t err, clr = 0;
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err = adiv5_dp_read(dp, ADIV5_DP_CTRLSTAT) & (ADIV5_DP_CTRLSTAT_STICKYORUN | ADIV5_DP_CTRLSTAT_STICKYCMP |
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ADIV5_DP_CTRLSTAT_STICKYERR | ADIV5_DP_CTRLSTAT_WDATAERR);
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if (err & ADIV5_DP_CTRLSTAT_STICKYORUN)
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clr |= ADIV5_DP_ABORT_ORUNERRCLR;
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if (err & ADIV5_DP_CTRLSTAT_STICKYCMP)
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clr |= ADIV5_DP_ABORT_STKCMPCLR;
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if (err & ADIV5_DP_CTRLSTAT_STICKYERR)
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clr |= ADIV5_DP_ABORT_STKERRCLR;
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if (err & ADIV5_DP_CTRLSTAT_WDATAERR)
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clr |= ADIV5_DP_ABORT_WDERRCLR;
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adiv5_dp_write(dp, ADIV5_DP_ABORT, clr);
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dp->fault = 0;
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return err;
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}
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uint32_t firmware_swdp_low_access(ADIv5_DP_t *dp, uint8_t RnW, uint16_t addr, uint32_t value)
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{
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uint8_t request = make_packet_request(RnW, addr);
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uint32_t response = 0;
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uint32_t ack = SWDP_ACK_WAIT;
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platform_timeout timeout;
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if ((addr & ADIV5_APnDP) && dp->fault)
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return 0;
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platform_timeout_set(&timeout, 250);
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do {
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dp->seq_out(request, 8);
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ack = dp->seq_in(3);
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if (ack == SWDP_ACK_FAULT) {
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/* On fault, abort the request and repeat */
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dp->error(dp);
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}
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} while ((ack == SWDP_ACK_WAIT || ack == SWDP_ACK_FAULT) && !platform_timeout_is_expired(&timeout));
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if (ack == SWDP_ACK_WAIT) {
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dp->abort(dp, ADIV5_DP_ABORT_DAPABORT);
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dp->fault = 1;
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return 0;
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}
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if (ack == SWDP_ACK_FAULT) {
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dp->fault = 1;
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return 0;
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}
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if (ack != SWDP_ACK_OK)
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raise_exception(EXCEPTION_ERROR, "SWDP invalid ACK");
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if (RnW) {
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if (dp->seq_in_parity(&response, 32)) { /* Give up on parity error */
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dp->fault = 1;
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raise_exception(EXCEPTION_ERROR, "SWDP Parity error");
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}
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} else {
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dp->seq_out_parity(value, 32);
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/* ARM Debug Interface Architecture Specification ADIv5.0 to ADIv5.2
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* tells to clock the data through SW-DP to either :
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* - immediate start a new transaction
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* - continue to drive idle cycles
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* - or clock at least 8 idle cycles
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*
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* Implement last option to favour correctness over
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* slight speed decrease
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*/
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dp->seq_out(0, 8);
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}
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return response;
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}
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void firmware_swdp_abort(ADIv5_DP_t *dp, uint32_t abort)
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{
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adiv5_dp_write(dp, ADIV5_DP_ABORT, abort);
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}
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