176 lines
5.0 KiB
C
176 lines
5.0 KiB
C
/*
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* This file is part of the Black Magic Debug project.
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*
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* Copyright (C) 2011 Black Sphere Technologies Ltd.
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* Written by Gareth McMullin <gareth@blacksphere.co.nz>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This file implements TI/LMI LM3S target specific functions providing
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* the XML memory map and Flash memory programming.
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*
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* Issues:
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* No detection of the target device.
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* Add reference to documentation.
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* Flash erase is very slow.
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*/
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#include <stdlib.h>
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#include <string.h>
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#include "general.h"
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#include "adiv5.h"
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#include "target.h"
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static int lmi_flash_erase(struct target_s *target, uint32_t addr, int len);
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static int lmi_flash_write(struct target_s *target, uint32_t dest,
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const uint8_t *src, int len);
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static const char lmi_driver_str[] = "TI Stellaris/Tiva";
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static const char lmi_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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/* "<!DOCTYPE memory-map "
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" PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
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"<memory-map>"
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" <memory type=\"flash\" start=\"0\" length=\"0x20000\">"
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" <property name=\"blocksize\">0x400</property>"
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" </memory>"
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x10000\"/>"
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"</memory-map>";
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static const char tm4c123gh6pm_xml_memory_map[] = "<?xml version=\"1.0\"?>"
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/* "<!DOCTYPE memory-map "
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" PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
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" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
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"<memory-map>"
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" <memory type=\"flash\" start=\"0\" length=\"0x40000\">"
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" <property name=\"blocksize\">0x400</property>"
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" </memory>"
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" <memory type=\"ram\" start=\"0x20000000\" length=\"0x8000\"/>"
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"</memory-map>";
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static const uint16_t lmi_flash_write_stub[] = {
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// _start:
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0x4809, // ldr r0, [pc, #36] // _flashbase
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0x490b, // ldr r1, [pc, #44] // _addr
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0x467a, // mov r2, pc
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0x3230, // adds r2, #48
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0x4b0a, // ldr r3, [pc, #40] // _size
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0x4d08, // ldr r5, [pc, #32] // _flash_write_cmd
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// _next:
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0xb15b, // cbz r3, _done
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0x6001, // str r1, [r0, #0]
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0x6814, // ldr r4, [r2]
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0x6044, // str r4, [r0, #4]
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0x6085, // str r5, [r0, #8]
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// _wait:
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0x6884, // ldr r4, [r0, #8]
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0x2601, // movs r6, #1
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0x4234, // tst r4, r6
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0xd1fb, // bne _wait
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0x3b01, // subs r3, #1
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0x3104, // adds r1, #4
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0x3204, // adds r2, #4
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0xe7f2, // b _next
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// _done:
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0xbe00, // bkpt
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// _flashbase:
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0xd000, 0x400f, // .word 0x400fd000
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// _flash_write_cmd:
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0x0001, 0xa442, // .word 0xa4420001
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// _addr:
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// 0x0000, 0x0000,
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// _size:
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// 0x0000, 0x0000,
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// _data:
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// ...
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};
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bool lmi_probe(struct target_s *target)
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{
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uint32_t did1 = adiv5_ap_mem_read(adiv5_target_ap(target), 0x400FE004);
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switch (did1 >> 16) {
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case 0x1049: /* LM3S3748 */
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target->driver = lmi_driver_str;
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target->xml_mem_map = lmi_xml_memory_map;
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target->flash_erase = lmi_flash_erase;
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target->flash_write = lmi_flash_write;
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return true;
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case 0x10A1: /* TM4C123GH6PM */
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target->driver = lmi_driver_str;
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target->xml_mem_map = tm4c123gh6pm_xml_memory_map;
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target->flash_erase = lmi_flash_erase;
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target->flash_write = lmi_flash_write;
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return true;
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}
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return false;
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}
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int lmi_flash_erase(struct target_s *target, uint32_t addr, int len)
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{
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ADIv5_AP_t *ap = adiv5_target_ap(target);
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uint32_t tmp;
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addr &= 0xFFFFFC00;
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len &= 0xFFFFFC00;
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/* setup word access */
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adiv5_ap_write(ap, 0x00, 0xA2000052);
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/* select Flash Control */
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adiv5_dp_low_access(ap->dp, 1, 0, 0x04, 0x400FD000);
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while(len) {
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/* write address to FMA */
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adiv5_ap_write(ap, 0x10, addr); /* Required to switch banks */
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/* set ERASE bit in FMC */
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adiv5_dp_low_access(ap->dp, 1, 0, 0x08, 0xA4420002);
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/* Read FMC to poll for ERASE bit */
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adiv5_dp_low_access(ap->dp, 1, 1, 0x08, 0);
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do {
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tmp = adiv5_dp_low_access(ap->dp, 1, 1, 0x08, 0);
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} while (tmp & 2);
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len -= 0x400;
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addr += 0x400;
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}
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return 0;
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}
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int lmi_flash_write(struct target_s *target, uint32_t dest,
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const uint8_t *src, int len)
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{
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uint32_t data[(len>>2)+2];
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data[0] = dest;
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data[1] = len >> 2;
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memcpy(&data[2], src, len);
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DEBUG("Sending stub\n");
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target_mem_write_words(target, 0x20000000, (void*)lmi_flash_write_stub, 0x30);
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DEBUG("Sending data\n");
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target_mem_write_words(target, 0x20000030, data, len + 8);
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DEBUG("Running stub\n");
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target_pc_write(target, 0x20000000);
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target_halt_resume(target, 0);
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DEBUG("Waiting for halt\n");
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while(!target_halt_wait(target));
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return 0;
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}
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