base bord routing done, some stuff still TODO
This commit is contained in:
parent
60d38466db
commit
2b56a94fe7
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@ -232,10 +232,10 @@ Text GLabel 10000 3900 2 50 Input ~ 0
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EMERG
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Wire Wire Line
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10000 3900 9900 3900
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Text GLabel 10000 4600 2 50 Input ~ 0
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Text GLabel 10150 4600 2 50 Input ~ 0
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EMERG
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Wire Wire Line
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10000 4600 9900 4600
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10150 4600 10050 4600
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$Comp
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L power:+3.3VADC #PWR0105
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U 1 1 61CDDF59
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@ -684,7 +684,7 @@ U 1 1 61F8278D
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P 3000 3100
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F 0 "C105" H 3115 3146 50 0000 L CNN
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F 1 "1uF" H 3115 3055 50 0000 L CNN
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F 2 "Capacitor_SMD:C_01005_0402Metric_Pad0.57x0.30mm_HandSolder" H 3038 2950 50 0001 C CNN
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F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 3038 2950 50 0001 C CNN
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F 3 "~" H 3000 3100 50 0001 C CNN
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1 3000 3100
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1 0 0 -1
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@ -838,7 +838,7 @@ U 1 1 620D5D7C
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P 4900 2950
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F 0 "C106" H 5015 2996 50 0000 L CNN
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F 1 "1uF" H 5015 2905 50 0000 L CNN
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F 2 "Capacitor_SMD:C_01005_0402Metric_Pad0.57x0.30mm_HandSolder" H 4938 2800 50 0001 C CNN
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F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 4938 2800 50 0001 C CNN
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F 3 "~" H 4900 2950 50 0001 C CNN
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1 4900 2950
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1 0 0 -1
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@ -1111,7 +1111,7 @@ U 1 1 62397B94
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P 2500 5950
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F 0 "R104" V 2293 5950 50 0000 C CNN
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F 1 "1k" V 2384 5950 50 0000 C CNN
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F 2 "Resistor_SMD:R_01005_0402Metric_Pad0.57x0.30mm_HandSolder" V 2430 5950 50 0001 C CNN
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F 2 "Resistor_SMD:R_1020_2550Metric_Pad1.33x5.20mm_HandSolder" V 2430 5950 50 0001 C CNN
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F 3 "~" H 2500 5950 50 0001 C CNN
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1 2500 5950
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0 1 1 0
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@ -1255,4 +1255,6 @@ Text Notes 4300 1550 0 50 ~ 0
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Place jumper when using\nonboard RP2040 and not\nusing an external 3V3 ref\nfor analog stuff. Otherwise,\ndisconnect.
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Wire Wire Line
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2650 6300 2800 6300
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NoConn ~ 10050 4600
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NoConn ~ 9900 4600
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$EndSCHEMATC
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2350
glitcher.kicad_pcb
2350
glitcher.kicad_pcb
File diff suppressed because it is too large
Load Diff
268
glitcher.pro
268
glitcher.pro
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@ -1,29 +1,10 @@
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update=Sun Dec 19 05:33:33 2021
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update=Tue Dec 21 00:10:30 2021
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version=1
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last_client=kicad
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[general]
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version=1
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RootSch=
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BoardNm=
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[pcbnew]
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version=1
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LastNetListRead=
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UseCmpFile=1
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PadDrill=0.600000000000
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PadDrillOvalY=0.600000000000
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PadSizeH=1.500000000000
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PadSizeV=1.500000000000
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PcbTextSizeV=1.500000000000
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PcbTextSizeH=1.500000000000
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PcbTextThickness=0.300000000000
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ModuleTextSizeV=1.000000000000
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ModuleTextSizeH=1.000000000000
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ModuleTextSizeThickness=0.150000000000
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SolderMaskClearance=0.000000000000
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SolderMaskMinWidth=0.000000000000
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DrawSegmentWidth=0.200000000000
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BoardOutlineThickness=0.100000000000
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ModuleOutlineThickness=0.150000000000
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[cvpcb]
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version=1
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NetIExt=net
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@ -41,3 +22,250 @@ NetFmtName=
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SpiceAjustPassiveValues=0
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LabSize=50
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ERC_TestSimilarLabels=1
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[pcbnew]
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version=1
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PageLayoutDescrFile=
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LastNetListRead=
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CopperLayerCount=2
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BoardThickness=1.6
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AllowMicroVias=0
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AllowBlindVias=0
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RequireCourtyardDefinitions=0
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ProhibitOverlappingCourtyards=1
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MinTrackWidth=0.2
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MinViaDiameter=0.4
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MinViaDrill=0.3
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MinMicroViaDiameter=0.2
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MinMicroViaDrill=0.09999999999999999
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MinHoleToHole=0.25
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TrackWidth1=0.25
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TrackWidth2=0.5
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ViaDiameter1=0.8
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ViaDrill1=0.4
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dPairWidth1=0.2
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dPairGap1=0.25
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dPairViaGap1=0.25
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SilkLineWidth=0.12
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SilkTextSizeV=1
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SilkTextSizeH=1
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SilkTextSizeThickness=0.15
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SilkTextItalic=0
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SilkTextUpright=1
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CopperLineWidth=0.2
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CopperTextSizeV=1.5
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CopperTextSizeH=1.5
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CopperTextThickness=0.3
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CopperTextItalic=0
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CopperTextUpright=1
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EdgeCutLineWidth=0.05
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CourtyardLineWidth=0.05
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OthersLineWidth=0.15
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OthersTextSizeV=1
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OthersTextSizeH=1
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OthersTextSizeThickness=0.15
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OthersTextItalic=0
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OthersTextUpright=1
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SolderMaskClearance=0
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SolderMaskMinWidth=0
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SolderPasteClearance=0
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SolderPasteRatio=-0
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[pcbnew/Layer.F.Cu]
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Name=F.Cu
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Type=0
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Enabled=1
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[pcbnew/Layer.In1.Cu]
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Name=In1.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In2.Cu]
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Name=In2.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In3.Cu]
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Name=In3.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In4.Cu]
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Name=In4.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In5.Cu]
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Name=In5.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In6.Cu]
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Name=In6.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In7.Cu]
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Name=In7.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In8.Cu]
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Name=In8.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In9.Cu]
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Name=In9.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In10.Cu]
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Name=In10.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In11.Cu]
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Name=In11.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In12.Cu]
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Name=In12.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In13.Cu]
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Name=In13.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In14.Cu]
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Name=In14.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In15.Cu]
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Name=In15.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In16.Cu]
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Name=In16.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In17.Cu]
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Name=In17.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In18.Cu]
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Name=In18.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In19.Cu]
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Name=In19.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In20.Cu]
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Name=In20.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In21.Cu]
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Name=In21.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In22.Cu]
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Name=In22.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In23.Cu]
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Name=In23.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In24.Cu]
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Name=In24.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In25.Cu]
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Name=In25.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In26.Cu]
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Name=In26.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In27.Cu]
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Name=In27.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In28.Cu]
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Name=In28.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In29.Cu]
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Name=In29.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.In30.Cu]
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Name=In30.Cu
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Type=0
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Enabled=0
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[pcbnew/Layer.B.Cu]
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Name=B.Cu
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Type=0
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Enabled=1
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[pcbnew/Layer.B.Adhes]
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Enabled=1
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[pcbnew/Layer.F.Adhes]
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Enabled=1
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[pcbnew/Layer.B.Paste]
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Enabled=1
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[pcbnew/Layer.F.Paste]
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Enabled=1
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[pcbnew/Layer.B.SilkS]
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Enabled=1
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[pcbnew/Layer.F.SilkS]
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Enabled=1
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[pcbnew/Layer.B.Mask]
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Enabled=1
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[pcbnew/Layer.F.Mask]
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Enabled=1
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[pcbnew/Layer.Dwgs.User]
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Enabled=1
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[pcbnew/Layer.Cmts.User]
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Enabled=1
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[pcbnew/Layer.Eco1.User]
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Enabled=1
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[pcbnew/Layer.Eco2.User]
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Enabled=1
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[pcbnew/Layer.Edge.Cuts]
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Enabled=1
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[pcbnew/Layer.Margin]
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Enabled=1
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[pcbnew/Layer.B.CrtYd]
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Enabled=1
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[pcbnew/Layer.F.CrtYd]
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Enabled=1
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[pcbnew/Layer.B.Fab]
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Enabled=1
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[pcbnew/Layer.F.Fab]
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Enabled=1
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[pcbnew/Layer.Rescue]
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Enabled=0
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[pcbnew/Netclasses]
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[pcbnew/Netclasses/Default]
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Name=Default
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Clearance=0.2
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TrackWidth=0.25
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ViaDiameter=0.8
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ViaDrill=0.4
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uViaDiameter=0.3
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uViaDrill=0.1
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dPairWidth=0.2
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dPairGap=0.25
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dPairViaGap=0.25
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[pcbnew/Netclasses/1]
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Name=power_big
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Clearance=0.2
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TrackWidth=0.4
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ViaDiameter=0.8
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ViaDrill=0.4
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uViaDiameter=0.3
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uViaDrill=0.1
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dPairWidth=0.2
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dPairGap=0.25
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dPairViaGap=0.25
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[pcbnew/Netclasses/2]
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Name=power_small
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Clearance=0.2
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TrackWidth=0.3
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ViaDiameter=0.8
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ViaDrill=0.4
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uViaDiameter=0.3
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uViaDrill=0.1
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dPairWidth=0.2
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dPairGap=0.25
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dPairViaGap=0.25
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26
gpio.sch
26
gpio.sch
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@ -168,21 +168,21 @@ Wire Wire Line
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6600 4050 6600 4450
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Wire Wire Line
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6950 3700 6950 4350
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Text GLabel 5200 4400 0 50 Input ~ 0
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GPIO_S0D
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Text GLabel 5200 4500 0 50 Input ~ 0
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GPIO_S0W
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Text GLabel 5200 4800 0 50 Input ~ 0
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GPIO_S1D
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Text GLabel 5200 4900 0 50 Input ~ 0
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GPIO_S1W
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Text GLabel 5200 5150 0 50 Input ~ 0
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GPIO_S2D
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Text GLabel 5200 5250 0 50 Input ~ 0
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GPIO_S2W
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Text GLabel 5200 5500 0 50 Input ~ 0
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GPIO_S3D
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GPIO_S0D
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Text GLabel 5200 5600 0 50 Input ~ 0
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GPIO_S0W
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Text GLabel 5200 5150 0 50 Input ~ 0
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GPIO_S1D
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Text GLabel 5200 5250 0 50 Input ~ 0
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GPIO_S1W
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Text GLabel 5200 4800 0 50 Input ~ 0
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GPIO_S2D
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Text GLabel 5200 4900 0 50 Input ~ 0
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GPIO_S2W
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Text GLabel 5200 4400 0 50 Input ~ 0
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GPIO_S3D
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Text GLabel 5200 4500 0 50 Input ~ 0
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GPIO_S3W
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Text GLabel 5200 3700 0 50 Input ~ 0
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GPIO_P0D
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2
psu.sch
2
psu.sch
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@ -369,7 +369,7 @@ AR Path="/61CA98F5/6266718D" Ref="C?" Part="1"
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AR Path="/61CA9896/6266718D" Ref="C304" Part="1"
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F 0 "C304" H 4815 5896 50 0000 L CNN
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F 1 "1uF" H 4815 5805 50 0000 L CNN
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F 2 "Capacitor_SMD:C_01005_0402Metric_Pad0.57x0.30mm_HandSolder" H 4738 5700 50 0001 C CNN
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F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 4738 5700 50 0001 C CNN
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F 3 "~" H 4700 5850 50 0001 C CNN
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1 4700 5850
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1 0 0 -1
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Reference in New Issue