base bord routing done, some stuff still TODO

This commit is contained in:
Triss 2021-12-22 04:52:40 +01:00
parent 60d38466db
commit 2b56a94fe7
5 changed files with 2354 additions and 304 deletions

View File

@ -232,10 +232,10 @@ Text GLabel 10000 3900 2 50 Input ~ 0
EMERG
Wire Wire Line
10000 3900 9900 3900
Text GLabel 10000 4600 2 50 Input ~ 0
Text GLabel 10150 4600 2 50 Input ~ 0
EMERG
Wire Wire Line
10000 4600 9900 4600
10150 4600 10050 4600
$Comp
L power:+3.3VADC #PWR0105
U 1 1 61CDDF59
@ -684,7 +684,7 @@ U 1 1 61F8278D
P 3000 3100
F 0 "C105" H 3115 3146 50 0000 L CNN
F 1 "1uF" H 3115 3055 50 0000 L CNN
F 2 "Capacitor_SMD:C_01005_0402Metric_Pad0.57x0.30mm_HandSolder" H 3038 2950 50 0001 C CNN
F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 3038 2950 50 0001 C CNN
F 3 "~" H 3000 3100 50 0001 C CNN
1 3000 3100
1 0 0 -1
@ -838,7 +838,7 @@ U 1 1 620D5D7C
P 4900 2950
F 0 "C106" H 5015 2996 50 0000 L CNN
F 1 "1uF" H 5015 2905 50 0000 L CNN
F 2 "Capacitor_SMD:C_01005_0402Metric_Pad0.57x0.30mm_HandSolder" H 4938 2800 50 0001 C CNN
F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 4938 2800 50 0001 C CNN
F 3 "~" H 4900 2950 50 0001 C CNN
1 4900 2950
1 0 0 -1
@ -1111,7 +1111,7 @@ U 1 1 62397B94
P 2500 5950
F 0 "R104" V 2293 5950 50 0000 C CNN
F 1 "1k" V 2384 5950 50 0000 C CNN
F 2 "Resistor_SMD:R_01005_0402Metric_Pad0.57x0.30mm_HandSolder" V 2430 5950 50 0001 C CNN
F 2 "Resistor_SMD:R_1020_2550Metric_Pad1.33x5.20mm_HandSolder" V 2430 5950 50 0001 C CNN
F 3 "~" H 2500 5950 50 0001 C CNN
1 2500 5950
0 1 1 0
@ -1255,4 +1255,6 @@ Text Notes 4300 1550 0 50 ~ 0
Place jumper when using\nonboard RP2040 and not\nusing an external 3V3 ref\nfor analog stuff. Otherwise,\ndisconnect.
Wire Wire Line
2650 6300 2800 6300
NoConn ~ 10050 4600
NoConn ~ 9900 4600
$EndSCHEMATC

File diff suppressed because it is too large Load Diff

View File

@ -1,29 +1,10 @@
update=Sun Dec 19 05:33:33 2021
update=Tue Dec 21 00:10:30 2021
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
@ -41,3 +22,250 @@ NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.5
ViaDiameter1=0.8
ViaDrill1=0.4
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=1
[pcbnew/Layer.F.Fab]
Enabled=1
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=power_big
Clearance=0.2
TrackWidth=0.4
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=power_small
Clearance=0.2
TrackWidth=0.3
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

View File

@ -168,21 +168,21 @@ Wire Wire Line
6600 4050 6600 4450
Wire Wire Line
6950 3700 6950 4350
Text GLabel 5200 4400 0 50 Input ~ 0
GPIO_S0D
Text GLabel 5200 4500 0 50 Input ~ 0
GPIO_S0W
Text GLabel 5200 4800 0 50 Input ~ 0
GPIO_S1D
Text GLabel 5200 4900 0 50 Input ~ 0
GPIO_S1W
Text GLabel 5200 5150 0 50 Input ~ 0
GPIO_S2D
Text GLabel 5200 5250 0 50 Input ~ 0
GPIO_S2W
Text GLabel 5200 5500 0 50 Input ~ 0
GPIO_S3D
GPIO_S0D
Text GLabel 5200 5600 0 50 Input ~ 0
GPIO_S0W
Text GLabel 5200 5150 0 50 Input ~ 0
GPIO_S1D
Text GLabel 5200 5250 0 50 Input ~ 0
GPIO_S1W
Text GLabel 5200 4800 0 50 Input ~ 0
GPIO_S2D
Text GLabel 5200 4900 0 50 Input ~ 0
GPIO_S2W
Text GLabel 5200 4400 0 50 Input ~ 0
GPIO_S3D
Text GLabel 5200 4500 0 50 Input ~ 0
GPIO_S3W
Text GLabel 5200 3700 0 50 Input ~ 0
GPIO_P0D

View File

@ -369,7 +369,7 @@ AR Path="/61CA98F5/6266718D" Ref="C?" Part="1"
AR Path="/61CA9896/6266718D" Ref="C304" Part="1"
F 0 "C304" H 4815 5896 50 0000 L CNN
F 1 "1uF" H 4815 5805 50 0000 L CNN
F 2 "Capacitor_SMD:C_01005_0402Metric_Pad0.57x0.30mm_HandSolder" H 4738 5700 50 0001 C CNN
F 2 "Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder" H 4738 5700 50 0001 C CNN
F 3 "~" H 4700 5850 50 0001 C CNN
1 4700 5850
1 0 0 -1