svd generator (+ fix parser, works now)
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parent
303da594c4
commit
4a9db32d33
45
svd/svd.py
45
svd/svd.py
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@ -23,16 +23,16 @@ SvdAccess = Literal["read-only", "write-only", "read-write", "writeOnce", "read-
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class SvdSauRegion(NamedTuple):
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enabled: bool
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name: str
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enabled: bool # attribute
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name: str # attribute
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base: int
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limit: int
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access: SvdSauAccess
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class SvdSauRegionsConfig(NamedTuple):
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enabled: bool
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protectionWhenDisabled: SvdSauAccess
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enabled: bool # attribute
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protectionWhenDisabled: SvdSauAccess # attribute
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regions: Sequence[SvdSauRegion]
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@ -72,7 +72,7 @@ class SvdEnumeratedValue(NamedTuple):
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class SvdEnumeratedValues(NamedTuple):
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derivedFrom: str
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derivedFrom: str # attribute
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name: str
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usage: SvdUsage
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enumeratedValue: Sequence[SvdEnumeratedValue]
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@ -86,7 +86,7 @@ class SvdDimArrayIndex(NamedTuple):
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class SvdDimElement(NamedTuple):
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dim: int
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dimIncrement: int
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dimIndex: int
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dimIndex: str
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dimName: str
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dimArrayIndex: SvdDimArrayIndex
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@ -105,7 +105,7 @@ class SvdInterrupt(NamedTuple):
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class SvdCluster(NamedTuple):
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derivedFrom: str
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derivedFrom: str # attribute
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dimElement: SvdDimElement
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name: str
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description: str
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@ -118,8 +118,8 @@ class SvdCluster(NamedTuple):
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class SvdWriteConstraintRange(NamedTuple):
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min: int
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max: int
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minimum: int
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maximum: int
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class SvdWriteConstraint(NamedTuple):
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writeAsRead: bool
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@ -127,23 +127,16 @@ class SvdWriteConstraint(NamedTuple):
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range: SvdWriteConstraintRange
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class SvdBitRangeLsbMsb(NamedTuple):
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lsb: int
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msb: int
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class SvdBitRangeOffsetWidth(NamedTuple):
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bitOffset: int
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bitWidth: int
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SvdBitRangePattern = str
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class SvdField(NamedTuple):
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derivedFrom: str
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derivedFrom: str # attribute
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dimElement: SvdDimElement
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name: str
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description: str
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bitRange: Union[SvdBitRangeLsbMsb, SvdBitRangeOffsetWidth, SvdBitRangePattern]
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bitOffset: int
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bitWidth: int
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lsb: int
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msb: int
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bitRange: str
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access: SvdAccess
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modifiedWriteValues: SvdModifiedWriteValues
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writeConstraint: SvdWriteConstraint
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@ -152,7 +145,7 @@ class SvdField(NamedTuple):
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class SvdRegister(NamedTuple):
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derivedFrom: str
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derivedFrom: str # attribute
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dimElement: SvdDimElement
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name: str
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displayName: str
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@ -166,10 +159,12 @@ class SvdRegister(NamedTuple):
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writeConstraint: SvdWriteConstraint
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readAction: SvdReadAction
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fields: Sequence[SvdField]
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# ignoring for now because this SVD is VERY broken
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#enumeratedValues: SvdEnumeratedValues # HACK: SiFive e310x, Kendryte k210
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class SvdPeripheral(NamedTuple):
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derivedFrom: str
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derivedFrom: str # attribute
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name: str
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version: str
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description: str
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@ -203,5 +198,5 @@ class SvdDevice(NamedTuple):
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peripherals: Sequence[SvdPeripheral]
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vendorExtensions: Any
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# TODO: functions for expanding registerproperties, dimelements and derivedfrom?
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# TODO: functions for expanding/flattening registerProperties, dimElements and derivedFrom?
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@ -0,0 +1,96 @@
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import typing, collections.abc
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from svd import *
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from typing import get_type_hints
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# FIXME:
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# * peripheral registers not emitting
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def ser_one(v) -> str:
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assert v is not None
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if isinstance(v, bool): return "true" if v else "false"
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elif isinstance(v, int): return hex(v)
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elif isinstance(v, str): return v
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elif type(v) == tuple:
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return "r%dp%d" % (v[0], v[1])
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else: return None
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type2attr = {
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SvdSauRegion: {'enabled','name'},
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SvdSauRegionsConfig: {'enabled','protectionWhenDisabled'},
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SvdEnumeratedValues: {'derivedFrom'},
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SvdCluster: {'derivedFrom'},
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SvdField: {'derivedFrom'},
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SvdRegister: {'derivedFrom'},
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SvdPeripheral: {'derivedFrom'},
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}
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type2tag = {
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SvdSauRegion: 'region',
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SvdSauRegionsConfig: 'sauRegionsConfig',
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SvdCpu: 'cpu',
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SvdRegisterProperties: 'registerProperties',
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SvdEnumeratedValue: 'enumeratedValue',
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SvdEnumeratedValues: 'enumeratedValues',
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SvdDimArrayIndex: 'dimArrayIndex',
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SvdDimElement: 'dimElement',
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SvdAddressBlock: 'addressBlock',
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SvdInterrupt: 'interrupt',
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SvdCluster: 'cluster',
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SvdWriteConstraintRange: 'range',
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SvdWriteConstraint: 'writeConstraint',
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SvdField: 'field',
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SvdRegister: 'register',
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SvdPeripheral: 'peripheral',
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SvdDevice: 'device',
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}
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def gen_generic(f, svdelem, T, tag, attrs=(), extraattr="", no_outer=False):
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atdict={}
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childdict={}
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d = dict((n, svdelem.__getattribute__(n)) for n in T._fields)
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for k, v in d.items():
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if v is None: continue
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if k in attrs:
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atdict[k] = v
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else:
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childdict[k] = v
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atstr = ' '.join('%s="%s"' % (k, ser_one(v)) for k, v in atdict.items())
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if not no_outer: f.write("<%s%s%s%s>\n" % (tag, (' ' if len(atstr)+len(extraattr)>0 else ''), atstr, extraattr))
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types = get_type_hints(T)
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for k, v in childdict.items():
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if v is None: continue
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typ = types[k]
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x = ser_one(v)
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if x is None: # TODO: optimize
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if '__origin__' in typ.__dict__ and typ.__origin__ == collections.abc.Sequence:
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if len(v) > 0:
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f.write("<%s>\n" % k)
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ttt = typ.__args__[0]
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isunion = '__origin__' in ttt.__dict__ and ttt.__origin__ == typing.Union
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for x in v:
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if isunion: ttt = type(x)
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gen_generic(f, x, ttt, type2tag[ttt], type2attr.get(ttt, ()))
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f.write("</%s>\n" % k)
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else:
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noouter = typ in {SvdDimElement, SvdRegisterProperties}
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gen_generic(f, v, typ, k, type2attr.get(typ, ()), no_outer=noouter)
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else:
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f.write("<%s>%s</%s>\n"%(k, x, k))
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if not no_outer: f.write("</%s>\n" % tag)
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def generate(f, dev: SvdDevice):
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f.write("""<?xml version="1.0" encoding="utf-8"?>\n""")
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gen_generic(f, dev, SvdDevice, 'device',
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extraattr=""" schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD.xsd" """)
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@ -7,6 +7,18 @@ from svd import *
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from typing import get_type_hints
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def parse_int(s):
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if len(s) == 0: raise ValueError()
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if s.startswith('0b') or s[0] == '#':
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if 'x' in s: return s # eh
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elif s.startswith('0b'): return int(s[2:], 2)
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else: return int(s[1:], 2)
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elif s[0] == '0' and len(s) > 1 and not all(x == '0' for x in s):
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# HACK: STMicro STM32F411
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return int(s, 16)
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else: return int(s, 0)
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def parse_one(ch, t):
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k, v = None, None
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if isinstance(ch, ET.Element):
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@ -15,7 +27,6 @@ def parse_one(ch, t):
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k, v = ch
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field = get_type_hints(t)[k]
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#print("%s -> %s [%s]" %(k, v, repr(field)))
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known_types = {
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SvdDevice: parse_device,
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@ -36,20 +47,25 @@ def parse_one(ch, t):
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vv = known_types.get(field)
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if vv:
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#print("%s -> %s [%s]" %(k, v, repr(field)))
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return vv(v)
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elif isinstance(ch, ET.Element):
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v = ch.text
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#print("%s -> %s [%s]" %(k, v, repr(field)))
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if field == int:
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return int(v, 0)
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return parse_int(v)
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elif field == bool:
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assert v in {'true','false','1','0'}, ("invalid boolean value %s"%v)
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return v in {'true','1'}
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elif field == str or field.__origin__ == typing.Literal:
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return v
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elif field.__origin__ == tuple:
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if k == 'revision':
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return tuple(int(x) for x in v[1:].split('p'))
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if k == 'revision': # good enough
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if len(v) > 0 and v[0] != 'r': # HACK: ESP32
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return v
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else:
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return tuple(int(x) for x in v[1:].split('p'))
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else:
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assert False, ("unknown Tuple type %s for field %s" % (field, k))
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elif field.__origin__ == typing.Union:
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@ -127,8 +143,7 @@ def parse_addressBlock(xd): return parse_generic(xd, SvdAddressBlock, 'addressBl
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def parse_interrupt(xd): return parse_generic(xd, SvdInterrupt, 'interrupt')
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def parse_writeConstraintRange(xd): return parse_generic(xd, SvdWriteConstraintRange, 'range')
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def parse_enumeratedValue(xd): return parse_generic(xd, SvdEnumeratedValue, 'enumeratedValue')
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def parse_writeConstraint(xd):
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return parse_writeConstraint(xd, SvdWriteConstraint, 'writeConstraint')
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def parse_writeConstraint(xd): return parse_generic(xd, SvdWriteConstraint, 'writeConstraint')
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def parse_dimArrayIndex(xd): return parse_generic(xd, SvdDimArrayIndex, 'dimArrayIndex')
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@ -171,6 +186,7 @@ def parse_registers(xd) -> Sequence[Union[SvdCluster, SvdRegister]]:
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rr.append(parse_register(ch))
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else:
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assert False, ("expected cluster or register, got %s"%ch)
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return rr
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def parse_peripheral(xd) -> SvdPeripheral:
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@ -188,7 +204,18 @@ def parse_device(xd) -> SvdDevice:
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def parse(path) -> SvdDevice:
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import datetime
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#a = datetime.datetime.now()
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xmlroot = ET.parse(path).getroot()
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#b = datetime.datetime.now()
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r = parse_device(xmlroot)
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#c = datetime.datetime.now()
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return parse_device(xmlroot)
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#print("a->b:", b - a)
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#print("b->c:", c - b)
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# for NXP/MIMXRT1062: XML parsing 2s, deserialization 8s, welp
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# oh well
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return r
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