initial stuff

This commit is contained in:
Triss 2022-04-09 03:48:43 +02:00
commit 7f1c85134d
10 changed files with 5110 additions and 0 deletions

4
.gitignore vendored Normal file
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bin/
obj/
config.mk
mspbsl.log

84
Makefile Normal file
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default: all
PREFIX ?= msp430-
ifeq ($(CC),cc)
CC := gcc
endif
CC := $(PREFIX)$(CC)
OBJCOPY ?= $(PREFIX)objcopy
GDB ?= $(PREFIX)gdb
SIZE ?= $(PREFIX)size
PYTHON3 ?= python3
MCU ?= msp430fr5994
#MCU ?= msp430fr5962
CFLAGS = $(patsubst %,-I%,$(INCLUDE)) -mmcu=$(MCU) -Os \
-Werror=implicit-function-declaration -Werror=return-type \
-Werror=maybe-uninitialized \
-ffunction-sections -fdata-sections -g -ffreestanding -flto
LDFLAGS = -Wl,--cref #-Wl,--gc-sections -nostartfiles #-Wl,--print-gc-sections
SZFLAGS ?= -x --format=SysV
MSP430WARE_DIR ?= $(HOME)/ti/msp430/MSP430Ware_3_80_14_01
LIBMSP430_PATH := /usr/lib
MSPDEBUG_BIN := mspdebug
MSPDEBUG = LD_LIBRARY_PATH="$(LIBMSP430_PATH):$$LD_LIBRARY_PATH" $(MSPDEBUG_BIN) tilib
-include config.mk
MSP430WARE_DRIVER := $(MSP430WARE_DIR)/driverlib/driverlib/MSP430FR5xx_6xx
INCLUDE := include/ $(MSP430WARE_DRIVER)/
LIBSRC := cs dma eusci_a_uart gpio hspll mtif pmm sfr sysctl timer_a tlv uups wdt_a
SOURCES := $(wildcard src/*.c) $(wildcard src/*.S) \
$(patsubst %,$(MSP430WARE_DRIVER)/%.c,$(LIBSRC))
LDSCRIPT := $(MCU).ld
OBJECTS := $(patsubst $(MSP430WARE_DRIVER)/%,obj/%.o,$(patsubst src/%,obj/%.o,$(SOURCES)))
%/:
@mkdir -v "$@"
bin/main.elf: $(OBJECTS) $(LDSCRIPT)
@[ -d bin/ ] || mkdir -vp "bin/"
$(CC) -o "$@" $(OBJECTS) $(CFLAGS) $(LDFLAGS) -T $(LDSCRIPT) "-Wl,-Map=$@.map"
@$(SIZE) $(SZFLAGS) "$@"
bin/main.bin: bin/main.elf
$(OBJCOPY) -O binary "$<" "$@"
obj/%.o: src/%
@[ -d obj/ ] || mkdir -vp "obj/"
$(CC) -c -o "$@" "$<" $(CFLAGS)
obj/%.o: $(MSP430WARE_DRIVER)/%
@[ -d obj/ ] || mkdir -vp "obj/"
$(CC) -c -o "$@" "$<" $(CFLAGS)
all: bin/main.bin
clean:
@$(RM) -v bin/* obj/*
mspdebug:
$(MSPDEBUG)
load: bin/main.elf
$(MSPDEBUG) reset 'load bin/main.elf' reset
dbg: bin/main.elf
$(MSPDEBUG) reset 'load bin/main.elf' 'sym import bin/main.elf' 'gdb 3333' run
gdb: bin/main.elf
$(GDB) -ex 'target remote localhost:3333' bin/main.elf
.PHONY: default all clean hogs

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include/compiler.h Normal file
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#ifndef COMPILER_H_
#define COMPILER_H_
#ifdef __GNUC__
#define MEMORY_BARRIER() asm volatile("":::"memory")
#define INTERRUPT(x) __attribute__((__interrupt__(x)))
#define force_inline __attribute__((__force_inline__))
#else
// TODO...
#define MEMORY_BARRIER() asm("") /* idk */
#define INTERRUPT(x) __interrupt
int iprintf(const char* fmt, ...);
#define __builtin_unreachable() do{int* a =NULL; (void)*a;}while(1)
#define force_inline
#endif
#endif

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logtracer.py Executable file
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#!/usr/bin/env python3
import datetime
import serial
import sys
from typing import *
class Rec(NamedTuple):
cycle: int
pc: int
sp: int
sr: int
gp: List[int]
stack: List[int]
def __str__(self):
a = "cycle: %d" % self.cycle
b = "pc = %05x sp = %05x sr = %03x" % (self.pc, self.sp, self.sr)
gp1 = " ".join(("%sr%d: %05x" % ((" " if d < 6 else ""), d+4, self.gp[d])) for d in range(6))
gp2 = " ".join(("%sr%d: %05x" % ((" " if d < 6 else ""), d+4, self.gp[d])) for d in range(6,12))
stack = " ".join("%02x"%x for x in self.stack)
return '\n'.join([a, b, gp1, gp2, stack])
def __eq__(self, other):
if self.pc != other.pc: return False
if self.sp != other.sp: return False
if self.sr != other.sr: return False
if any(self.gp[x] != other.gp[x] for x in range(12)): return False
if any(self.stack[x] != other.stack[x] for x in range(16)): return False
return True
def __ne__(self, other):
if self.pc != other.pc: return True
if self.sp != other.sp: return True
if self.sr != other.sr: return True
if any(self.gp[x] != other.gp[x] for x in range(12)): return True
if any(self.stack[x] != other.stack[x] for x in range(16)): return True
return False
with serial.Serial(sys.argv[1] if len(sys.argv) > 1 else "/dev/ttyACM1", 9600, timeout=120) as ser:
with open("mspbsl.log", "w") as log:
recs = []
while True:
l = ser.readline().strip()
if b"hello world!" in l:
break
while True:
l = []
while len(l) == 0:
l = ser.readline().strip().decode('utf-8')
if len(l) == 0: continue
ticks = int(l[2:])
pcspsr = ser.readline().strip().decode('utf-8').split()
assert len(pcspsr) == 3
r4to15 = ser.readline().strip().decode('utf-8').split()
assert len(r4to15) == 12
stack = ser.readline().strip().decode('utf-8').split()
assert len(stack) == 16
pc = int(pcspsr[0], 16)
sp = int(pcspsr[1], 16)
sr = int(pcspsr[2], 16)
gp = [int(r4to15[i],16) for i in range(12)]
stack = [int(x,16) for x in stack]
rec = Rec(ticks, pc, sp, sr, gp, stack)
if len(recs) == 0 or rec != recs[-1]:
lstr = '-----\n%s' % str(rec)
log.write(lstr)
print(lstr)
recs.append(rec)
"""
ticks: 399
pc: 01712 sp: 03bfc sr: 00c
r4: 00123 r5: 01234 r6: 02345 r7: 03456 r8: 04567 r9: 05678
r10: 06789 r11: 0789a r12: 089ab r13: 09abc r14: 03bfc r15: 01c54
stack:
"""

484
msp430fr5962.ld Normal file
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/* ============================================================================ */
/* Copyright (c) 2021, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430FR5962 devices. */
/* Version: 1.212 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
TINYRAM : ORIGIN = 0x000A, LENGTH = 0x0016 /* END=0x001F, size 22 */
BSL : ORIGIN = 0x1000, LENGTH = 0x0800 /* END=0x17FF, size 2048 */
RAM : ORIGIN = 0x1C00, LENGTH = 0x2000 /* END=0x3BFF, size 8192 */
INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
FRAM (rx) : ORIGIN = 0x4000, LENGTH = 0xBF80 /* END=0xFF7F, size 49024 */
HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00013FF7 /* Boundaries changed to fix CPU47 */
JTAGSIGNATURE : ORIGIN = 0xFF80, LENGTH = 0x0004
BSLSIGNATURE : ORIGIN = 0xFF84, LENGTH = 0x0004
IPESIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0008
VECT0 : ORIGIN = 0xFF90, LENGTH = 0x0002
VECT1 : ORIGIN = 0xFF92, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFF94, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFF96, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFF98, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFF9A, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFF9C, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFF9E, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFFA0, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFFA2, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFFA4, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFFA6, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFFA8, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFFAA, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFFAC, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFFAE, LENGTH = 0x0002
VECT16 : ORIGIN = 0xFFB0, LENGTH = 0x0002
VECT17 : ORIGIN = 0xFFB2, LENGTH = 0x0002
VECT18 : ORIGIN = 0xFFB4, LENGTH = 0x0002
VECT19 : ORIGIN = 0xFFB6, LENGTH = 0x0002
VECT20 : ORIGIN = 0xFFB8, LENGTH = 0x0002
VECT21 : ORIGIN = 0xFFBA, LENGTH = 0x0002
VECT22 : ORIGIN = 0xFFBC, LENGTH = 0x0002
VECT23 : ORIGIN = 0xFFBE, LENGTH = 0x0002
VECT24 : ORIGIN = 0xFFC0, LENGTH = 0x0002
VECT25 : ORIGIN = 0xFFC2, LENGTH = 0x0002
VECT26 : ORIGIN = 0xFFC4, LENGTH = 0x0002
VECT27 : ORIGIN = 0xFFC6, LENGTH = 0x0002
VECT28 : ORIGIN = 0xFFC8, LENGTH = 0x0002
VECT29 : ORIGIN = 0xFFCA, LENGTH = 0x0002
VECT30 : ORIGIN = 0xFFCC, LENGTH = 0x0002
VECT31 : ORIGIN = 0xFFCE, LENGTH = 0x0002
VECT32 : ORIGIN = 0xFFD0, LENGTH = 0x0002
VECT33 : ORIGIN = 0xFFD2, LENGTH = 0x0002
VECT34 : ORIGIN = 0xFFD4, LENGTH = 0x0002
VECT35 : ORIGIN = 0xFFD6, LENGTH = 0x0002
VECT36 : ORIGIN = 0xFFD8, LENGTH = 0x0002
VECT37 : ORIGIN = 0xFFDA, LENGTH = 0x0002
VECT38 : ORIGIN = 0xFFDC, LENGTH = 0x0002
VECT39 : ORIGIN = 0xFFDE, LENGTH = 0x0002
VECT40 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT41 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT42 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT43 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT44 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT45 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT46 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT47 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT48 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT49 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT50 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT51 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT52 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT53 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT54 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
.jtagsignature : {} > JTAGSIGNATURE
.bslsignature : {} > BSLSIGNATURE
.ipe :
{
KEEP (*(.ipesignature))
KEEP (*(.jtagpassword))
} > IPESIGNATURE
__interrupt_vector_0 : { KEEP (*(__interrupt_vector_0 )) } > VECT0
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15
__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16
__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17
__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) } > VECT18
__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_port8)) } > VECT19
__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_port7)) } > VECT20
__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_eusci_b3)) } > VECT21
__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_eusci_b2)) } > VECT22
__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_eusci_b1)) } > VECT23
__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_eusci_a3)) } > VECT24
__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_eusci_a2)) } > VECT25
__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_port6)) } > VECT26
__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_port5)) } > VECT27
__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_timer4_a1)) } > VECT28
__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_timer4_a0)) } > VECT29
__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_aes256)) } > VECT30
__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_rtc_c)) } > VECT31
__interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_port4)) } > VECT32
__interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_port3)) } > VECT33
__interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT34
__interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT35
__interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_port2)) } > VECT36
__interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT37
__interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT38
__interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_port1)) } > VECT39
__interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT40
__interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT41
__interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_dma)) } > VECT42
__interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_eusci_a1)) } > VECT43
__interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT44
__interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT45
__interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_adc12_b)) } > VECT46
__interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_eusci_b0)) } > VECT47
__interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_eusci_a0)) } > VECT48
__interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_wdt)) } > VECT49
__interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT50
__interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT51
__interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_comp_e)) } > VECT52
__interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_unmi)) } > VECT53
__interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT54
__reset_vector :
{
KEEP (*(__interrupt_vector_55))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.lower.rodata :
{
. = ALIGN(2);
*(.lower.rodata.* .lower.rodata)
} > FRAM
.rodata :
{
. = ALIGN(2);
*(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > FRAM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(2);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(2);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from the crtend.o
file until after the sorted ctors. The .ctor section from
the crtend file contains the end of ctors marker and it must
be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > FRAM
.upper.rodata :
{
*(.upper.rodata.* .upper.rodata)
} > HIFRAM
/* This section contains data that is initialised during load
but not on application reset. */
.persistent :
{
. = ALIGN(2);
PROVIDE (__persistent_start = .);
*(.persistent)
. = ALIGN(2);
PROVIDE (__persistent_end = .);
} > FRAM
.tinyram : {} > TINYRAM
.lower.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
*(.lower.data.* .lower.data)
} > RAM AT> FRAM
.data :
{
. = ALIGN(2);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT> FRAM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.lower.data));
PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));
.upper.data :
{
__upper_data_init = LOADADDR (.upper.data);
/* Status word. */
SHORT(1);
__high_datastart = .;
*(.upper.data.* .upper.data)
__high_dataend = .;
} > HIFRAM AT> FRAM
__rom_highdatacopysize = SIZEOF(.upper.data) - 2;
__rom_highdatastart = LOADADDR(.upper.data) + 2;
.lower.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.lower.bss.* .lower.bss)
} > RAM
.bss :
{
. = ALIGN(2);
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));
.upper.bss :
{
. = ALIGN(2);
__high_bssstart = .;
*(.upper.bss.* .upper.bss)
. = ALIGN(2);
__high_bssend = .;
} > HIFRAM
__high_bsssize = SIZEOF(.upper.bss);
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
.lower.text :
{
. = ALIGN(2);
*(.lower.text.* .lower.text)
} > FRAM
.text :
{
PROVIDE (_start = .);
. = ALIGN(2);
KEEP (*(SORT(.crt_*)))
. = ALIGN(2);
KEEP (*(.lowtext))
. = ALIGN(2);
*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > FRAM
.upper.text :
{
. = ALIGN(2);
*(.upper.text.* .upper.text)
} > HIFRAM
.infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB (NOLOAD) : {} > INFOB
.infoC (NOLOAD) : {} > INFOC
.infoD (NOLOAD) : {} > INFOD
/* The rest are all not normally part of the runtime image. */
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1. */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions. */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2. */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2. */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions. */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE msp430fr5962_symbols.ld

1801
msp430fr5962_symbols.ld Normal file

File diff suppressed because it is too large Load Diff

487
msp430fr5994.ld Normal file
View File

@ -0,0 +1,487 @@
/* ============================================================================ */
/* Copyright (c) 2021, Texas Instruments Incorporated */
/* All rights reserved. */
/* */
/* Redistribution and use in source and binary forms, with or without */
/* modification, are permitted provided that the following conditions */
/* are met: */
/* */
/* * Redistributions of source code must retain the above copyright */
/* notice, this list of conditions and the following disclaimer. */
/* */
/* * Redistributions in binary form must reproduce the above copyright */
/* notice, this list of conditions and the following disclaimer in the */
/* documentation and/or other materials provided with the distribution. */
/* */
/* * Neither the name of Texas Instruments Incorporated nor the names of */
/* its contributors may be used to endorse or promote products derived */
/* from this software without specific prior written permission. */
/* */
/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
/* ============================================================================ */
/* This file supports MSP430FR5994 devices. */
/* Version: 1.212 */
/* Default linker script, for normal executables */
OUTPUT_ARCH(msp430)
ENTRY(_start)
MEMORY {
TINYRAM : ORIGIN = 0x000A, LENGTH = 0x0016 /* END=0x001F, size 22 */
BSL : ORIGIN = 0x1000, LENGTH = 0x0800 /* END=0x17FF, size 2048 */
RAM : ORIGIN = 0x1C00, LENGTH = 0x1000 /* END=0x2BFF, size 4096 */
LEARAM : ORIGIN = 0x2C00, LENGTH = 0x0EC8 /* END=0x3AC7, size 3784 */
LEASTACK : ORIGIN = 0x3AC8, LENGTH = 0x0138 /* END=0x3BFF, size 312 */
INFOMEM : ORIGIN = 0x1800, LENGTH = 0x0200 /* END=0x19FF, size 512 as 4 128-byte segments */
INFOA : ORIGIN = 0x1980, LENGTH = 0x0080 /* END=0x19FF, size 128 */
INFOB : ORIGIN = 0x1900, LENGTH = 0x0080 /* END=0x197F, size 128 */
INFOC : ORIGIN = 0x1880, LENGTH = 0x0080 /* END=0x18FF, size 128 */
INFOD : ORIGIN = 0x1800, LENGTH = 0x0080 /* END=0x187F, size 128 */
FRAM (rx) : ORIGIN = 0x4000, LENGTH = 0xBF80 /* END=0xFF7F, size 49024 */
HIFRAM (rxw) : ORIGIN = 0x00010000, LENGTH = 0x00033FF7 /* Boundaries changed to fix CPU47 */
JTAGSIGNATURE : ORIGIN = 0xFF80, LENGTH = 0x0004
BSLSIGNATURE : ORIGIN = 0xFF84, LENGTH = 0x0004
IPESIGNATURE : ORIGIN = 0xFF88, LENGTH = 0x0008
VECT0 : ORIGIN = 0xFF90, LENGTH = 0x0002
VECT1 : ORIGIN = 0xFF92, LENGTH = 0x0002
VECT2 : ORIGIN = 0xFF94, LENGTH = 0x0002
VECT3 : ORIGIN = 0xFF96, LENGTH = 0x0002
VECT4 : ORIGIN = 0xFF98, LENGTH = 0x0002
VECT5 : ORIGIN = 0xFF9A, LENGTH = 0x0002
VECT6 : ORIGIN = 0xFF9C, LENGTH = 0x0002
VECT7 : ORIGIN = 0xFF9E, LENGTH = 0x0002
VECT8 : ORIGIN = 0xFFA0, LENGTH = 0x0002
VECT9 : ORIGIN = 0xFFA2, LENGTH = 0x0002
VECT10 : ORIGIN = 0xFFA4, LENGTH = 0x0002
VECT11 : ORIGIN = 0xFFA6, LENGTH = 0x0002
VECT12 : ORIGIN = 0xFFA8, LENGTH = 0x0002
VECT13 : ORIGIN = 0xFFAA, LENGTH = 0x0002
VECT14 : ORIGIN = 0xFFAC, LENGTH = 0x0002
VECT15 : ORIGIN = 0xFFAE, LENGTH = 0x0002
VECT16 : ORIGIN = 0xFFB0, LENGTH = 0x0002
VECT17 : ORIGIN = 0xFFB2, LENGTH = 0x0002
VECT18 : ORIGIN = 0xFFB4, LENGTH = 0x0002
VECT19 : ORIGIN = 0xFFB6, LENGTH = 0x0002
VECT20 : ORIGIN = 0xFFB8, LENGTH = 0x0002
VECT21 : ORIGIN = 0xFFBA, LENGTH = 0x0002
VECT22 : ORIGIN = 0xFFBC, LENGTH = 0x0002
VECT23 : ORIGIN = 0xFFBE, LENGTH = 0x0002
VECT24 : ORIGIN = 0xFFC0, LENGTH = 0x0002
VECT25 : ORIGIN = 0xFFC2, LENGTH = 0x0002
VECT26 : ORIGIN = 0xFFC4, LENGTH = 0x0002
VECT27 : ORIGIN = 0xFFC6, LENGTH = 0x0002
VECT28 : ORIGIN = 0xFFC8, LENGTH = 0x0002
VECT29 : ORIGIN = 0xFFCA, LENGTH = 0x0002
VECT30 : ORIGIN = 0xFFCC, LENGTH = 0x0002
VECT31 : ORIGIN = 0xFFCE, LENGTH = 0x0002
VECT32 : ORIGIN = 0xFFD0, LENGTH = 0x0002
VECT33 : ORIGIN = 0xFFD2, LENGTH = 0x0002
VECT34 : ORIGIN = 0xFFD4, LENGTH = 0x0002
VECT35 : ORIGIN = 0xFFD6, LENGTH = 0x0002
VECT36 : ORIGIN = 0xFFD8, LENGTH = 0x0002
VECT37 : ORIGIN = 0xFFDA, LENGTH = 0x0002
VECT38 : ORIGIN = 0xFFDC, LENGTH = 0x0002
VECT39 : ORIGIN = 0xFFDE, LENGTH = 0x0002
VECT40 : ORIGIN = 0xFFE0, LENGTH = 0x0002
VECT41 : ORIGIN = 0xFFE2, LENGTH = 0x0002
VECT42 : ORIGIN = 0xFFE4, LENGTH = 0x0002
VECT43 : ORIGIN = 0xFFE6, LENGTH = 0x0002
VECT44 : ORIGIN = 0xFFE8, LENGTH = 0x0002
VECT45 : ORIGIN = 0xFFEA, LENGTH = 0x0002
VECT46 : ORIGIN = 0xFFEC, LENGTH = 0x0002
VECT47 : ORIGIN = 0xFFEE, LENGTH = 0x0002
VECT48 : ORIGIN = 0xFFF0, LENGTH = 0x0002
VECT49 : ORIGIN = 0xFFF2, LENGTH = 0x0002
VECT50 : ORIGIN = 0xFFF4, LENGTH = 0x0002
VECT51 : ORIGIN = 0xFFF6, LENGTH = 0x0002
VECT52 : ORIGIN = 0xFFF8, LENGTH = 0x0002
VECT53 : ORIGIN = 0xFFFA, LENGTH = 0x0002
VECT54 : ORIGIN = 0xFFFC, LENGTH = 0x0002
RESETVEC : ORIGIN = 0xFFFE, LENGTH = 0x0002
}
SECTIONS
{
.leaRAM : {} > LEARAM
.jtagsignature : {} > JTAGSIGNATURE
.bslsignature : {} > BSLSIGNATURE
.ipe :
{
KEEP (*(.ipesignature))
KEEP (*(.jtagpassword))
} > IPESIGNATURE
__interrupt_vector_0 : { KEEP (*(__interrupt_vector_0 )) } > VECT0
__interrupt_vector_1 : { KEEP (*(__interrupt_vector_1 )) } > VECT1
__interrupt_vector_2 : { KEEP (*(__interrupt_vector_2 )) } > VECT2
__interrupt_vector_3 : { KEEP (*(__interrupt_vector_3 )) } > VECT3
__interrupt_vector_4 : { KEEP (*(__interrupt_vector_4 )) } > VECT4
__interrupt_vector_5 : { KEEP (*(__interrupt_vector_5 )) } > VECT5
__interrupt_vector_6 : { KEEP (*(__interrupt_vector_6 )) } > VECT6
__interrupt_vector_7 : { KEEP (*(__interrupt_vector_7 )) } > VECT7
__interrupt_vector_8 : { KEEP (*(__interrupt_vector_8 )) } > VECT8
__interrupt_vector_9 : { KEEP (*(__interrupt_vector_9 )) } > VECT9
__interrupt_vector_10 : { KEEP (*(__interrupt_vector_10)) } > VECT10
__interrupt_vector_11 : { KEEP (*(__interrupt_vector_11)) } > VECT11
__interrupt_vector_12 : { KEEP (*(__interrupt_vector_12)) } > VECT12
__interrupt_vector_13 : { KEEP (*(__interrupt_vector_13)) } > VECT13
__interrupt_vector_14 : { KEEP (*(__interrupt_vector_14)) } > VECT14
__interrupt_vector_15 : { KEEP (*(__interrupt_vector_15)) } > VECT15
__interrupt_vector_16 : { KEEP (*(__interrupt_vector_16)) } > VECT16
__interrupt_vector_17 : { KEEP (*(__interrupt_vector_17)) } > VECT17
__interrupt_vector_18 : { KEEP (*(__interrupt_vector_18)) KEEP (*(__interrupt_vector_lea)) } > VECT18
__interrupt_vector_19 : { KEEP (*(__interrupt_vector_19)) KEEP (*(__interrupt_vector_port8)) } > VECT19
__interrupt_vector_20 : { KEEP (*(__interrupt_vector_20)) KEEP (*(__interrupt_vector_port7)) } > VECT20
__interrupt_vector_21 : { KEEP (*(__interrupt_vector_21)) KEEP (*(__interrupt_vector_eusci_b3)) } > VECT21
__interrupt_vector_22 : { KEEP (*(__interrupt_vector_22)) KEEP (*(__interrupt_vector_eusci_b2)) } > VECT22
__interrupt_vector_23 : { KEEP (*(__interrupt_vector_23)) KEEP (*(__interrupt_vector_eusci_b1)) } > VECT23
__interrupt_vector_24 : { KEEP (*(__interrupt_vector_24)) KEEP (*(__interrupt_vector_eusci_a3)) } > VECT24
__interrupt_vector_25 : { KEEP (*(__interrupt_vector_25)) KEEP (*(__interrupt_vector_eusci_a2)) } > VECT25
__interrupt_vector_26 : { KEEP (*(__interrupt_vector_26)) KEEP (*(__interrupt_vector_port6)) } > VECT26
__interrupt_vector_27 : { KEEP (*(__interrupt_vector_27)) KEEP (*(__interrupt_vector_port5)) } > VECT27
__interrupt_vector_28 : { KEEP (*(__interrupt_vector_28)) KEEP (*(__interrupt_vector_timer4_a1)) } > VECT28
__interrupt_vector_29 : { KEEP (*(__interrupt_vector_29)) KEEP (*(__interrupt_vector_timer4_a0)) } > VECT29
__interrupt_vector_30 : { KEEP (*(__interrupt_vector_30)) KEEP (*(__interrupt_vector_aes256)) } > VECT30
__interrupt_vector_31 : { KEEP (*(__interrupt_vector_31)) KEEP (*(__interrupt_vector_rtc_c)) } > VECT31
__interrupt_vector_32 : { KEEP (*(__interrupt_vector_32)) KEEP (*(__interrupt_vector_port4)) } > VECT32
__interrupt_vector_33 : { KEEP (*(__interrupt_vector_33)) KEEP (*(__interrupt_vector_port3)) } > VECT33
__interrupt_vector_34 : { KEEP (*(__interrupt_vector_34)) KEEP (*(__interrupt_vector_timer3_a1)) } > VECT34
__interrupt_vector_35 : { KEEP (*(__interrupt_vector_35)) KEEP (*(__interrupt_vector_timer3_a0)) } > VECT35
__interrupt_vector_36 : { KEEP (*(__interrupt_vector_36)) KEEP (*(__interrupt_vector_port2)) } > VECT36
__interrupt_vector_37 : { KEEP (*(__interrupt_vector_37)) KEEP (*(__interrupt_vector_timer2_a1)) } > VECT37
__interrupt_vector_38 : { KEEP (*(__interrupt_vector_38)) KEEP (*(__interrupt_vector_timer2_a0)) } > VECT38
__interrupt_vector_39 : { KEEP (*(__interrupt_vector_39)) KEEP (*(__interrupt_vector_port1)) } > VECT39
__interrupt_vector_40 : { KEEP (*(__interrupt_vector_40)) KEEP (*(__interrupt_vector_timer1_a1)) } > VECT40
__interrupt_vector_41 : { KEEP (*(__interrupt_vector_41)) KEEP (*(__interrupt_vector_timer1_a0)) } > VECT41
__interrupt_vector_42 : { KEEP (*(__interrupt_vector_42)) KEEP (*(__interrupt_vector_dma)) } > VECT42
__interrupt_vector_43 : { KEEP (*(__interrupt_vector_43)) KEEP (*(__interrupt_vector_eusci_a1)) } > VECT43
__interrupt_vector_44 : { KEEP (*(__interrupt_vector_44)) KEEP (*(__interrupt_vector_timer0_a1)) } > VECT44
__interrupt_vector_45 : { KEEP (*(__interrupt_vector_45)) KEEP (*(__interrupt_vector_timer0_a0)) } > VECT45
__interrupt_vector_46 : { KEEP (*(__interrupt_vector_46)) KEEP (*(__interrupt_vector_adc12_b)) } > VECT46
__interrupt_vector_47 : { KEEP (*(__interrupt_vector_47)) KEEP (*(__interrupt_vector_eusci_b0)) } > VECT47
__interrupt_vector_48 : { KEEP (*(__interrupt_vector_48)) KEEP (*(__interrupt_vector_eusci_a0)) } > VECT48
__interrupt_vector_49 : { KEEP (*(__interrupt_vector_49)) KEEP (*(__interrupt_vector_wdt)) } > VECT49
__interrupt_vector_50 : { KEEP (*(__interrupt_vector_50)) KEEP (*(__interrupt_vector_timer0_b1)) } > VECT50
__interrupt_vector_51 : { KEEP (*(__interrupt_vector_51)) KEEP (*(__interrupt_vector_timer0_b0)) } > VECT51
__interrupt_vector_52 : { KEEP (*(__interrupt_vector_52)) KEEP (*(__interrupt_vector_comp_e)) } > VECT52
__interrupt_vector_53 : { KEEP (*(__interrupt_vector_53)) KEEP (*(__interrupt_vector_unmi)) } > VECT53
__interrupt_vector_54 : { KEEP (*(__interrupt_vector_54)) KEEP (*(__interrupt_vector_sysnmi)) } > VECT54
__reset_vector :
{
KEEP (*(__interrupt_vector_55))
KEEP (*(__interrupt_vector_reset))
KEEP (*(.resetvec))
} > RESETVEC
.lower.rodata :
{
. = ALIGN(2);
*(.lower.rodata.* .lower.rodata)
} > FRAM
.rodata :
{
. = ALIGN(2);
*(.plt)
*(.rodata .rodata.* .gnu.linkonce.r.* .const .const:*)
*(.rodata1)
KEEP (*(.gcc_except_table)) *(.gcc_except_table.*)
} > FRAM
/* Note: This is a separate .rodata section for sections which are
read only but which older linkers treat as read-write.
This prevents older linkers from marking the entire .rodata
section as read-write. */
.rodata2 :
{
. = ALIGN(2);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
. = ALIGN(2);
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
. = ALIGN(2);
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
. = ALIGN(2);
*(.eh_frame_hdr)
KEEP (*(.eh_frame))
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin*.o(.ctors))
/* We don't want to include the .ctor section from the crtend.o
file until after the sorted ctors. The .ctor section from
the crtend file contains the end of ctors marker and it must
be last */
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
KEEP (*crtbegin*.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} > FRAM
.upper.rodata :
{
*(.upper.rodata.* .upper.rodata)
} > HIFRAM
/* This section contains data that is initialised during load
but not on application reset. */
.persistent :
{
. = ALIGN(2);
PROVIDE (__persistent_start = .);
*(.persistent)
. = ALIGN(2);
PROVIDE (__persistent_end = .);
} > FRAM
.tinyram : {} > TINYRAM
.lower.data :
{
. = ALIGN(2);
PROVIDE (__datastart = .);
*(.lower.data.* .lower.data)
} > RAM AT> FRAM
.data :
{
. = ALIGN(2);
KEEP (*(.jcr))
*(.data.rel.ro.local) *(.data.rel.ro*)
*(.dynamic)
*(.data .data.* .gnu.linkonce.d.*)
KEEP (*(.gnu.linkonce.d.*personality*))
SORT(CONSTRUCTORS)
*(.data1)
*(.got.plt) *(.got)
/* We want the small data sections together, so single-instruction offsets
can access them all, and initialized data all before uninitialized, so
we can shorten the on-disk segment size. */
. = ALIGN(2);
*(.sdata .sdata.* .gnu.linkonce.s.* D_2 D_1)
. = ALIGN(2);
_edata = .;
PROVIDE (edata = .);
PROVIDE (__dataend = .);
} > RAM AT> FRAM
/* Note that crt0 assumes this is a multiple of two; all the
start/stop symbols are also assumed word-aligned. */
PROVIDE(__romdatastart = LOADADDR(.lower.data));
PROVIDE (__romdatacopysize = SIZEOF(.lower.data) + SIZEOF(.data));
.upper.data :
{
__upper_data_init = LOADADDR (.upper.data);
/* Status word. */
SHORT(1);
__high_datastart = .;
*(.upper.data.* .upper.data)
__high_dataend = .;
} > HIFRAM AT> FRAM
__rom_highdatacopysize = SIZEOF(.upper.data) - 2;
__rom_highdatastart = LOADADDR(.upper.data) + 2;
.lower.bss :
{
. = ALIGN(2);
PROVIDE (__bssstart = .);
*(.lower.bss.* .lower.bss)
} > RAM
.bss :
{
. = ALIGN(2);
*(.dynbss)
*(.sbss .sbss.*)
*(.bss .bss.* .gnu.linkonce.b.*)
. = ALIGN(2);
*(COMMON)
PROVIDE (__bssend = .);
} > RAM
PROVIDE (__bsssize = SIZEOF(.lower.bss) + SIZEOF(.bss));
.upper.bss :
{
. = ALIGN(2);
__high_bssstart = .;
*(.upper.bss.* .upper.bss)
. = ALIGN(2);
__high_bssend = .;
} > HIFRAM
__high_bsssize = SIZEOF(.upper.bss);
/* This section contains data that is not initialised during load
or application reset. */
.noinit (NOLOAD) :
{
. = ALIGN(2);
PROVIDE (__noinit_start = .);
*(.noinit)
. = ALIGN(2);
PROVIDE (__noinit_end = .);
} > RAM
/* We create this section so that "end" will always be in the
RAM region (matching .stack below), even if the .bss
section is empty. */
.heap (NOLOAD) :
{
. = ALIGN(2);
__heap_start__ = .;
_end = __heap_start__;
PROVIDE (end = .);
KEEP (*(.heap))
_end = .;
PROVIDE (end = .);
/* This word is here so that the section is not empty, and thus
not discarded by the linker. The actual value does not matter
and is ignored. */
LONG(0);
__heap_end__ = .;
__HeapLimit = __heap_end__;
} > RAM
/* WARNING: Do not place anything in RAM here.
The heap section must be the last section in RAM and the stack
section must be placed at the very end of the RAM region. */
.stack (ORIGIN (RAM) + LENGTH(RAM)) :
{
PROVIDE (__stack = .);
*(.stack)
}
.lower.text :
{
. = ALIGN(2);
*(.lower.text.* .lower.text)
} > FRAM
.text :
{
PROVIDE (_start = .);
. = ALIGN(2);
KEEP (*(SORT(.crt_*)))
. = ALIGN(2);
KEEP (*(.lowtext))
. = ALIGN(2);
*(.text .stub .text.* .gnu.linkonce.t.* .text:*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.interp .hash .dynsym .dynstr .gnu.version*)
PROVIDE (__etext = .);
PROVIDE (_etext = .);
PROVIDE (etext = .);
. = ALIGN(2);
KEEP (*(.init))
KEEP (*(.fini))
KEEP (*(.tm_clone_table))
} > FRAM
.upper.text :
{
. = ALIGN(2);
*(.upper.text.* .upper.text)
} > HIFRAM
.infoA (NOLOAD) : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */
.infoB (NOLOAD) : {} > INFOB
.infoC (NOLOAD) : {} > INFOC
.infoD (NOLOAD) : {} > INFOD
/* The rest are all not normally part of the runtime image. */
.MSP430.attributes 0 :
{
KEEP (*(.MSP430.attributes))
KEEP (*(.gnu.attributes))
KEEP (*(__TI_build_attributes))
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1. */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions. */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2. */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2. */
.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line .debug_line.* .debug_line_end ) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions. */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
/* DWARF 3 */
.debug_pubtypes 0 : { *(.debug_pubtypes) }
.debug_ranges 0 : { *(.debug_ranges) }
/* DWARF Extension. */
.debug_macro 0 : { *(.debug_macro) }
/DISCARD/ : { *(.note.GNU-stack) }
}
/****************************************************************************/
/* Include peripherals memory map */
/****************************************************************************/
INCLUDE msp430fr5994_symbols.ld

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#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <msp430.h>
#include "compiler.h"
void stdio_msp_init(void); // stdio_msp.c
static void setup_clocks(void) {
CSCTL0_H = CSKEY_H;
CSCTL1 = DCOFSEL_0/*3*/ | DCORSEL;
CSCTL2 = SELA__VLOCLK | SELS__DCOCLK | SELM__DCOCLK;
CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1;
CSCTL0_H = 0;
}
static void setup_io(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop WDT
// Configure GPIO
P2SEL0 &= ~(BIT0 | BIT1); // port 2.[01] to eUSCI_A0
P2SEL1 |= BIT0 | BIT1;
P1OUT &= ~(BIT0|BIT1|BIT2|BIT3); // P1.[0-3]: status LED and LA trigger debug stuff
P1DIR |= (BIT0|BIT1|BIT2|BIT3);
PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode
// to activate previously configured port settings
}
// ---
__attribute__((__persistent__)) // put in FRAM (BSL clears RAM)
static uint32_t regbak[16];
__attribute__((__persistent__))
static uint8_t stackbak[16];
__attribute__((__persistent__))
static uint16_t curticks = 1;
typedef void (*bsl_fn)(void);
void do_trace(void);
__attribute__((__no_inline__)) void do_trace(void) {
// TODO: chain 2 timers for 32 bit tick number
// TODO: continue instead of restarting?
// ^: mightn't be possible: instruction exec restarts after irq
// init timer TA0
__bic_SR_register(GIE);
TA1CCR0 = curticks;
TA1CCTL0 = CCIE;
// exec bsl
asm volatile(
"mov.a #(__stack-8), sp\n"
"mov.w #0x0000, r4\n"
"mov.w #0x0000, r5\n"
"mov.w #0x0000, r6\n"
"mov.w #0x0000, r7\n"
"mov.w #0x0000, r8\n"
"mov.w #0x0000, r9\n"
"mov.w #0x0000, r10\n"
"mov.w #0x0000, r11\n"
"mov.w #0x0000, r12\n"
"mov.w #0x0000, r13\n"
"mov.w #0x0000, r14\n"
"mov.w #0x0000, r15\n"
//TA1CTL = TASSEL__SMCLK | ID__1 | MC__UP | TACLR | TAIE;
"mov.w #0x0216, TA1CTL\n"
"eint\n"
"call #0x1000\n"
);
//while (1) ;
__builtin_unreachable();
}
void do_collect(uint16_t* sp);
__attribute__((__used__, __no_inline__))
void do_collect(uint16_t* sp) {
TA1CTL &= ~(uint16_t)(TAIE|MC__UP);
//if (curticks < 0x2380) goto next_iter;
// general purpose registers
for (int i = 0; i < 12; ++i) {
uint32_t v = sp[(i*2)+0] | ((uint32_t)sp[(i*2)+1] << 16);
regbak[i+4] = v;
}
uint16_t sr = sp[24];
uint32_t pc = sp[25];
pc |= ((uint32_t)(sr & 0xf000) << (16-12));
sr &= 0xfff;
sp = sp + 26;
regbak[0] = pc;
regbak[1] = sp;
regbak[2] = sr;
regbak[3] = 0; // cg
memcpy(stackbak, sp, 16);
// pc=r0 sp=r1 sr=r2 ; gp: r4-r15
iprintf("- %u\r\n", curticks);
iprintf("%05lx %05lx %03lx\r\n", regbak[0], regbak[1], regbak[2]);
iprintf("%05lx %05lx %05lx %05lx %05lx %05lx %05lx %05lx %05lx %05lx %05lx %05lx\r\n",
regbak[ 4], regbak[ 5], regbak[ 6], regbak[ 7], regbak[ 8], regbak[ 9],
regbak[10], regbak[11], regbak[12], regbak[13], regbak[14], regbak[15]);
iprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\r\n",
stackbak[0], stackbak[1], stackbak[2], stackbak[3],
stackbak[4], stackbak[5], stackbak[6], stackbak[7],
stackbak[8], stackbak[9], stackbak[10], stackbak[11],
stackbak[12], stackbak[13], stackbak[14], stackbak[15]);
//fflush(stdout);
next_iter:
if (curticks == 0xffff)while(1);
++curticks;
//while (1) ;
do_trace();
__builtin_unreachable();
}
__attribute__((__interrupt__(TIMER1_A0_VECTOR), __naked__))
void Timer_A0_ISR(void) {
asm volatile(
".extern do_collect\n"
"pushm.a #12, r15\n"
"mov.a sp, r12\n"
"call #do_collect\n"
"popm.a #12, r15\n"
"reti\n"
);
}
int main(void) {
setup_io();
setup_clocks();
stdio_msp_init();
memset(regbak, 0, sizeof regbak);
__bis_SR_register(GIE); // enable irq
curticks = 1;
puts("hello world!\r\n");
do_trace();
__builtin_unreachable();
}

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#include <stdbool.h>
#include <stdarg.h>
#include <stdio.h>
#include <string.h>
#include <sys/types.h>
#ifdef __GNUC__
#include <sys/stat.h>
#endif
#include <msp430.h>
#include "compiler.h"
void stdio_msp_init(void);
void stdio_msp_init(void) {
// TODO: autogen divider values?
// should match 9600 baud
UCA0CTLW0 = UCSWRST;
UCA0CTLW0 |= UCSSEL__SMCLK | (0<<9/*UART*/) | (1<<3/*dormant rx*/);
UCA0BRW = 6;
UCA0MCTLW |= UCOS16 | UCBRF_1 | 0x2080;
UCA0CTLW0 &= ~UCSWRST;
}
static void wrdata(const char* data, int size) {
// needs to work without interrupt (used in irq context)
for (; size; ++data, --size) {
while (!(UCA0IFG & UCTXIFG)) ;
UCA0TXBUF = data[0];
}
}
int write(int fd, char* data, int size) {
(void)fd;
wrdata(data, size);
return size;
}
int _close_r(int fd) { (void)fd; return 0; }
#ifdef __GNUC__
int _stat_r(char* file, struct stat* st) {
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
#endif
int _read_r(int fd, char *ptr, int len) { (void)fd; (void)ptr; (void)len; return 0; }
int _lseek_r(int fd, int ptr, int dir) { (void)fd; (void)ptr; (void)dir; return 0; }
int _isatty(int fd) { (void)fd; return 1; }
#ifdef __GNUC__
int fstat(int fd, struct stat *st) {
(void)fd;
//return _stat(NULL, st);
st->st_mode = S_IFCHR;
return 0;
}
#endif
static char buf[128];
int iprintf(const char* fmt, ...) {
va_list args;
va_start(args, fmt);
#ifdef __GNUC__
int n = vsniprintf(buf, 128, fmt, args);
#else
int n = vsnprintf(buf, 128, fmt, args);
#endif
wrdata(buf, n);
va_end(args);
return n;
}
// redefine some common stuff to shortcut things
int puts(const char* s) {
wrdata(s, strlen(s));
return 0;
}
extern void YOU_DID_SOMETHING_WRONG();
void __sfvwrite_r() {
YOU_DID_SOMETHING_WRONG();
}