fix some stuff, but still not good enough

This commit is contained in:
Triss 2022-04-15 02:06:50 +02:00
parent 53d514f247
commit b97e026d9a
3 changed files with 101 additions and 37 deletions

View File

@ -153,6 +153,17 @@ static bool uart_poll_ch(uint8_t* ch) {
return true;
}
static void flush_pio_fifo(void) {
PIO pio = PIO_UNIT;
const uint sm = PIOSM_TRIG;
pio_sm_set_enabled(pio, sm, false);
pio_sm_clear_fifos(pio, sm);
pio_sm_restart(pio, sm);
pio_sm_clkdiv_restart(pio, sm);
pio_sm_exec(pio, sm, pio_encode_jmp(off_trig));
pio_sm_set_enabled(pio, sm, true);
}
int main() {
stdio_init_all();
@ -182,7 +193,10 @@ int main() {
if (uart_poll_ch(&ch)) {
//printf("got cmd: %c\n", ch);
switch (ch) {
case '0': delay = 1; break;
case '0':
delay = 1;
flush_pio_fifo();
break;
case '+': ++delay; break;
case '-': --delay; break;
default: goto noack;

View File

@ -163,7 +163,7 @@ void do_trace(void) {
"mov.w #0xaaaa, r9\n"
"mov.w #0xaaaa, r10\n"
"mov.w #0xaaaa, r11\n"
"mov.w #0x0002, r12\n"
"mov.w #0x0000, r12\n"
"mov.w #0xdead, r13\n"
"mov.w #0xbeef, r14\n"
"mov.w #0xaaaa, r15\n"
@ -187,7 +187,7 @@ void do_trace(void) {
"nop\n"
"nop\n"
"mov.w #0x1337, r8\n"
"dint\nnop\n"
//"dint\nnop\n"
"add.w #-1, r4\n"
"add.w #1, r5\n"
"add.w #2, r6\n"
@ -212,10 +212,8 @@ void do_trace(void) {
"pushx.a #1f\n"
"push.w r12\n"
"push.w r13\n"
"mov.w #0, r12\n"
"mov.w #0xdead, r13\n"
"mov.w #0xbeef, r14\n"
"br #0x1002\n" // CHANGEME (address to trace insn flow of)
"mov.w #2, r12\n"
"br #0x1b02\n" // CHANGEME (address to trace insn flow of)
//#if !USE_NMI
"1: jmp 1b\n"
//#endif
@ -377,7 +375,11 @@ void Timer_A1_ISR(void) {
//extern const uint8_t TRAM_PAYLOAD_START[], TRAM_PAYLOAD_END[];
__attribute__((__interrupt__(UNMI_VECTOR), __naked__))
__attribute__((__interrupt__(UNMI_VECTOR), __naked__
#if USE_NMI
, __section__(".lower.data")
#endif
))
void NMI_ISR(void) {
asm volatile(
".extern Timer_A1_ISR\n"
@ -400,6 +402,54 @@ void NMI_ISR(void) {
P1OUT = ((P1OUT+1) & 15) | (P1OUT & 0xF0);*/
}
CODESP static void dma_init(void) {
STORAGE static uint16_t dmabak[(0x570-0x508)>>1];
STORAGE static uint16_t nmiie_val = NMIIE;
STORAGE static uint16_t rpcr_val = SYSRSTRE__ENABLE | SYSRSTUP__PULLUP | SYSNMIIES__FALLING | SYSNMI__NMI;
__data20_write_long((uintptr_t)&DMA0SA, (uintptr_t)dmabak);
__data20_write_long((uintptr_t)&DMA0DA, (uintptr_t)0x0508);
__data20_write_long((uintptr_t)&DMA1SA, (uintptr_t)&nmiie_val);
__data20_write_long((uintptr_t)&DMA1DA, (uintptr_t)&SFRIE1);
__data20_write_long((uintptr_t)&DMA2SA, (uintptr_t)&rpcr_val);
__data20_write_long((uintptr_t)&DMA2DA, (uintptr_t)&SFRRPCR);
__data20_write_long((uintptr_t)&DMA3SA, (uintptr_t)dmabak);
__data20_write_long((uintptr_t)&DMA3DA, (uintptr_t)0x0508);
__data20_write_long((uintptr_t)&DMA4SA, (uintptr_t)dmabak);
__data20_write_long((uintptr_t)&DMA4DA, (uintptr_t)0x0508);
__data20_write_long((uintptr_t)&DMA5SA, (uintptr_t)dmabak);
__data20_write_long((uintptr_t)&DMA5DA, (uintptr_t)0x0508);
DMA0SZ = (0x570-0x508)>>1;
DMA1SZ = 1;
DMA2SZ = 1;
DMA3SZ = (0x570-0x508)>>1;
DMA4SZ = (0x570-0x508)>>1;
DMA5SZ = (0x570-0x508)>>1;
DMA0CTL = DMADT_7 | DMASRCINCR_3 | DMADSTINCR_3;
DMA1CTL = DMADT_7 | DMASRCINCR_0 | DMADSTINCR_0;
DMA2CTL = DMADT_7 | DMASRCINCR_0 | DMADSTINCR_0;
DMA3CTL = DMADT_7 | DMASRCINCR_3 | DMADSTINCR_3;
DMA4CTL = DMADT_7 | DMASRCINCR_3 | DMADSTINCR_3;
DMA5CTL = DMADT_7 | DMASRCINCR_3 | DMADSTINCR_3;
DMACTL4 = ROUNDROBIN;
memcpy(dmabak, (void*)0x0508, sizeof dmabak);
for (int i = 0; i < 6; ++i) dmabak[0x08 + i*0x10 + 0] |= DMAREQ|DMAEN;
DMA0CTL |= DMAEN;
DMA1CTL |= DMAEN;
DMA2CTL |= DMAEN;
DMA3CTL |= DMAEN;
DMA4CTL |= DMAEN;
DMA5CTL |= DMAEN;
DMA0CTL |= DMAREQ;
DMA1CTL |= DMAREQ;
DMA2CTL |= DMAREQ;
DMA3CTL |= DMAREQ;
DMA4CTL |= DMAREQ;
DMA5CTL |= DMAREQ;
}
CODESP int main(void) {
setup_io();
setup_clocks();
@ -436,11 +486,23 @@ CODESP int main(void) {
puts("hello world!\r\n");
/*uint16_t vs[4];
__data20_write_long((uintptr_t)&DMA0SA, (uintptr_t)0x1000);
__data20_write_long((uintptr_t)&DMA0DA, (uintptr_t)vs);
DMA0SZ = 4;
DMA0CTL = DMADT_7 | DMASRCINCR_3 | DMADSTINCR_3;
DMA0CTL |= DMAEN;
DMA0CTL |= DMAREQ;
__delay_cycles(100);
iprintf("dmares: %04x %04x %04x %04x\r\n",
vs[0], vs[1], vs[2], vs[3]);*/
done_irq = 0;
#if USE_NMI
pico_send_cmd('0');
pico_wait_ack();
#endif
dma_init();
do_trace();
/*while(1);*/__builtin_unreachable();
@ -455,33 +517,7 @@ CODESP int main(void) {
__delay_cycles(10000);
}*/
/*__data20_write_long((uintptr_t)&DMA0SA, (uintptr_t)TRAM_PAYLOAD_START);
__data20_write_long((uintptr_t)&DMA0DA, (uintptr_t)0x0000+10);
__data20_write_long((uintptr_t)&DMA1SA, (uintptr_t)(TRAM_PAYLOAD_START+2));
__data20_write_long((uintptr_t)&DMA1DA, (uintptr_t)0x0002+10);
__data20_write_long((uintptr_t)&DMA2SA, (uintptr_t)(TRAM_PAYLOAD_START+4));
__data20_write_long((uintptr_t)&DMA2DA, (uintptr_t)0x0004+10);
__data20_write_long((uintptr_t)&DMA3SA, (uintptr_t)(TRAM_PAYLOAD_START+6));
__data20_write_long((uintptr_t)&DMA3DA, (uintptr_t)0x0006+10);
DMA0SZ = 1;
DMA1SZ = 1;
DMA2SZ = 1;
DMA3SZ = 1;
DMA0CTL = DMADT_7 | DMASRCINCR_0 | DMADSTINCR_0;
DMA1CTL = DMADT_7 | DMASRCINCR_0 | DMADSTINCR_0;
DMA2CTL = DMADT_7 | DMASRCINCR_0 | DMADSTINCR_0;
DMA3CTL = DMADT_7 | DMASRCINCR_0 | DMADSTINCR_0;
DMACTL4 = ROUNDROBIN;
DMA0CTL |= DMAEN;
DMA1CTL |= DMAEN;
DMA2CTL |= DMAEN;
DMA3CTL |= DMAEN;
DMA0CTL |= DMAREQ;
DMA1CTL |= DMAREQ;
DMA2CTL |= DMAREQ;
DMA3CTL |= DMAREQ;
for (int i = 0; i < 100; ++i) asm volatile("nop");
/*for (int i = 0; i < 100; ++i) asm volatile("nop");
//asm volatile("br #0\n");
asm volatile("1: jmp 1b\n");
@ -492,8 +528,8 @@ CODESP int main(void) {
"1: bis.w #3, 0x0202\n"
"jmp 1b\n"
"TRAM_PAYLOAD_END:\n"
);*/
);
while(1);
while(1);*/
}

14
ttypipe.py Executable file
View File

@ -0,0 +1,14 @@
#!/usr/bin/env python3
import serial
import sys
TIMEOUT = 60*60*8
with serial.Serial(sys.argv[1] if len(sys.argv) > 1 else "/dev/ttyACM1", 9600, timeout=TIMEOUT) as ser:
while True:
w = ser.read(1)
sys.stdout.buffer.write(w)
sys.stdout.buffer.flush()