119 lines
2.9 KiB
Plaintext
119 lines
2.9 KiB
Plaintext
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.program trigctl
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; autopull should be on, depth 32
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;
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; input pin 0: trigger input
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;
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; set pin 0: glitch output
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;
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; irq 0 rel: PIO->CM0 "has glitched" signal
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; irq 1 rel: CM0->PIO "do a glitch now" signal
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public _start:
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out x, 32 ; offset
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out y, 32 ; length
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irq clear 0 rel
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public waitinsn:
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wait 1 pin 0 ; or "wait irq 1 rel"
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offloop:
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jmp x-- offloop
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set pins, 1
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lenloop:
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jmp y-- lenloop
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set pins, 0
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irq set 0 rel
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public wait2:
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wait 0 pin 0 ; or "nop"
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% c-sdk {
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enum glitch_polarity {
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glitch_positive = 0,
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glitch_negative = 1
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};
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enum trigctl_source {
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trig_source_pin,
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trig_source_irq
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};
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static inline void trigctl_pio_init(PIO pio, uint sm, uint prog_offs,
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enum trigctl_source trigsrc, uint glitch_pin, uint trig_pin/*,
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enum glitch_polarity trig_in_pol, enum glitch_polarity glitch_out_pol*/
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, bool enable, int divider) {
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pio_sm_set_enabled(pio, sm, false);
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if (trigsrc == trig_source_irq) {
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pio->instr_mem[prog_offs + trigctl_offset_waitinsn] =
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pio_encode_wait_irq(true, true, 1);
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pio->instr_mem[prog_offs + trigctl_offset_wait2] =
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pio_encode_nop();
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} else {
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pio->instr_mem[prog_offs + trigctl_offset_waitinsn] =
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pio_encode_wait_pin(true, 0);
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pio->instr_mem[prog_offs + trigctl_offset_wait2] =
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pio_encode_wait_pin(false, 0);
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}
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pio_sm_config c = trigctl_program_get_default_config(prog_offs);
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sm_config_set_set_pins(&c, glitch_pin, 1);
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sm_config_set_in_pins(&c, trig_pin/*, 1*/);
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sm_config_set_out_shift(&c, false, true, 32);
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sm_config_set_in_shift(&c, false, true, 32);
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sm_config_set_clkdiv(&c, divider);
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if (trigsrc == trig_source_irq) {
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sm_config_set_wrap(&c, prog_offs + trigctl_wrap_target,
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prog_offs + trigctl_wrap - 1);
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}
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pio_sm_init(pio, sm, prog_offs, &c);
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pio_sm_set_consecutive_pindirs(pio, sm, glitch_pin, 1, true );
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pio_sm_set_consecutive_pindirs(pio, sm, trig_pin , 1, false);
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pio_sm_set_pins_with_mask(pio, sm, 0, 1u << glitch_pin);
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pio_sm_set_enabled(pio, sm, enable);
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pio_gpio_init(pio, glitch_pin);
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pio_gpio_init(pio, trig_pin);
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}
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// ony use "use_wfi" when the corresponding IRQ is enabled in the NVIC
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static inline void trigctl_wait_glitch_irq(PIO pio, uint sm, bool use_wfi) {
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uint mask = 1u << ((sm + 0) & 3);
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if (use_wfi) {
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while (!(pio->irq & mask)) __WFE();
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} else {
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while (!(pio->irq & mask)) ;
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}
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}
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static inline void trigctl_ack_glitch_irq(PIO pio, uint sm) {
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hw_set_bits(&pio->irq, 1 << ((sm + 0) & 3));
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}
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// nvic_irqno: corresponding NVIC IRQ will be PIO${pio}_IRQ_${nvic_irqno}
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static inline void trigctl_set_glitch_irq_enabled(PIO pio, uint sm, uint nvic_irqno, bool en) {
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pio_set_irqn_source_enabled(pio, nvic_irqno, (sm + 0) & 3, en);
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}
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/*static inline void trigctl_send_trig_irq(PIO pio, uint sm) {
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pio->irq_force = 1 << ((sm + 1) & 3);
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}*/
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static inline void trigctl_push_off_len(PIO pio, uint sm, uint32_t off, uint32_t len) {
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while (pio_sm_is_tx_fifo_full(pio, sm)) ;
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pio->txf[sm] = off;
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while (pio_sm_is_tx_fifo_full(pio, sm)) ;
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pio->txf[sm] = len;
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}
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%}
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