2012-04-22 23:05:58 +00:00
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/*
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2013-04-23 20:24:30 +00:00
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* This file is part of the libsigrok project.
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2012-04-22 23:05:58 +00:00
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*
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* Copyright (C) 2012 Bert Vermeulen <bert@biot.com>
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* With protocol information from the hantekdso project,
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* Copyright (C) 2008 Oleg Khudyakov <prcoder@gmail.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2013-07-31 11:09:48 +00:00
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#ifndef LIBSIGROK_HARDWARE_HANTEK_DSO_DSO_H
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#define LIBSIGROK_HARDWARE_HANTEK_DSO_DSO_H
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2012-04-22 23:05:58 +00:00
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2013-12-23 03:38:35 +00:00
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#define LOG_PREFIX "hantek-dso"
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2013-01-29 11:05:00 +00:00
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2013-04-02 12:33:17 +00:00
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#define USB_INTERFACE 0
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#define USB_CONFIGURATION 1
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#define DSO_EP_IN 0x86
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#define DSO_EP_OUT 0x02
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2012-04-22 23:05:58 +00:00
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/* FX2 renumeration delay in ms */
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2013-04-02 12:33:17 +00:00
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#define MAX_RENUM_DELAY_MS 3000
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2012-04-22 23:05:58 +00:00
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2013-04-02 12:33:17 +00:00
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#define MAX_CAPTURE_EMPTY 3
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2012-04-22 23:05:58 +00:00
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2013-04-02 12:33:17 +00:00
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#define DEFAULT_VOLTAGE VDIV_500MV
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#define DEFAULT_FRAMESIZE FRAMESIZE_SMALL
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#define DEFAULT_TIMEBASE TIME_100us
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#define DEFAULT_TRIGGER_SOURCE "CH1"
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#define DEFAULT_COUPLING COUPLING_DC
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#define DEFAULT_HORIZ_TRIGGERPOS 0.5
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#define DEFAULT_VERT_OFFSET 0.5
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#define DEFAULT_VERT_TRIGGERPOS 0.5
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2012-04-22 23:05:58 +00:00
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2013-04-02 12:33:17 +00:00
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#define MAX_VERT_TRIGGER 0xfe
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2012-04-22 23:05:58 +00:00
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/* Hantek DSO-specific protocol values */
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2013-04-02 12:33:17 +00:00
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#define EEPROM_CHANNEL_OFFSETS 0x08
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2012-04-22 23:05:58 +00:00
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2013-04-02 18:54:44 +00:00
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/* All models have this for their "fast" mode. */
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2013-04-02 12:33:17 +00:00
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#define FRAMESIZE_SMALL 10240
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2012-04-22 23:05:58 +00:00
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enum control_requests {
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CTRL_READ_EEPROM = 0xa2,
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CTRL_GETSPEED = 0xb2,
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CTRL_BEGINCOMMAND = 0xb3,
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CTRL_SETOFFSET = 0xb4,
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2012-11-10 17:19:30 +00:00
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CTRL_SETRELAYS = 0xb5,
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2012-04-22 23:05:58 +00:00
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};
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enum dso_commands {
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CMD_SET_FILTERS = 0,
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CMD_SET_TRIGGER_SAMPLERATE,
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CMD_FORCE_TRIGGER,
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CMD_CAPTURE_START,
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CMD_ENABLE_TRIGGER,
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CMD_GET_CHANNELDATA,
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CMD_GET_CAPTURESTATE,
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CMD_SET_VOLTAGE,
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2012-05-17 00:03:12 +00:00
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/* unused */
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2013-07-31 11:09:48 +00:00
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CMD_SET_LOGICALDATA,
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CMD_GET_LOGICALDATA,
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2012-04-22 23:05:58 +00:00
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};
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2012-05-17 01:17:09 +00:00
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/* Must match the coupling table. */
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2012-04-22 23:05:58 +00:00
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enum couplings {
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COUPLING_AC = 0,
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COUPLING_DC,
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2012-05-19 23:14:37 +00:00
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/* TODO not used, how to enable? */
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2012-11-10 17:19:30 +00:00
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COUPLING_GND,
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2012-04-22 23:05:58 +00:00
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};
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2012-05-17 01:17:09 +00:00
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/* Must match the timebases table. */
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2012-04-22 23:05:58 +00:00
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enum time_bases {
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TIME_10us = 0,
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TIME_20us,
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TIME_40us,
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TIME_100us,
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TIME_200us,
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TIME_400us,
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TIME_1ms,
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TIME_2ms,
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TIME_4ms,
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TIME_10ms,
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TIME_20ms,
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TIME_40ms,
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TIME_100ms,
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TIME_200ms,
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2012-11-10 17:19:30 +00:00
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TIME_400ms,
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2012-04-22 23:05:58 +00:00
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};
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2012-05-17 01:17:09 +00:00
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/* Must match the vdivs table. */
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2012-05-17 00:03:12 +00:00
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enum {
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VDIV_10MV,
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VDIV_20MV,
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VDIV_50MV,
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VDIV_100MV,
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VDIV_200MV,
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VDIV_500MV,
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VDIV_1V,
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VDIV_2V,
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VDIV_5V,
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};
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2012-04-22 23:05:58 +00:00
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enum trigger_slopes {
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SLOPE_POSITIVE = 0,
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2012-11-10 17:19:30 +00:00
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SLOPE_NEGATIVE,
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2012-04-22 23:05:58 +00:00
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};
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enum trigger_sources {
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TRIGGER_CH2 = 0,
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TRIGGER_CH1,
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TRIGGER_EXT,
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};
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enum capturestates {
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CAPTURE_EMPTY = 0,
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CAPTURE_FILLING = 1,
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CAPTURE_READY_8BIT = 2,
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CAPTURE_READY_9BIT = 7,
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CAPTURE_TIMEOUT = 127,
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2012-11-10 17:19:30 +00:00
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CAPTURE_UNKNOWN = 255,
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2012-04-22 23:05:58 +00:00
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};
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enum triggermodes {
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TRIGGERMODE_AUTO,
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TRIGGERMODE_NORMAL,
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2012-11-10 17:19:30 +00:00
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TRIGGERMODE_SINGLE,
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2012-04-22 23:05:58 +00:00
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};
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enum states {
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IDLE,
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NEW_CAPTURE,
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CAPTURE,
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2012-08-02 23:05:40 +00:00
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FETCH_DATA,
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STOPPING,
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2012-04-22 23:05:58 +00:00
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};
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struct dso_profile {
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/* VID/PID after cold boot */
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uint16_t orig_vid;
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uint16_t orig_pid;
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/* VID/PID after firmware upload */
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uint16_t fw_vid;
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uint16_t fw_pid;
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char *vendor;
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char *model;
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2013-04-02 18:54:44 +00:00
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const uint64_t *buffersizes;
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2012-04-22 23:05:58 +00:00
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char *firmware;
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};
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2012-07-29 22:24:26 +00:00
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struct dev_context {
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2012-05-31 23:12:09 +00:00
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const struct dso_profile *profile;
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2012-04-22 23:05:58 +00:00
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void *cb_data;
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2012-04-30 20:29:31 +00:00
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uint64_t limit_frames;
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uint64_t num_frames;
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2014-03-24 20:34:20 +00:00
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GSList *enabled_channels;
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2012-04-22 23:05:58 +00:00
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/* We can't keep track of an FX2-based device after upgrading
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* the firmware (it re-enumerates into a different device address
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* after the upgrade) this is like a global lock. No device will open
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* until a proper delay after the last device was upgraded.
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*/
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2012-06-26 22:55:15 +00:00
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int64_t fw_updated;
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2012-04-22 23:05:58 +00:00
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int epin_maxpacketsize;
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int capture_empty_count;
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int dev_state;
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2012-06-26 21:26:55 +00:00
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/* Oscilloscope settings. */
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2012-04-22 23:05:58 +00:00
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int timebase;
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gboolean ch1_enabled;
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gboolean ch2_enabled;
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int voltage_ch1;
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int voltage_ch2;
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int coupling_ch1;
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int coupling_ch2;
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// voltage offset (vertical position)
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float voffset_ch1;
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float voffset_ch2;
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float voffset_trigger;
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uint16_t channel_levels[2][9][2];
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2012-06-26 21:26:55 +00:00
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unsigned int framesize;
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2012-04-22 23:05:58 +00:00
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gboolean filter_ch1;
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gboolean filter_ch2;
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gboolean filter_trigger;
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int triggerslope;
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2012-05-15 18:56:29 +00:00
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char *triggersource;
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2012-05-14 00:33:37 +00:00
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float triggerposition;
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2012-04-22 23:05:58 +00:00
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int triggermode;
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2012-06-26 21:26:55 +00:00
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/* Frame transfer */
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unsigned int samp_received;
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unsigned int samp_buffered;
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unsigned int trigger_offset;
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unsigned char *framebuf;
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2012-04-22 23:05:58 +00:00
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};
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2012-07-21 20:04:47 +00:00
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SR_PRIV int dso_open(struct sr_dev_inst *sdi);
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2012-04-22 23:05:58 +00:00
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SR_PRIV void dso_close(struct sr_dev_inst *sdi);
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2013-04-16 21:15:34 +00:00
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SR_PRIV int dso_enable_trigger(const struct sr_dev_inst *sdi);
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SR_PRIV int dso_force_trigger(const struct sr_dev_inst *sdi);
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SR_PRIV int dso_init(const struct sr_dev_inst *sdi);
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SR_PRIV int dso_get_capturestate(const struct sr_dev_inst *sdi,
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2012-11-10 17:19:30 +00:00
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uint8_t *capturestate, uint32_t *trigger_offset);
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2013-04-16 21:15:34 +00:00
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SR_PRIV int dso_capture_start(const struct sr_dev_inst *sdi);
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2013-01-23 02:40:44 +00:00
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SR_PRIV int dso_get_channeldata(const struct sr_dev_inst *sdi,
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2012-11-10 17:19:30 +00:00
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libusb_transfer_cb_fn cb);
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2012-04-22 23:05:58 +00:00
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#endif
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