link-mso19: Fix white-space, cosmetics, coding-style.
Fix the bare minumum of whitespace/indentation/coding-style via automatic 'indent' run, followed by some minor manual fixes. Some more fixes and cleanups might follow later.
This commit is contained in:
Uwe Hermann
parent
f48cef7897
commit
00b44ccb8b
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@ -24,11 +24,11 @@
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static const int hwcaps[] = {
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SR_HWCAP_LOGIC_ANALYZER,
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SR_HWCAP_SAMPLERATE,
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SR_HWCAP_TRIGGER_SLOPE,
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SR_HWCAP_HORIZ_TRIGGERPOS,
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// SR_HWCAP_CAPTURE_RATIO,
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SR_HWCAP_TRIGGER_SLOPE,
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SR_HWCAP_HORIZ_TRIGGERPOS,
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// SR_HWCAP_CAPTURE_RATIO,
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SR_HWCAP_LIMIT_SAMPLES,
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// SR_HWCAP_RLE,
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// SR_HWCAP_RLE,
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0,
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};
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@ -60,6 +60,7 @@ static int hw_init(struct sr_context *sr_ctx)
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sr_err("Driver context malloc failed.");
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return SR_ERR_MALLOC;
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}
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drvc->sr_ctx = sr_ctx;
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di->priv = drvc;
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@ -68,16 +69,18 @@ static int hw_init(struct sr_context *sr_ctx)
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static GSList *hw_scan(GSList *options)
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{
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int i;
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int i;
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GSList *devices = NULL;
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const char *conn = NULL;
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const char *serialcomm = NULL;
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GSList *l;
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struct sr_hwopt *opt;
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struct udev *udev;
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(void)options;
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GSList *devices = NULL;
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const char* conn = NULL;
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const char* serialcomm = NULL;
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GSList *l;
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for (l = options; l; l = l->next) {
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struct sr_hwopt* opt = l->data;
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opt = l->data;
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switch (opt->hwopt) {
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case SR_HWOPT_CONN:
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conn = opt->value;
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@ -88,28 +91,30 @@ static GSList *hw_scan(GSList *options)
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}
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}
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if (!conn)
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conn = SERIALCONN;
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conn = SERIALCONN;
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if (serialcomm == NULL)
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serialcomm = SERIALCOMM;
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struct udev *udev = udev_new();
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udev = udev_new();
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if (!udev) {
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sr_err("Failed to initialize udev.");
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}
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struct udev_enumerate *enumerate = udev_enumerate_new(udev);
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udev_enumerate_add_match_subsystem(enumerate, "usb-serial");
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udev_enumerate_scan_devices(enumerate);
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struct udev_list_entry *devs = udev_enumerate_get_list_entry(enumerate);
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struct udev_list_entry *dev_list_entry;
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for (dev_list_entry = devs;
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dev_list_entry != NULL;
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dev_list_entry = udev_list_entry_get_next(dev_list_entry))
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{
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for (dev_list_entry = devs;
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dev_list_entry != NULL;
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dev_list_entry = udev_list_entry_get_next(dev_list_entry)) {
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const char *syspath = udev_list_entry_get_name(dev_list_entry);
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struct udev_device *dev = udev_device_new_from_syspath(udev, syspath);
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struct udev_device *dev =
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udev_device_new_from_syspath(udev, syspath);
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const char *sysname = udev_device_get_sysname(dev);
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struct udev_device *parent = udev_device_get_parent_with_subsystem_devtype(
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dev, "usb", "usb_device");
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struct udev_device *parent =
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udev_device_get_parent_with_subsystem_devtype(dev, "usb",
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"usb_device");
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if (!parent) {
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sr_err("Unable to find parent usb device for %s",
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@ -117,86 +122,89 @@ static GSList *hw_scan(GSList *options)
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continue;
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}
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const char *idVendor = udev_device_get_sysattr_value(parent, "idVendor");
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const char *idProduct = udev_device_get_sysattr_value(parent, "idProduct");
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const char *idVendor =
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udev_device_get_sysattr_value(parent, "idVendor");
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const char *idProduct =
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udev_device_get_sysattr_value(parent, "idProduct");
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if (strcmp(USB_VENDOR, idVendor)
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|| strcmp(USB_PRODUCT, idProduct))
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|| strcmp(USB_PRODUCT, idProduct))
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continue;
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const char* iSerial = udev_device_get_sysattr_value(parent, "serial");
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const char* iProduct = udev_device_get_sysattr_value(parent, "product");
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const char *iSerial =
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udev_device_get_sysattr_value(parent, "serial");
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const char *iProduct =
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udev_device_get_sysattr_value(parent, "product");
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char path[32];
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char path[32];
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snprintf(path, sizeof(path), "/dev/%s", sysname);
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conn = path;
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conn = path;
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size_t s = strcspn(iProduct, " ");
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char product[32];
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char manufacturer[32];
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char product[32];
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char manufacturer[32];
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if (s > sizeof(product) ||
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strlen(iProduct) - s > sizeof(manufacturer)) {
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sr_err("Could not parse iProduct: %s.", iProduct);
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strlen(iProduct) - s > sizeof(manufacturer)) {
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sr_err("Could not parse iProduct: %s.", iProduct);
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continue;
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}
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strncpy(product, iProduct, s);
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product[s] = 0;
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strcpy(manufacturer, iProduct + s + 1);
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//Create the device context and set its params
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struct dev_context *devc;
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if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
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sr_err("Device context malloc failed.");
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return devices;
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}
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if (mso_parse_serial(iSerial, iProduct, devc) != SR_OK) {
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sr_err("Invalid iSerial: %s.", iSerial);
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g_free(devc);
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return devices;
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}
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char hwrev[32];
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sprintf(hwrev, "r%d", devc->hwrev);
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devc->ctlbase1 = 0;
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devc->protocol_trigger.spimode = 0;
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for (i = 0; i < 4; i++) {
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devc->protocol_trigger.word[i] = 0;
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devc->protocol_trigger.mask[i] = 0xff;
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}
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//Create the device context and set its params
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struct dev_context *devc;
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if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
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sr_err("Device context malloc failed.");
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return devices;
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}
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if (!(devc->serial = sr_serial_dev_inst_new(conn, serialcomm)))
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{
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g_free(devc);
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return devices;
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}
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if (mso_parse_serial(iSerial, iProduct, devc) != SR_OK) {
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sr_err("Invalid iSerial: %s.", iSerial);
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g_free(devc);
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return devices;
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}
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struct sr_dev_inst *sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
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manufacturer, product, hwrev);
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char hwrev[32];
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sprintf(hwrev, "r%d", devc->hwrev);
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devc->ctlbase1 = 0;
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devc->protocol_trigger.spimode = 0;
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for (i = 0; i < 4; i++) {
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devc->protocol_trigger.word[i] = 0;
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devc->protocol_trigger.mask[i] = 0xff;
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}
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if (!sdi) {
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sr_err("Unable to create device instance for %s",
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sysname);
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sr_dev_inst_free(sdi);
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g_free(devc);
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return devices;
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}
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sdi->driver = di;
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sdi->priv = devc;
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if (!(devc->serial = sr_serial_dev_inst_new(conn, serialcomm))) {
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g_free(devc);
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return devices;
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}
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for (i = 0; i < NUM_PROBES; i++) {
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struct sr_probe *probe;
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if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
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mso19_probe_names[i])))
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return 0;
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sdi->probes = g_slist_append(sdi->probes, probe);
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}
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struct sr_dev_inst *sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
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manufacturer, product, hwrev);
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//Add the driver
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struct drv_context *drvc = di->priv;
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drvc->instances = g_slist_append(drvc->instances, sdi);
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devices = g_slist_append(devices, sdi);
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}
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if (!sdi) {
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sr_err("Unable to create device instance for %s",
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sysname);
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sr_dev_inst_free(sdi);
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g_free(devc);
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return devices;
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}
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sdi->driver = di;
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sdi->priv = devc;
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for (i = 0; i < NUM_PROBES; i++) {
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struct sr_probe *probe;
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if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
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mso19_probe_names[i])))
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return 0;
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sdi->probes = g_slist_append(sdi->probes, probe);
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}
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//Add the driver
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struct drv_context *drvc = di->priv;
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drvc->instances = g_slist_append(drvc->instances, sdi);
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devices = g_slist_append(devices, sdi);
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}
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return devices;
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}
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@ -212,6 +220,7 @@ static GSList *hw_dev_list(void)
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static int hw_dev_open(struct sr_dev_inst *sdi)
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{
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int ret;
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struct dev_context *devc;
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devc = sdi->priv;
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@ -225,17 +234,17 @@ static int hw_dev_open(struct sr_dev_inst *sdi)
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mso_check_trigger(devc->serial, &devc->trigger_state);
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sr_dbg("Trigger state: 0x%x.", devc->trigger_state);
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int ret = mso_reset_adc(sdi);
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ret = mso_reset_adc(sdi);
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if (ret != SR_OK)
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return ret;
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mso_check_trigger(devc->serial, &devc->trigger_state);
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sr_dbg("Trigger state: 0x%x.", devc->trigger_state);
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// ret = mso_reset_fsm(sdi);
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// if (ret != SR_OK)
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// return ret;
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// return SR_ERR;
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// ret = mso_reset_fsm(sdi);
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// if (ret != SR_OK)
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// return ret;
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// return SR_ERR;
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return SR_OK;
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}
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@ -290,7 +299,7 @@ static int hw_cleanup(void)
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}
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static int hw_info_get(int info_id, const void **data,
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const struct sr_dev_inst *sdi)
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const struct sr_dev_inst *sdi)
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{
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struct dev_context *devc;
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@ -325,86 +334,81 @@ static int hw_info_get(int info_id, const void **data,
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}
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static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
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const void *value)
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const void *value)
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{
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int ret;
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struct dev_context *devc;
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devc = sdi->priv;
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uint64_t num_samples, slope;
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int trigger_pos;
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float pos;
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devc = sdi->priv;
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if (sdi->status != SR_ST_ACTIVE)
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return SR_ERR;
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switch (hwcap) {
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case SR_HWCAP_SAMPLERATE:
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return mso_configure_rate(sdi, *(const uint64_t *) value);
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// FIXME
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return mso_configure_rate(sdi, *(const uint64_t *)value);
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ret = SR_OK;
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break;
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case SR_HWCAP_LIMIT_SAMPLES:
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{
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const uint64_t num_samples = *(const uint64_t *)value;
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if (num_samples < 1024)
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{
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sr_err("minimum of 1024 samples required");
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ret = SR_ERR_ARG;
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} else {
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devc->limit_samples = num_samples;
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sr_dbg("setting limit_samples to %i\n", num_samples);
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ret = SR_OK;
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}
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}
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num_samples = *(uint64_t *)value;
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if (num_samples < 1024) {
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sr_err("minimum of 1024 samples required");
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ret = SR_ERR_ARG;
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} else {
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devc->limit_samples = num_samples;
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sr_dbg("setting limit_samples to %i\n",
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num_samples);
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ret = SR_OK;
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}
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break;
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case SR_HWCAP_CAPTURE_RATIO:
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ret = SR_OK;
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case SR_HWCAP_CAPTURE_RATIO:
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ret = SR_OK;
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break;
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case SR_HWCAP_TRIGGER_SLOPE:
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slope = *(uint64_t *)value;
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if (slope != SLOPE_NEGATIVE && slope != SLOPE_POSITIVE) {
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sr_err("Invalid trigger slope");
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ret = SR_ERR_ARG;
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} else {
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devc->trigger_slope = slope;
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ret = SR_OK;
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}
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break;
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case SR_HWCAP_HORIZ_TRIGGERPOS:
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pos = *(float *)value;
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if (pos < 0 || pos > 255) {
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sr_err("Trigger position (%f) should be between 0 and 255.", pos);
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ret = SR_ERR_ARG;
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} else {
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trigger_pos = (int)pos;
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devc->trigger_holdoff[0] = trigger_pos & 0xff;
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ret = SR_OK;
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}
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break;
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case SR_HWCAP_TRIGGER_SLOPE:
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{
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const uint64_t slope = *(const uint64_t *)value;
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if (slope != SLOPE_NEGATIVE && slope != SLOPE_POSITIVE)
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{
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sr_err("Invalid trigger slope");
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ret = SR_ERR_ARG;
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} else {
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devc->trigger_slope = slope;
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ret = SR_OK;
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}
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}
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break;
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case SR_HWCAP_HORIZ_TRIGGERPOS:
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{
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const float pos = *(const float *)value;
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if (pos < 0 || pos > 255) {
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sr_err("Trigger position (%f) should be between 0 and 255.", pos);
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ret = SR_ERR_ARG;
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} else {
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int trigger_pos = (int)pos;
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devc->trigger_holdoff[0] = trigger_pos&0xff;
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ret = SR_OK;
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}
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}
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break;
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case SR_HWCAP_RLE:
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ret = SR_OK;
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ret = SR_OK;
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break;
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default:
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ret = SR_ERR;
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break;
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}
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return ret;
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}
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static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
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void *cb_data)
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void *cb_data)
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{
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struct sr_datafeed_packet *packet;
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struct sr_datafeed_header *header;
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struct sr_datafeed_meta_logic meta;
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struct dev_context *devc;
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int ret = SR_ERR;
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devc = sdi->priv;
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if (sdi->status != SR_ST_ACTIVE)
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@ -416,13 +420,13 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
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}
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/* FIXME: No need to do full reconfigure every time */
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// ret = mso_reset_fsm(sdi);
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// if (ret != SR_OK)
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// return ret;
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// ret = mso_reset_fsm(sdi);
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// if (ret != SR_OK)
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// return ret;
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/* FIXME: ACDC Mode */
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devc->ctlbase1 &= 0x7f;
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// devc->ctlbase1 |= devc->acdcmode;
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// devc->ctlbase1 |= devc->acdcmode;
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ret = mso_configure_rate(sdi, devc->cur_rate);
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if (ret != SR_OK)
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@ -437,16 +441,14 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
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if (ret != SR_OK)
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return ret;
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ret = mso_configure_trigger(sdi);
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if (ret != SR_OK)
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return ret;
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/* END of config hardware part */
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ret = mso_arm(sdi);
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if (ret != SR_OK)
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return ret;
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ret = mso_arm(sdi);
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if (ret != SR_OK)
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return ret;
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/* Start acquisition on the device. */
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mso_check_trigger(devc->serial, &devc->trigger_state);
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@ -454,7 +456,7 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
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if (ret != SR_OK)
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return ret;
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sr_source_add(devc->serial->fd, G_IO_IN, -1, mso_receive_data, cb_data);
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sr_source_add(devc->serial->fd, G_IO_IN, -1, mso_receive_data, cb_data);
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if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
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sr_err("Datafeed packet malloc failed.");
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@ -467,7 +469,6 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
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return SR_ERR_MALLOC;
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}
|
||||
|
||||
|
||||
packet->type = SR_DF_HEADER;
|
||||
packet->payload = (unsigned char *)header;
|
||||
header->feed_version = 1;
|
||||
|
|
@ -479,7 +480,7 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
|||
meta.samplerate = devc->cur_rate;
|
||||
meta.num_probes = NUM_PROBES;
|
||||
sr_session_send(cb_data, packet);
|
||||
|
||||
|
||||
g_free(header);
|
||||
g_free(packet);
|
||||
|
||||
|
|
@ -489,7 +490,6 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
|||
/* This stops acquisition on ALL devices, ignoring dev_index. */
|
||||
static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
|
||||
{
|
||||
/* Avoid compiler warnings. */
|
||||
(void)cb_data;
|
||||
|
||||
stop_acquisition(sdi);
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
|
|||
static struct sr_dev_driver *di = &link_mso19_driver_info;
|
||||
|
||||
SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
|
||||
uint16_t payload[], int n)
|
||||
uint16_t payload[], int n)
|
||||
{
|
||||
int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
|
||||
char *p, *buf;
|
||||
|
|
@ -68,54 +68,52 @@ ret:
|
|||
return ret;
|
||||
}
|
||||
|
||||
|
||||
SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
|
||||
{
|
||||
struct dev_context *devc = sdi->priv;
|
||||
uint16_t threshold_value = mso_calc_raw_from_mv(devc);
|
||||
|
||||
threshold_value = 0x153C;
|
||||
uint8_t trigger_config = 0;
|
||||
|
||||
threshold_value = 0x153C;
|
||||
uint8_t trigger_config = 0;
|
||||
|
||||
if (devc->trigger_slope)
|
||||
trigger_config |= 0x04; //Trigger on falling edge
|
||||
if (devc->trigger_slope)
|
||||
trigger_config |= 0x04; //Trigger on falling edge
|
||||
|
||||
switch (devc->trigger_outsrc) {
|
||||
case 1:
|
||||
trigger_config |= 0x00; //Trigger pulse output
|
||||
trigger_config |= 0x00; //Trigger pulse output
|
||||
break;
|
||||
case 2:
|
||||
trigger_config |= 0x08; //PWM DAC from the pattern generator buffer
|
||||
trigger_config |= 0x08; //PWM DAC from the pattern generator buffer
|
||||
break;
|
||||
case 3:
|
||||
trigger_config |= 0x18; //White noise
|
||||
trigger_config |= 0x18; //White noise
|
||||
break;
|
||||
}
|
||||
|
||||
switch (devc->trigger_chan) {
|
||||
case 0:
|
||||
trigger_config |= 0x00; //DSO level trigger //b00000000
|
||||
break;
|
||||
case 1:
|
||||
trigger_config |= 0x20; //DSO level trigger & width < trigger_width
|
||||
break;
|
||||
case 2:
|
||||
trigger_config |= 0x40; //DSO level trigger & width >= trigger_width
|
||||
break;
|
||||
case 3:
|
||||
trigger_config |= 0x60; //LA combination trigger
|
||||
break;
|
||||
}
|
||||
case 0:
|
||||
trigger_config |= 0x00; //DSO level trigger //b00000000
|
||||
break;
|
||||
case 1:
|
||||
trigger_config |= 0x20; //DSO level trigger & width < trigger_width
|
||||
break;
|
||||
case 2:
|
||||
trigger_config |= 0x40; //DSO level trigger & width >= trigger_width
|
||||
break;
|
||||
case 3:
|
||||
trigger_config |= 0x60; //LA combination trigger
|
||||
break;
|
||||
}
|
||||
|
||||
//Last bit of trigger config reg 4 needs to be 1 for trigger enable,
|
||||
//otherwise the trigger is not enabled
|
||||
if (devc->use_trigger)
|
||||
trigger_config |= 0x80;
|
||||
//Last bit of trigger config reg 4 needs to be 1 for trigger enable,
|
||||
//otherwise the trigger is not enabled
|
||||
if (devc->use_trigger)
|
||||
trigger_config |= 0x80;
|
||||
|
||||
uint16_t ops[18];
|
||||
ops[0] = mso_trans(3, threshold_value & 0xff);
|
||||
//The trigger_config also holds the 2 MSB bits from the threshold value
|
||||
//The trigger_config also holds the 2 MSB bits from the threshold value
|
||||
ops[1] = mso_trans(4, trigger_config | (threshold_value >> 8) & 0x03);
|
||||
ops[2] = mso_trans(5, devc->la_trigger);
|
||||
ops[3] = mso_trans(6, devc->la_trigger_mask);
|
||||
|
|
@ -123,7 +121,8 @@ SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
|
|||
ops[5] = mso_trans(8, devc->trigger_holdoff[1]);
|
||||
|
||||
ops[6] = mso_trans(11,
|
||||
devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
|
||||
devc->dso_trigger_width /
|
||||
SR_HZ_TO_NS(devc->cur_rate));
|
||||
|
||||
/* Select the SPI/I2C trigger config bank */
|
||||
ops[7] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
|
||||
|
|
@ -197,31 +196,29 @@ SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
|
|||
return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
|
||||
}
|
||||
|
||||
SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
|
||||
SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context * devc)
|
||||
{
|
||||
return (uint16_t) (0x200 -
|
||||
((devc->dso_trigger_voltage / devc->dso_probe_attn) /
|
||||
devc->vbit));
|
||||
((devc->dso_trigger_voltage / devc->dso_probe_attn) /
|
||||
devc->vbit));
|
||||
}
|
||||
|
||||
|
||||
SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
|
||||
struct dev_context *devc)
|
||||
struct dev_context *devc)
|
||||
{
|
||||
unsigned int u1, u2, u3, u4, u5, u6;
|
||||
|
||||
iProduct = iProduct;
|
||||
/* FIXME: This code is in the original app, but I think its
|
||||
* used only for the GUI */
|
||||
/* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
|
||||
devc->num_sample_rates = 0x16;
|
||||
else
|
||||
devc->num_sample_rates = 0x10; */
|
||||
|
||||
iProduct = iProduct;
|
||||
/* FIXME: This code is in the original app, but I think its
|
||||
* used only for the GUI */
|
||||
/* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
|
||||
devc->num_sample_rates = 0x16;
|
||||
else
|
||||
devc->num_sample_rates = 0x10; */
|
||||
|
||||
/* parse iSerial */
|
||||
if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
|
||||
&u1, &u2, &u3, &u4, &u5, &u6) != 6)
|
||||
&u1, &u2, &u3, &u4, &u5, &u6) != 6)
|
||||
return SR_ERR;
|
||||
devc->hwmodel = u4;
|
||||
devc->hwrev = u5;
|
||||
|
|
@ -323,17 +320,13 @@ SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
|
|||
}
|
||||
}
|
||||
|
||||
if (ret != SR_OK)
|
||||
if (ret != SR_OK)
|
||||
sr_err("Unsupported rate.");
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
|
||||
SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t * info)
|
||||
{
|
||||
uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
|
||||
int ret;
|
||||
|
|
@ -343,9 +336,8 @@ SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
|
|||
if (info == NULL || ret != SR_OK)
|
||||
return ret;
|
||||
|
||||
|
||||
uint8_t buf = 0;
|
||||
if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
|
||||
uint8_t buf = 0;
|
||||
if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
|
||||
ret = SR_ERR;
|
||||
*info = buf;
|
||||
|
||||
|
|
@ -355,7 +347,6 @@ SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
|
|||
|
||||
SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
|
||||
{
|
||||
|
||||
struct sr_datafeed_packet packet;
|
||||
struct sr_datafeed_logic logic;
|
||||
struct sr_dev_inst *sdi;
|
||||
|
|
@ -384,19 +375,19 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
|
|||
|
||||
if (s <= 0)
|
||||
return FALSE;
|
||||
|
||||
/* Check if we triggered, then send a command that we are ready
|
||||
* to read the data */
|
||||
if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
|
||||
devc->trigger_state = in[0];
|
||||
if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
|
||||
mso_read_buffer(sdi);
|
||||
devc->buffer_n = 0;
|
||||
} else {
|
||||
mso_check_trigger(devc->serial, NULL);
|
||||
}
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/* Check if we triggered, then send a command that we are ready
|
||||
* to read the data */
|
||||
if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
|
||||
devc->trigger_state = in[0];
|
||||
if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
|
||||
mso_read_buffer(sdi);
|
||||
devc->buffer_n = 0;
|
||||
} else {
|
||||
mso_check_trigger(devc->serial, NULL);
|
||||
}
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
/* the hardware always dumps 1024 samples, 24bits each */
|
||||
if (devc->buffer_n < 3072) {
|
||||
|
|
@ -412,9 +403,9 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
|
|||
for (i = 0; i < 1024; i++) {
|
||||
/* FIXME: Need to do conversion to mV */
|
||||
analog_out[i] = (devc->buffer[i * 3] & 0x3f) |
|
||||
((devc->buffer[i * 3 + 1] & 0xf) << 6);
|
||||
((devc->buffer[i * 3 + 1] & 0xf) << 6);
|
||||
logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) |
|
||||
((devc->buffer[i * 3 + 2] & 0x3f) << 2);
|
||||
((devc->buffer[i * 3 + 2] & 0x3f) << 2);
|
||||
}
|
||||
|
||||
packet.type = SR_DF_LOGIC;
|
||||
|
|
@ -424,23 +415,23 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
|
|||
logic.data = logic_out;
|
||||
sr_session_send(cb_data, &packet);
|
||||
|
||||
devc->num_samples += 1024;
|
||||
devc->num_samples += 1024;
|
||||
|
||||
// Dont bother fixing this yet, keep it "old style"
|
||||
/*
|
||||
packet.type = SR_DF_ANALOG;
|
||||
packet.length = 1024;
|
||||
packet.unitsize = sizeof(double);
|
||||
packet.payload = analog_out;
|
||||
sr_session_send(ctx->session_dev_id, &packet);
|
||||
*/
|
||||
packet.type = SR_DF_ANALOG;
|
||||
packet.length = 1024;
|
||||
packet.unitsize = sizeof(double);
|
||||
packet.payload = analog_out;
|
||||
sr_session_send(ctx->session_dev_id, &packet);
|
||||
*/
|
||||
|
||||
if (devc->limit_samples && devc->num_samples >= devc->limit_samples) {
|
||||
sr_info("Requested number of samples reached.");
|
||||
sdi->driver->dev_acquisition_stop(sdi, cb_data);
|
||||
}
|
||||
if (devc->limit_samples && devc->num_samples >= devc->limit_samples) {
|
||||
sr_info("Requested number of samples reached.");
|
||||
sdi->driver->dev_acquisition_stop(sdi, cb_data);
|
||||
}
|
||||
|
||||
return TRUE;
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi)
|
||||
|
|
@ -451,16 +442,15 @@ SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi)
|
|||
int probe_bit, stage, i;
|
||||
char *tc;
|
||||
|
||||
|
||||
devc = sdi->priv;
|
||||
|
||||
devc->la_trigger_mask = 0xFF; //the mask for the LA_TRIGGER (bits set to 0 matter, those set to 1 are ignored).
|
||||
devc->la_trigger = 0x00; //The value of the LA byte that generates a trigger event (in that mode).
|
||||
devc->dso_trigger_voltage = 3;
|
||||
devc->dso_probe_attn = 1;
|
||||
devc->trigger_outsrc = 0;
|
||||
devc->trigger_chan = 3; //LA combination trigger
|
||||
devc->use_trigger = FALSE;
|
||||
devc->la_trigger_mask = 0xFF; //the mask for the LA_TRIGGER (bits set to 0 matter, those set to 1 are ignored).
|
||||
devc->la_trigger = 0x00; //The value of the LA byte that generates a trigger event (in that mode).
|
||||
devc->dso_trigger_voltage = 3;
|
||||
devc->dso_probe_attn = 1;
|
||||
devc->trigger_outsrc = 0;
|
||||
devc->trigger_chan = 3; //LA combination trigger
|
||||
devc->use_trigger = FALSE;
|
||||
|
||||
for (l = sdi->probes; l; l = l->next) {
|
||||
probe = (struct sr_probe *)l->data;
|
||||
|
|
@ -471,17 +461,14 @@ SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi)
|
|||
if (!(probe->trigger))
|
||||
continue;
|
||||
|
||||
devc->use_trigger = TRUE;
|
||||
devc->use_trigger = TRUE;
|
||||
//Configure trigger mask and value.
|
||||
for (tc = probe->trigger; *tc; tc++) {
|
||||
devc->la_trigger_mask &= ~probe_bit;
|
||||
if (*tc == '1')
|
||||
devc->la_trigger |= probe_bit;
|
||||
}
|
||||
}
|
||||
if (*tc == '1')
|
||||
devc->la_trigger |= probe_bit;
|
||||
}
|
||||
}
|
||||
|
||||
return SR_OK;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -22,9 +22,6 @@
|
|||
#ifndef LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
|
||||
#define LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
|
||||
|
||||
#define USB_VENDOR "3195"
|
||||
#define USB_PRODUCT "f190"
|
||||
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <glib.h>
|
||||
|
|
@ -40,13 +37,16 @@
|
|||
#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
|
||||
#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
|
||||
|
||||
#define NUM_PROBES 8
|
||||
#define NUM_TRIGGER_STAGES 4
|
||||
#define TRIGGER_TYPES "01" //the first r/f is used for the whole group
|
||||
#define SERIALCOMM "460800/8n1/flow=2"
|
||||
#define SERIALCONN "/dev/ttyUSB0"
|
||||
#define CLOCK_RATE SR_MHZ(100)
|
||||
#define MIN_NUM_SAMPLES 4
|
||||
#define USB_VENDOR "3195"
|
||||
#define USB_PRODUCT "f190"
|
||||
|
||||
#define NUM_PROBES 8
|
||||
#define NUM_TRIGGER_STAGES 4
|
||||
#define TRIGGER_TYPES "01" //the first r/f is used for the whole group
|
||||
#define SERIALCOMM "460800/8n1/flow=2"
|
||||
#define SERIALCONN "/dev/ttyUSB0"
|
||||
#define CLOCK_RATE SR_MHZ(100)
|
||||
#define MIN_NUM_SAMPLES 4
|
||||
|
||||
#define MSO_TRIGGER_UNKNOWN '!'
|
||||
#define MSO_TRIGGER_UNKNOWN1 '1'
|
||||
|
|
@ -57,8 +57,8 @@
|
|||
#define MSO_TRIGGER_DATAREADY '6'
|
||||
|
||||
enum trigger_slopes {
|
||||
SLOPE_POSITIVE = 0,
|
||||
SLOPE_NEGATIVE,
|
||||
SLOPE_POSITIVE = 0,
|
||||
SLOPE_NEGATIVE,
|
||||
};
|
||||
|
||||
/* Structure for the pattern generator state */
|
||||
|
|
@ -73,7 +73,7 @@ struct mso_patgen {
|
|||
uint8_t config;
|
||||
/* Samples buffer */
|
||||
uint8_t buffer[1024];
|
||||
/* Input/output configuration for the samples buffer (?)*/
|
||||
/* Input/output configuration for the samples buffer (?) */
|
||||
uint8_t io[1024];
|
||||
/* Number of loops for the pattern generator */
|
||||
uint8_t loops;
|
||||
|
|
@ -97,13 +97,13 @@ struct dev_context {
|
|||
uint8_t hwmodel;
|
||||
uint8_t hwrev;
|
||||
struct sr_serial_dev_inst *serial;
|
||||
// uint8_t num_sample_rates;
|
||||
// uint8_t num_sample_rates;
|
||||
/* calibration */
|
||||
double vbit;
|
||||
uint16_t dac_offset;
|
||||
uint16_t offset_range;
|
||||
uint64_t limit_samples;
|
||||
uint64_t num_samples;
|
||||
uint64_t limit_samples;
|
||||
uint64_t num_samples;
|
||||
/* register cache */
|
||||
uint8_t ctlbase1;
|
||||
uint8_t ctlbase2;
|
||||
|
|
@ -111,7 +111,7 @@ struct dev_context {
|
|||
uint8_t la_threshold;
|
||||
uint64_t cur_rate;
|
||||
uint8_t dso_probe_attn;
|
||||
int8_t use_trigger;
|
||||
int8_t use_trigger;
|
||||
uint8_t trigger_chan;
|
||||
uint8_t trigger_slope;
|
||||
uint8_t trigger_outsrc;
|
||||
|
|
@ -128,8 +128,9 @@ struct dev_context {
|
|||
};
|
||||
|
||||
SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
|
||||
struct dev_context *ctx);
|
||||
SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info);
|
||||
struct dev_context *ctx);
|
||||
SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial,
|
||||
uint8_t * info);
|
||||
SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi);
|
||||
SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val);
|
||||
SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate);
|
||||
|
|
@ -147,9 +148,6 @@ SR_PRIV int mso_toggle_led(struct sr_dev_inst *sdi, int state);
|
|||
SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi);
|
||||
SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi);
|
||||
|
||||
///////////////////////
|
||||
//
|
||||
|
||||
/* serial protocol */
|
||||
#define mso_trans(a, v) \
|
||||
(((v) & 0x3f) | (((v) & 0xc0) << 6) | (((a) & 0xf) << 8) | \
|
||||
|
|
@ -172,20 +170,20 @@ SR_PRIV static const char mso_foot[] = { 0x7e };
|
|||
#define REG_CTL1 14
|
||||
|
||||
/* bank 2 registers (SPI/I2C protocol trigger) */
|
||||
#define REG_PT_WORD(x) (x)
|
||||
#define REG_PT_MASK(x) (x+4)
|
||||
#define REG_PT_SPIMODE 8
|
||||
#define REG_PT_WORD(x) (x)
|
||||
#define REG_PT_MASK(x) (x + 4)
|
||||
#define REG_PT_SPIMODE 8
|
||||
|
||||
/* bits - REG_CTL1 */
|
||||
#define BIT_CTL1_RESETFSM (1 << 0)
|
||||
#define BIT_CTL1_ARM (1 << 1)
|
||||
#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
|
||||
#define BIT_CTL1_RESETADC (1 << 6)
|
||||
#define BIT_CTL1_LED (1 << 7)
|
||||
#define BIT_CTL1_RESETFSM (1 << 0)
|
||||
#define BIT_CTL1_ARM (1 << 1)
|
||||
#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
|
||||
#define BIT_CTL1_RESETADC (1 << 6)
|
||||
#define BIT_CTL1_LED (1 << 7)
|
||||
|
||||
/* bits - REG_CTL2 */
|
||||
#define BITS_CTL2_BANK(x) (x & 0x3)
|
||||
#define BIT_CTL2_SLOWMODE (1 << 5)
|
||||
#define BITS_CTL2_BANK(x) (x & 0x3)
|
||||
#define BIT_CTL2_SLOWMODE (1 << 5)
|
||||
|
||||
struct rate_map {
|
||||
uint32_t rate;
|
||||
|
|
@ -194,26 +192,26 @@ struct rate_map {
|
|||
};
|
||||
|
||||
static struct rate_map rate_map[] = {
|
||||
{ SR_MHZ(200), 0x0205, 0 },
|
||||
{ SR_MHZ(100), 0x0105, 0 },
|
||||
{ SR_MHZ(50), 0x0005, 0 },
|
||||
{ SR_MHZ(20), 0x0303, 0 },
|
||||
{ SR_MHZ(10), 0x0308, 0 },
|
||||
{ SR_MHZ(5), 0x030c, 0 },
|
||||
{ SR_MHZ(2), 0x0330, 0 },
|
||||
{ SR_MHZ(1), 0x0362, 0 },
|
||||
{ SR_KHZ(500), 0x03c6, 0 },
|
||||
{ SR_KHZ(200), 0x07f2, 0 },
|
||||
{ SR_KHZ(100), 0x0fe6, 0 },
|
||||
{ SR_KHZ(50), 0x1fce, 0 },
|
||||
{ SR_KHZ(20), 0x4f86, 0 },
|
||||
{ SR_KHZ(10), 0x9f0e, 0 },
|
||||
{ SR_KHZ(5), 0x03c7, 0x20 },
|
||||
{ SR_KHZ(2), 0x07f3, 0x20 },
|
||||
{ SR_KHZ(1), 0x0fe7, 0x20 },
|
||||
{ 500, 0x1fcf, 0x20 },
|
||||
{ 200, 0x4f87, 0x20 },
|
||||
{ 100, 0x9f0f, 0x20 },
|
||||
{ SR_MHZ(200), 0x0205, 0 },
|
||||
{ SR_MHZ(100), 0x0105, 0 },
|
||||
{ SR_MHZ(50), 0x0005, 0 },
|
||||
{ SR_MHZ(20), 0x0303, 0 },
|
||||
{ SR_MHZ(10), 0x0308, 0 },
|
||||
{ SR_MHZ(5), 0x030c, 0 },
|
||||
{ SR_MHZ(2), 0x0330, 0 },
|
||||
{ SR_MHZ(1), 0x0362, 0 },
|
||||
{ SR_KHZ(500), 0x03c6, 0 },
|
||||
{ SR_KHZ(200), 0x07f2, 0 },
|
||||
{ SR_KHZ(100), 0x0fe6, 0 },
|
||||
{ SR_KHZ(50), 0x1fce, 0 },
|
||||
{ SR_KHZ(20), 0x4f86, 0 },
|
||||
{ SR_KHZ(10), 0x9f0e, 0 },
|
||||
{ SR_KHZ(5), 0x03c7, 0x20 },
|
||||
{ SR_KHZ(2), 0x07f3, 0x20 },
|
||||
{ SR_KHZ(1), 0x0fe7, 0x20 },
|
||||
{ SR_HZ(500), 0x1fcf, 0x20 },
|
||||
{ SR_HZ(200), 0x4f87, 0x20 },
|
||||
{ SR_HZ(100), 0x9f0f, 0x20 },
|
||||
};
|
||||
|
||||
/* FIXME: Determine corresponding voltages */
|
||||
|
|
|
|||
Loading…
Reference in New Issue