BLAHAJ
/
libsigrok
10
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

sysclk-lwla: Simplify trigger mask generation

This commit is contained in:
Daniel Elstner 2015-11-27 23:44:11 +01:00
parent 93ed0241aa
commit 09ffac33b7
1 changed files with 15 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

32
src/hardware/sysclk-lwla/api.c
View File

@ -594,13 +594,14 @@ static int prepare_trigger_masks(const struct sr_dev_inst *sdi)
uint64_t trigger_mask; uint64_t trigger_mask;
uint64_t trigger_values; uint64_t trigger_values;
uint64_t trigger_edge_mask; uint64_t trigger_edge_mask;
uint64_t channel_bit; uint64_t level_bit, type_bit;
struct dev_context *devc; struct dev_context *devc;
struct sr_trigger *trigger; struct sr_trigger *trigger;
struct sr_trigger_stage *stage; struct sr_trigger_stage *stage;
struct sr_trigger_match *match; struct sr_trigger_match *match;
const GSList *node; const GSList *node;
int idx; int idx;
enum sr_trigger_matches trg;
devc = sdi->priv; devc = sdi->priv;
@ -625,30 +626,27 @@ static int prepare_trigger_masks(const struct sr_dev_inst *sdi)
continue; /* ignore disabled channel */ continue; /* ignore disabled channel */
idx = match->channel->index; idx = match->channel->index;
trg = match->match;
if (idx < 0 || idx >= devc->model->num_channels) { if (idx < 0 || idx >= devc->model->num_channels) {
sr_err("Channel index %d out of range.", idx); sr_err("Channel index %d out of range.", idx);
return SR_ERR_BUG; /* should not happen */ return SR_ERR_BUG; /* should not happen */
} }
channel_bit = UINT64_C(1) << idx; if (trg != SR_TRIGGER_ZERO
trigger_mask |= channel_bit; && trg != SR_TRIGGER_ONE
&& trg != SR_TRIGGER_RISING
switch (match->match) { && trg != SR_TRIGGER_FALLING) {
case SR_TRIGGER_ZERO:
break;
case SR_TRIGGER_ONE:
trigger_values |= channel_bit;
break;
case SR_TRIGGER_RISING:
trigger_values |= channel_bit;
/* Fall through for edge mask. */
case SR_TRIGGER_FALLING:
trigger_edge_mask |= channel_bit;
break;
default:
sr_err("Unsupported trigger match for CH%d.", idx + 1); sr_err("Unsupported trigger match for CH%d.", idx + 1);
return SR_ERR_ARG; return SR_ERR_ARG;
} }
level_bit = (trg == SR_TRIGGER_ONE
|| trg == SR_TRIGGER_RISING) ? 1 : 0;
type_bit = (trg == SR_TRIGGER_RISING
|| trg == SR_TRIGGER_FALLING) ? 1 : 0;
trigger_mask |= UINT64_C(1) << idx;
trigger_values |= level_bit << idx;
trigger_edge_mask |= type_bit << idx;
} }
devc->trigger_mask = trigger_mask; devc->trigger_mask = trigger_mask;
devc->trigger_values = trigger_values; devc->trigger_values = trigger_values;