zeroplus-logic-cube: Fix samplerate and trigger
- Default to 1MHz. The default sample rate is the lowest frequency (100Hz), but it takes a very long time until 128K memory is full. - Fix the 1MHz setting. - Use samplerate list. - Fix 10MHz frequency. - Fix trigger. - Change the size of memory according to the number of samples. - Add pre-trigger (capture ratio) setting. - Fix the first acquisition after power on.
This commit is contained in:
Toshiaki Yoshida
Bert Vermeulen
parent
41d9427f27
commit
0ab0cb942f
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@ -110,11 +110,11 @@ static int g_trigger_count = 1;
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static int g_filter_status[8] = { 0 };
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static int g_filter_enable = 0;
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static int g_freq_value = 100;
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static int g_freq_value = 1;
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static int g_freq_scale = FREQ_SCALE_MHZ;
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static int g_memory_size = MEMORY_SIZE_512K;
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static int g_ramsize_triggerbar_addr = 0x80000 >> 2;
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static int g_triggerbar_addr = 0x3fe;
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static int g_memory_size = MEMORY_SIZE_8K;
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static int g_ramsize_triggerbar_addr = 2 * 1024;
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static int g_triggerbar_addr = 0;
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static int g_compression = COMPRESSION_NONE;
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/* Maybe unk specifies an "endpoint" or "register" of sorts. */
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@ -125,6 +125,7 @@ static int analyzer_write_status(libusb_device_handle *devh, unsigned char unk,
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return gl_reg_write(devh, START_STATUS, unk << 6 | flags);
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}
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#if 0
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static int __analyzer_set_freq(libusb_device_handle *devh, int freq, int scale)
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{
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int reg0 = 0, divisor = 0, reg2 = 0;
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@ -261,6 +262,80 @@ static int __analyzer_set_freq(libusb_device_handle *devh, int freq, int scale)
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return 0;
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}
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#endif
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/*
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* It seems that ...
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* FREQUENCT_REG0 - division factor (?)
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* FREQUENCT_REG1 - multiplication factor (?)
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* FREQUENCT_REG4 - clock selection (?)
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*
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* clock selection
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* 0 10MHz 16 1MHz 32 100kHz 48 10kHz 64 1kHz
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* 1 5MHz 17 500kHz 33 50kHz 49 5kHz 65 500Hz
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* 2 2.5MHz . . 50 2.5kHz 66 250Hz
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* . . . . 67 125Hz
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* . . . . 68 62.5Hz
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*/
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static int __analyzer_set_freq(libusb_device_handle *devh, int freq, int scale)
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{
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struct freq_factor {
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int freq;
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int scale;
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int sel;
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int div;
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int mul;
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};
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static const struct freq_factor f[] = {
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{ 200, FREQ_SCALE_MHZ, 0, 1, 20 },
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{ 150, FREQ_SCALE_MHZ, 0, 1, 15 },
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{ 100, FREQ_SCALE_MHZ, 0, 1, 10 },
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{ 80, FREQ_SCALE_MHZ, 0, 2, 16 },
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{ 50, FREQ_SCALE_MHZ, 0, 2, 10 },
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{ 25, FREQ_SCALE_MHZ, 1, 5, 25 },
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{ 10, FREQ_SCALE_MHZ, 1, 5, 10 },
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{ 1, FREQ_SCALE_MHZ, 16, 5, 5 },
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{ 800, FREQ_SCALE_KHZ, 17, 5, 8 },
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{ 400, FREQ_SCALE_KHZ, 32, 5, 20 },
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{ 200, FREQ_SCALE_KHZ, 32, 5, 10 },
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{ 100, FREQ_SCALE_KHZ, 32, 5, 5 },
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{ 50, FREQ_SCALE_KHZ, 33, 5, 5 },
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{ 25, FREQ_SCALE_KHZ, 49, 5, 25 },
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{ 5, FREQ_SCALE_KHZ, 50, 5, 10 },
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{ 1, FREQ_SCALE_KHZ, 64, 5, 5 },
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{ 500, FREQ_SCALE_HZ, 64, 10, 5 },
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{ 100, FREQ_SCALE_HZ, 68, 5, 8 },
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{ 0, 0, 0, 0, 0 }
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};
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int i;
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for (i = 0; f[i].freq; i++) {
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if (scale == f[i].scale && freq == f[i].freq)
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break;
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}
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if (!f[i].freq)
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return -1;
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sr_dbg("zp: Setting samplerate regs (freq=%d, scale=%d): "
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"reg0: %d, reg1: %d, reg2: %d, reg3: %d.",
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freq, scale, f[i].div, f[i].mul, 0x02, f[i].sel);
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if (gl_reg_write(devh, FREQUENCY_REG0, f[i].div) < 0)
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return -1;
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if (gl_reg_write(devh, FREQUENCY_REG1, f[i].mul) < 0)
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return -1;
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if (gl_reg_write(devh, FREQUENCY_REG2, 0x02) < 0)
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return -1;
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if (gl_reg_write(devh, FREQUENCY_REG4, f[i].sel) < 0)
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return -1;
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return 0;
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}
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static void __analyzer_set_ramsize_trigger_address(libusb_device_handle *devh,
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unsigned int address)
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@ -399,7 +474,10 @@ SR_PRIV void analyzer_configure(libusb_device_handle *devh)
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__analyzer_set_triggerbar_address(devh, g_triggerbar_addr);
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/* Set_Dont_Care_TriggerBar */
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gl_reg_write(devh, DONT_CARE_TRIGGERBAR, 0x01);
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if (g_triggerbar_addr)
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gl_reg_write(devh, DONT_CARE_TRIGGERBAR, 0x00);
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else
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gl_reg_write(devh, DONT_CARE_TRIGGERBAR, 0x01);
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/* Enable_Status */
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analyzer_set_filter(devh);
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@ -413,44 +491,26 @@ SR_PRIV void analyzer_configure(libusb_device_handle *devh)
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SR_PRIV void analyzer_add_trigger(int channel, int type)
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{
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int i;
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if ((channel & 0xf) >= 8)
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return;
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if (type == TRIGGER_HIGH || type == TRIGGER_LOW) {
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if (channel & CHANNEL_A)
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i = 0;
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else if (channel & CHANNEL_B)
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i = 2;
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else if (channel & CHANNEL_C)
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i = 4;
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else if (channel & CHANNEL_D)
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i = 6;
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else
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return;
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if ((channel & 0xf) >= 4) {
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i++;
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channel -= 4;
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}
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g_trigger_status[i] |=
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1 << ((2 * channel) + (type == TRIGGER_LOW ? 1 : 0));
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} else {
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if (type == TRIGGER_POSEDGE)
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g_trigger_status[8] = 0x40;
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else if (type == TRIGGER_NEGEDGE)
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g_trigger_status[8] = 0x80;
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else
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g_trigger_status[8] = 0xc0;
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/* FIXME: Just guessed the index; need to verify. */
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if (channel & CHANNEL_B)
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g_trigger_status[8] += 8;
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else if (channel & CHANNEL_C)
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g_trigger_status[8] += 16;
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else if (channel & CHANNEL_D)
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g_trigger_status[8] += 24;
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g_trigger_status[8] += channel % 8;
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switch (type) {
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case TRIGGER_HIGH:
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g_trigger_status[channel / 4] |= 1 << (channel % 4 * 2);
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break;
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case TRIGGER_LOW:
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g_trigger_status[channel / 4] |= 2 << (channel % 4 * 2);
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break;
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#if 0
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case TRIGGER_POSEDGE:
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g_trigger_status[8] = 0x40 | channel;
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break;
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case TRIGGER_NEGEDGE:
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g_trigger_status[8] = 0x80 | channel;
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break;
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case TRIGGER_ANYEDGE:
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g_trigger_status[8] = 0xc0 | channel;
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break;
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#endif
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default:
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break;
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}
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}
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@ -511,6 +571,11 @@ SR_PRIV void analyzer_set_triggerbar_address(unsigned int address)
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g_triggerbar_addr = address;
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}
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SR_PRIV unsigned int analyzer_read_status(libusb_device_handle *devh)
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{
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return gl_reg_read(devh, DEV_STATUS);
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}
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SR_PRIV unsigned int analyzer_read_id(libusb_device_handle *devh)
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{
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return gl_reg_read(devh, DEV_ID1) << 8 | gl_reg_read(devh, DEV_ID0);
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@ -85,6 +85,7 @@ SR_PRIV void analyzer_add_trigger(int channel, int type);
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SR_PRIV void analyzer_set_trigger_count(int count);
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SR_PRIV void analyzer_add_filter(int channel, int type);
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SR_PRIV unsigned int analyzer_read_status(libusb_device_handle *devh);
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SR_PRIV unsigned int analyzer_read_id(libusb_device_handle *devh);
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SR_PRIV unsigned int analyzer_get_stop_address(libusb_device_handle *devh);
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SR_PRIV unsigned int analyzer_get_now_address(libusb_device_handle *devh);
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@ -42,6 +42,8 @@
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#define PACKET_SIZE 2048 /* ?? */
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//#define ZP_EXPERIMENTAL
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typedef struct {
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unsigned short vid;
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unsigned short pid;
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@ -149,20 +151,22 @@ static const struct sr_samplerates samplerates = {
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/* Private, per-device-instance driver context. */
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struct dev_context {
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uint64_t cur_samplerate;
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uint64_t max_samplerate;
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uint64_t limit_samples;
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int num_channels; /* TODO: This isn't initialized before it's needed :( */
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uint64_t memory_size;
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uint8_t probe_mask;
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uint8_t trigger_mask[NUM_TRIGGER_STAGES];
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uint8_t trigger_value[NUM_TRIGGER_STAGES];
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int memory_size;
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unsigned int max_memory_size;
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//uint8_t probe_mask;
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//uint8_t trigger_mask[NUM_TRIGGER_STAGES];
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//uint8_t trigger_value[NUM_TRIGGER_STAGES];
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// uint8_t trigger_buffer[NUM_TRIGGER_STAGES];
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int trigger;
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unsigned int capture_ratio;
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/* TODO: this belongs in the device instance */
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struct sr_usb_dev_inst *usb;
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};
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static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
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const void *value);
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static int hw_dev_close(struct sr_dev_inst *sdi);
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static unsigned int get_memory_size(int type)
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@ -179,6 +183,7 @@ static unsigned int get_memory_size(int type)
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return 0;
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}
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#if 0
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static int configure_probes(const struct sr_dev_inst *sdi)
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{
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struct dev_context *devc;
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@ -219,6 +224,53 @@ static int configure_probes(const struct sr_dev_inst *sdi)
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return SR_OK;
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}
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#endif
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static int configure_probes(const struct sr_dev_inst *sdi)
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{
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struct dev_context *devc;
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const GSList *l;
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const struct sr_probe *probe;
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char *tc;
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int type;
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/* Note: sdi and sdi->priv are non-NULL, the caller checked this. */
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devc = sdi->priv;
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for (l = sdi->probes; l; l = l->next) {
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probe = (struct sr_probe *)l->data;
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if (probe->enabled == FALSE)
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continue;
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if ((tc = probe->trigger)) {
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switch (*tc) {
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case '1':
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type = TRIGGER_HIGH;
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break;
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case '0':
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type = TRIGGER_LOW;
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break;
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#if 0
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case 'r':
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type = TRIGGER_POSEDGE;
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break;
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case 'f':
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type = TRIGGER_NEGEDGE;
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break;
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case 'c':
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type = TRIGGER_ANYEDGE;
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break;
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#endif
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default:
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return SR_ERR;
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}
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analyzer_add_trigger(probe->index, type);
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devc->trigger = 1;
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}
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}
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return SR_OK;
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}
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static int clear_instances(void)
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{
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@ -325,7 +377,15 @@ static GSList *hw_scan(GSList *options)
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}
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sdi->priv = devc;
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devc->num_channels = prof->channels;
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devc->memory_size = prof->sample_depth * 1024;
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#ifdef ZP_EXPERIMENTAL
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devc->max_memory_size = 128 * 1024;
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devc->max_samplerate = 200;
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#else
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devc->max_memory_size = prof->sample_depth * 1024;
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devc->max_samplerate = prof->max_sampling_freq;
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#endif
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devc->max_samplerate *= SR_MHZ(1);
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devc->memory_size = MEMORY_SIZE_8K;
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// memset(devc->trigger_buffer, 0, NUM_TRIGGER_STAGES);
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/* Fill in probelist according to this device's profile. */
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@ -418,16 +478,18 @@ static int hw_dev_open(struct sr_dev_inst *sdi)
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return SR_ERR;
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}
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/* Set default configuration after power on */
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if (analyzer_read_status(devc->usb->devhdl) == 0)
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analyzer_configure(devc->usb->devhdl);
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analyzer_reset(devc->usb->devhdl);
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analyzer_initialize(devc->usb->devhdl);
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analyzer_set_memory_size(MEMORY_SIZE_512K);
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//analyzer_set_memory_size(MEMORY_SIZE_512K);
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// analyzer_set_freq(g_freq, g_freq_scale);
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analyzer_set_trigger_count(1);
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// analyzer_set_ramsize_trigger_address((((100 - g_pre_trigger)
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// * get_memory_size(g_memory_size)) / 100) >> 2);
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analyzer_set_ramsize_trigger_address(
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(100 * get_memory_size(MEMORY_SIZE_512K) / 100) >> 2);
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#if 0
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if (g_double_mode == 1)
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@ -439,10 +501,9 @@ static int hw_dev_open(struct sr_dev_inst *sdi)
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analyzer_set_compression(COMPRESSION_NONE);
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if (devc->cur_samplerate == 0) {
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/* Samplerate hasn't been set. Default to the slowest one. */
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if (hw_dev_config_set(sdi, SR_HWCAP_SAMPLERATE,
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&samplerates.list[0]) == SR_ERR)
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return SR_ERR;
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/* Samplerate hasn't been set. Default to 1MHz. */
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analyzer_set_freq(1, FREQ_SCALE_MHZ);
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devc->cur_samplerate = SR_MHZ(1);
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}
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return SR_OK;
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@ -533,7 +594,70 @@ static int hw_info_get(int info_id, const void **data,
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return SR_OK;
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}
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static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
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static int set_samplerate(struct dev_context *devc, uint64_t samplerate)
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{
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int i;
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for (i = 0; supported_samplerates[i]; i++)
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if (samplerate == supported_samplerates[i])
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break;
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if (!supported_samplerates[i] || samplerate > devc->max_samplerate) {
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sr_err("zp: %s: unsupported samplerate", __func__);
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return SR_ERR_ARG;
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}
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sr_info("zp: Setting samplerate to %" PRIu64 "Hz.", samplerate);
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if (samplerate >= SR_MHZ(1))
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analyzer_set_freq(samplerate / SR_MHZ(1), FREQ_SCALE_MHZ);
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else if (samplerate >= SR_KHZ(1))
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analyzer_set_freq(samplerate / SR_KHZ(1), FREQ_SCALE_KHZ);
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else
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analyzer_set_freq(samplerate, FREQ_SCALE_HZ);
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devc->cur_samplerate = samplerate;
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return SR_OK;
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}
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static int set_limit_samples(struct dev_context *devc, uint64_t samples)
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{
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devc->limit_samples = samples;
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if (samples <= 2 * 1024)
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devc->memory_size = MEMORY_SIZE_8K;
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else if (samples <= 16 * 1024)
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devc->memory_size = MEMORY_SIZE_64K;
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else if (samples <= 32 * 1024 ||
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devc->max_memory_size <= 32 * 1024)
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devc->memory_size = MEMORY_SIZE_128K;
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else
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devc->memory_size = MEMORY_SIZE_512K;
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sr_info("zp: Setting memory size to %dK.",
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get_memory_size(devc->memory_size) / 1024);
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analyzer_set_memory_size(devc->memory_size);
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return SR_OK;
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}
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static int set_capture_ratio(struct dev_context *devc, uint64_t ratio)
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{
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if (ratio > 100) {
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sr_err("zp: %s: invalid capture ratio", __func__);
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return SR_ERR_ARG;
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}
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devc->capture_ratio = ratio;
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sr_info("zp: Setting capture ratio to %d%%.", devc->capture_ratio);
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return SR_OK;
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}
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static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
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const void *value)
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{
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struct dev_context *devc;
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@ -547,41 +671,47 @@ static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
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return SR_ERR_ARG;
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}
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sr_info("zp: Setting samplerate to %" PRIu64 "Hz.", samplerate);
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if (samplerate > SR_MHZ(1))
|
||||
analyzer_set_freq(samplerate / SR_MHZ(1), FREQ_SCALE_MHZ);
|
||||
else if (samplerate > SR_KHZ(1))
|
||||
analyzer_set_freq(samplerate / SR_KHZ(1), FREQ_SCALE_KHZ);
|
||||
else
|
||||
analyzer_set_freq(samplerate, FREQ_SCALE_HZ);
|
||||
|
||||
devc->cur_samplerate = samplerate;
|
||||
|
||||
return SR_OK;
|
||||
}
|
||||
|
||||
static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
|
||||
const void *value)
|
||||
{
|
||||
struct dev_context *devc;
|
||||
|
||||
if (!(devc = sdi->priv)) {
|
||||
sr_err("zp: %s: sdi->priv was NULL", __func__);
|
||||
return SR_ERR_ARG;
|
||||
}
|
||||
|
||||
switch (hwcap) {
|
||||
case SR_HWCAP_SAMPLERATE:
|
||||
return set_samplerate(sdi, *(const uint64_t *)value);
|
||||
return set_samplerate(devc, *(const uint64_t *)value);
|
||||
case SR_HWCAP_LIMIT_SAMPLES:
|
||||
devc->limit_samples = *(const uint64_t *)value;
|
||||
return SR_OK;
|
||||
return set_limit_samples(devc, *(const uint64_t *)value);
|
||||
case SR_HWCAP_CAPTURE_RATIO:
|
||||
return set_capture_ratio(devc, *(const uint64_t *)value);
|
||||
default:
|
||||
return SR_ERR;
|
||||
}
|
||||
}
|
||||
|
||||
static void set_triggerbar(struct dev_context *devc)
|
||||
{
|
||||
unsigned int ramsize;
|
||||
unsigned int n;
|
||||
unsigned int triggerbar;
|
||||
|
||||
ramsize = get_memory_size(devc->memory_size) / 4;
|
||||
if (devc->trigger) {
|
||||
n = ramsize;
|
||||
if (devc->max_memory_size < n)
|
||||
n = devc->max_memory_size;
|
||||
if (devc->limit_samples < n)
|
||||
n = devc->limit_samples;
|
||||
n = n * devc->capture_ratio / 100;
|
||||
if (n > ramsize - 8)
|
||||
triggerbar = ramsize - 8;
|
||||
else
|
||||
triggerbar = n;
|
||||
} else {
|
||||
triggerbar = 0;
|
||||
}
|
||||
analyzer_set_triggerbar_address(triggerbar);
|
||||
analyzer_set_ramsize_trigger_address(ramsize - triggerbar);
|
||||
|
||||
sr_dbg("zp: triggerbar_address = %d(0x%x)", triggerbar, triggerbar);
|
||||
sr_dbg("zp: ramsize_triggerbar_address = %d(0x%x)",
|
||||
ramsize - triggerbar, ramsize - triggerbar);
|
||||
}
|
||||
|
||||
static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
||||
void *cb_data)
|
||||
{
|
||||
|
|
@ -589,9 +719,10 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
|||
struct sr_datafeed_logic logic;
|
||||
struct sr_datafeed_header header;
|
||||
struct sr_datafeed_meta_logic meta;
|
||||
uint64_t samples_read;
|
||||
//uint64_t samples_read;
|
||||
int res;
|
||||
unsigned int packet_num;
|
||||
unsigned int n;
|
||||
unsigned char *buf;
|
||||
struct dev_context *devc;
|
||||
|
||||
|
|
@ -605,6 +736,8 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
|||
return SR_ERR;
|
||||
}
|
||||
|
||||
set_triggerbar(devc);
|
||||
|
||||
/* push configured settings to device */
|
||||
analyzer_configure(devc->usb->devhdl);
|
||||
|
||||
|
|
@ -637,13 +770,15 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
|||
return SR_ERR_MALLOC;
|
||||
}
|
||||
|
||||
samples_read = 0;
|
||||
//samples_read = 0;
|
||||
analyzer_read_start(devc->usb->devhdl);
|
||||
/* Send the incoming transfer to the session bus. */
|
||||
for (packet_num = 0; packet_num < (devc->memory_size * 4 / PACKET_SIZE);
|
||||
packet_num++) {
|
||||
n = get_memory_size(devc->memory_size);
|
||||
if (devc->max_memory_size * 4 < n)
|
||||
n = devc->max_memory_size * 4;
|
||||
for (packet_num = 0; packet_num < n / PACKET_SIZE; packet_num++) {
|
||||
res = analyzer_read_data(devc->usb->devhdl, buf, PACKET_SIZE);
|
||||
sr_info("zp: Tried to read %llx bytes, actually read %x bytes",
|
||||
sr_info("zp: Tried to read %d bytes, actually read %d bytes",
|
||||
PACKET_SIZE, res);
|
||||
|
||||
packet.type = SR_DF_LOGIC;
|
||||
|
|
@ -652,7 +787,7 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
|
|||
logic.unitsize = 4;
|
||||
logic.data = buf;
|
||||
sr_session_send(cb_data, &packet);
|
||||
samples_read += res / 4;
|
||||
//samples_read += res / 4;
|
||||
}
|
||||
analyzer_read_stop(devc->usb->devhdl);
|
||||
g_free(buf);
|
||||
|
|
|
|||
Loading…
Reference in New Issue