rigol-ds: Send some commands on 1st frame only
This can speed up reading of multiple segments by a factor 2 (9s vs 18s when reading 5 frames with 2 channels and 7 kSa)
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06ed999aa4
commit
16e96ca3af
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@ -293,6 +293,8 @@ static const struct rigol_ds_model supported_models[] = {
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static struct sr_dev_driver rigol_ds_driver_info;
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static struct sr_dev_driver rigol_ds_driver_info;
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static int analog_frame_size(const struct sr_dev_inst *);
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static void clear_helper(struct dev_context *devc)
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static void clear_helper(struct dev_context *devc)
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{
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{
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unsigned int i;
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unsigned int i;
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@ -338,6 +338,8 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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if (!(devc = sdi->priv))
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if (!(devc = sdi->priv))
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return SR_ERR;
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return SR_ERR;
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const gboolean first_frame = (devc->num_frames == 0);
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uint64_t limit_frames = devc->limit_frames;
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uint64_t limit_frames = devc->limit_frames;
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if (devc->num_frames_segmented != 0 && devc->num_frames_segmented < limit_frames)
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if (devc->num_frames_segmented != 0 && devc->num_frames_segmented < limit_frames)
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limit_frames = devc->num_frames_segmented;
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limit_frames = devc->num_frames_segmented;
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@ -374,17 +376,17 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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case PROTOCOL_V3:
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case PROTOCOL_V3:
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case PROTOCOL_V4:
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case PROTOCOL_V4:
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case PROTOCOL_V5:
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case PROTOCOL_V5:
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if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
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if (first_frame && rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
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return SR_ERR;
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return SR_ERR;
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if (devc->data_source == DATA_SOURCE_LIVE) {
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if (devc->data_source == DATA_SOURCE_LIVE) {
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if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
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if (first_frame && rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
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return SR_ERR;
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return SR_ERR;
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devc->analog_frame_size = devc->model->series->live_samples;
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devc->analog_frame_size = devc->model->series->live_samples;
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devc->digital_frame_size = devc->model->series->live_samples;
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devc->digital_frame_size = devc->model->series->live_samples;
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rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
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rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
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} else {
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} else {
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if (devc->model->series->protocol == PROTOCOL_V3) {
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if (devc->model->series->protocol == PROTOCOL_V3) {
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if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
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if (first_frame && rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
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return SR_ERR;
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return SR_ERR;
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} else if (devc->model->series->protocol >= PROTOCOL_V4) {
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} else if (devc->model->series->protocol >= PROTOCOL_V4) {
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num_channels = 0;
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num_channels = 0;
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@ -404,7 +406,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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}
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}
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buffer_samples = devc->model->series->buffer_samples;
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buffer_samples = devc->model->series->buffer_samples;
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if (buffer_samples == 0)
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if (first_frame && buffer_samples == 0)
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{
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{
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/* The DS4000 series does not have a fixed memory depth, it
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/* The DS4000 series does not have a fixed memory depth, it
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* can be chosen from the menu and also varies with number
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* can be chosen from the menu and also varies with number
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@ -414,7 +416,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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devc->analog_frame_size = devc->digital_frame_size =
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devc->analog_frame_size = devc->digital_frame_size =
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buffer_samples;
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buffer_samples;
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}
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}
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else
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else if (first_frame)
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{
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{
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/* The DS1000Z series has a fixed memory depth which we
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/* The DS1000Z series has a fixed memory depth which we
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* need to divide correctly according to the number of
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* need to divide correctly according to the number of
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@ -428,7 +430,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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}
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}
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}
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}
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if (rigol_ds_config_set(sdi, ":SING") != SR_OK)
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if (devc->data_source == DATA_SOURCE_LIVE && rigol_ds_config_set(sdi, ":SINGL") != SR_OK)
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return SR_ERR;
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return SR_ERR;
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rigol_ds_set_wait_event(devc, WAIT_STOP);
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rigol_ds_set_wait_event(devc, WAIT_STOP);
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if (devc->data_source == DATA_SOURCE_SEGMENTED &&
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if (devc->data_source == DATA_SOURCE_SEGMENTED &&
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@ -455,6 +457,8 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
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sr_dbg("Starting reading data from channel %d", ch->index + 1);
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sr_dbg("Starting reading data from channel %d", ch->index + 1);
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const gboolean first_frame = (devc->num_frames == 0);
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switch (devc->model->series->protocol) {
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switch (devc->model->series->protocol) {
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case PROTOCOL_V1:
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case PROTOCOL_V1:
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case PROTOCOL_V2:
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case PROTOCOL_V2:
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@ -496,7 +500,7 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
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return SR_ERR;
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return SR_ERR;
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}
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}
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if (rigol_ds_config_set(sdi,
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if (first_frame && rigol_ds_config_set(sdi,
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devc->data_source == DATA_SOURCE_LIVE ?
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devc->data_source == DATA_SOURCE_LIVE ?
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":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
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":WAV:MODE NORM" :":WAV:MODE RAW") != SR_OK)
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return SR_ERR;
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return SR_ERR;
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@ -511,15 +515,15 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
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if (devc->model->series->protocol >= PROTOCOL_V3 &&
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if (devc->model->series->protocol >= PROTOCOL_V3 &&
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ch->type == SR_CHANNEL_ANALOG) {
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ch->type == SR_CHANNEL_ANALOG) {
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/* Vertical increment. */
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/* Vertical increment. */
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if (sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
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if (first_frame && sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
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&devc->vert_inc[ch->index]) != SR_OK)
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&devc->vert_inc[ch->index]) != SR_OK)
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return SR_ERR;
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return SR_ERR;
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/* Vertical origin. */
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/* Vertical origin. */
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if (sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
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if (first_frame && sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
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&devc->vert_origin[ch->index]) != SR_OK)
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&devc->vert_origin[ch->index]) != SR_OK)
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return SR_ERR;
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return SR_ERR;
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/* Vertical reference. */
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/* Vertical reference. */
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if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
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if (first_frame && sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
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&devc->vert_reference[ch->index]) != SR_OK)
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&devc->vert_reference[ch->index]) != SR_OK)
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return SR_ERR;
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return SR_ERR;
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} else if (ch->type == SR_CHANNEL_ANALOG) {
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} else if (ch->type == SR_CHANNEL_ANALOG) {
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@ -621,6 +625,8 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
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if (!(revents == G_IO_IN || revents == 0))
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if (!(revents == G_IO_IN || revents == 0))
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return TRUE;
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return TRUE;
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const gboolean first_frame = (devc->num_frames == 0);
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switch (devc->wait_event) {
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switch (devc->wait_event) {
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case WAIT_NONE:
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case WAIT_NONE:
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break;
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break;
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@ -654,10 +660,10 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
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if (devc->num_block_bytes == 0) {
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if (devc->num_block_bytes == 0) {
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if (devc->model->series->protocol >= PROTOCOL_V4) {
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if (devc->model->series->protocol >= PROTOCOL_V4) {
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if (rigol_ds_config_set(sdi, ":WAV:START %d",
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if (first_frame && rigol_ds_config_set(sdi, ":WAV:START %d",
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devc->num_channel_bytes + 1) != SR_OK)
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devc->num_channel_bytes + 1) != SR_OK)
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return TRUE;
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return TRUE;
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if (rigol_ds_config_set(sdi, ":WAV:STOP %d",
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if (first_frame && rigol_ds_config_set(sdi, ":WAV:STOP %d",
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MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
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MIN(devc->num_channel_bytes + ACQ_BLOCK_SIZE,
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devc->analog_frame_size)) != SR_OK)
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devc->analog_frame_size)) != SR_OK)
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return TRUE;
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return TRUE;
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