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asix-sigma: mark FPGA config phase in "state" of dev context 

FPGA configuration (netlist upload) of ASIX SIGMA devices is rather
special a phase, and deserves its own state in the device context's
"state" tracking. Not only is the logic analyzer not available during
this period, the FTDI cable is also put into bitbanging mode instead
of regular data communication in FIFO mode, and netlist configuration
takes a considerable amount of time (tenths of a second).
This commit is contained in:
Gerhard Sittig 2020-05-10 20:06:16 +02:00
parent 5e78a56481
commit 1bb9dc8217
2 changed files with 4 additions and 1 deletions
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4
src/hardware/asix-sigma/protocol.c
View File

@ -511,6 +511,8 @@ static int upload_firmware(struct sr_context *ctx,
return SR_OK;
}
devc->state.state = SIGMA_CONFIG;
/* Set the cable to bitbang mode. */
ret = ftdi_set_bitmode(&devc->ftdic, BB_PINMASK, BITMODE_BITBANG);
if (ret < 0) {
@ -561,6 +563,7 @@ static int upload_firmware(struct sr_context *ctx,
return ret;
/* Keep track of successful firmware download completion. */
devc->state.state = SIGMA_IDLE;
devc->cur_firmware = firmware_idx;
sr_info("Firmware uploaded.");
@ -720,7 +723,6 @@ SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi)
if (ret == SR_OK) {
devc->num_channels = num_channels;
devc->samples_per_event = 16 / devc->num_channels;
devc->state.state = SIGMA_IDLE;
}
return ret;

1
src/hardware/asix-sigma/protocol.h
View File

@ -284,6 +284,7 @@ enum triggerfunc {
struct sigma_state {
enum {
SIGMA_UNINITIALIZED = 0,
SIGMA_CONFIG,
SIGMA_IDLE,
SIGMA_CAPTURE,
SIGMA_STOPPING,