rigol-ds: Use common rigol_ds_config_set() function throughout.
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cf9f4bc5b0
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38354d9d9e
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@ -223,29 +223,6 @@ static int dev_clear(void)
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return std_dev_clear(di, clear_helper);
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}
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static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
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{
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struct dev_context *devc = sdi->priv;
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va_list args;
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int ret;
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va_start(args, format);
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ret = sr_scpi_send_variadic(sdi->conn, format, args);
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va_end(args);
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if (ret != SR_OK)
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return SR_ERR;
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if (devc->model->series == RIGOL_DS1000) {
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/* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
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sr_spew("delay %dms", 100);
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g_usleep(100000);
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return SR_OK;
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} else {
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return sr_scpi_get_opc(sdi->conn);
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}
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}
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static int init(struct sr_context *sr_ctx)
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{
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return std_init(sr_ctx, di, LOG_PREFIX);
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@ -487,7 +464,7 @@ static int dev_close(struct sr_dev_inst *sdi)
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devc = sdi->priv;
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if (devc->model->series != RIGOL_VS5000)
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set_cfg(sdi, ":KEY:LOCK DISABLE");
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rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
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if (scpi) {
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if (sr_scpi_close(scpi) < 0)
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@ -694,7 +671,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
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return SR_ERR;
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g_free(devc->trigger_slope);
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devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
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ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
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ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
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break;
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case SR_CONF_HORIZ_TRIGGERPOS:
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t_dbl = g_variant_get_double(data);
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@ -705,7 +682,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
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* need to express this in seconds. */
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t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
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g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
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ret = set_cfg(sdi, ":TIM:OFFS %s", buffer);
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ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
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break;
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case SR_CONF_TIMEBASE:
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g_variant_get(data, "(tt)", &p, &q);
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@ -714,7 +691,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
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devc->timebase = (float)p / q;
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g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
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devc->timebase);
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ret = set_cfg(sdi, ":TIM:SCAL %s", buffer);
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ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
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break;
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}
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}
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@ -739,7 +716,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
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tmp_str = "CHAN4";
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else
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tmp_str = (char *)devc->trigger_source;
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ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
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ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
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break;
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}
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}
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@ -760,7 +737,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
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devc->vdiv[i] = (float)p / q;
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g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
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devc->vdiv[i]);
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return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1,
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return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
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buffer);
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}
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return SR_ERR_ARG;
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@ -779,7 +756,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
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if (!strcmp(tmp_str, coupling[j])) {
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g_free(devc->coupling[i]);
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devc->coupling[i] = g_strdup(coupling[j]);
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return set_cfg(sdi, ":CHAN%d:COUP %s", i + 1,
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return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
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devc->coupling[i]);
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}
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}
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@ -950,7 +927,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
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devc->enabled_analog_probes, probe);
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if (probe->enabled != devc->analog_channels[probe->index]) {
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/* Enabled channel is currently disabled, or vice versa. */
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if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
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if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", probe->index + 1,
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probe->enabled ? "ON" : "OFF") != SR_OK)
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return SR_ERR;
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devc->analog_channels[probe->index] = probe->enabled;
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@ -961,14 +938,14 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
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devc->enabled_digital_probes, probe);
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/* Turn on LA module if currently off. */
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if (!devc->la_enabled) {
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if (set_cfg(sdi, ":LA:DISP ON") != SR_OK)
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if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
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return SR_ERR;
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devc->la_enabled = TRUE;
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}
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}
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if (probe->enabled != devc->digital_channels[probe->index]) {
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/* Enabled channel is currently disabled, or vice versa. */
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if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
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if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", probe->index,
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probe->enabled ? "ON" : "OFF") != SR_OK)
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return SR_ERR;
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devc->digital_channels[probe->index] = probe->enabled;
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@ -981,11 +958,11 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
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/* Turn off LA module if on and no digital probes selected. */
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if (devc->la_enabled && !devc->enabled_digital_probes)
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if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK)
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if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
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return SR_ERR;
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if (devc->data_source == DATA_SOURCE_LIVE) {
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if (set_cfg(sdi, ":RUN") != SR_OK)
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if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
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return SR_ERR;
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} else if (devc->data_source == DATA_SOURCE_MEMORY) {
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if (devc->model->series != RIGOL_DS2000) {
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@ -1020,11 +997,11 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
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/* Apparently for the DS2000 the memory
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* depth can only be set in Running state -
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* this matches the behaviour of the UI. */
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if (set_cfg(sdi, ":RUN") != SR_OK)
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if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
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return SR_ERR;
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if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
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if (rigol_ds_config_set(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
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return SR_ERR;
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if (set_cfg(sdi, ":STOP") != SR_OK)
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if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
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return SR_ERR;
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}
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if (rigol_ds_capture_start(sdi) != SR_OK)
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@ -215,11 +215,11 @@ static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
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probe = devc->channel_entry->data;
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if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN%d",
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if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
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probe->index + 1) != SR_OK)
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return SR_ERR;
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/* Check that the number of samples will be accepted */
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if (sr_scpi_send(sdi->conn, ":WAV:POIN %d;*OPC", devc->analog_frame_size) != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:POIN %d", devc->analog_frame_size) != SR_OK)
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return SR_ERR;
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if (sr_scpi_get_int(sdi->conn, "*ESR?", &tmp) != SR_OK)
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return SR_ERR;
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@ -239,7 +239,7 @@ static int rigol_ds_check_stop(const struct sr_dev_inst *sdi)
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sr_warn("Single shot acquisition failed, retrying...");
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/* Sleep a bit, otherwise the single shot will often fail */
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g_usleep(500000);
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sr_scpi_send(sdi->conn, ":SING");
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rigol_ds_config_set(sdi, ":SING");
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rigol_ds_set_wait_event(devc, WAIT_STOP);
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return SR_ERR;
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}
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@ -287,6 +287,30 @@ static int rigol_ds_block_wait(const struct sr_dev_inst *sdi)
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return SR_OK;
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}
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/* Send a configuration setting. */
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SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...)
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{
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struct dev_context *devc = sdi->priv;
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va_list args;
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int ret;
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va_start(args, format);
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ret = sr_scpi_send_variadic(sdi->conn, format, args);
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va_end(args);
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if (ret != SR_OK)
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return SR_ERR;
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if (devc->model->series == RIGOL_DS1000) {
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/* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
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sr_spew("delay %dms", 100);
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g_usleep(100000);
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return SR_OK;
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} else {
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return sr_scpi_get_opc(sdi->conn);
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}
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}
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/* Start capturing a new frameset */
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SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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{
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@ -298,16 +322,16 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
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sr_dbg("Starting data capture for frameset %lu of %lu",
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devc->num_frames + 1, devc->limit_frames);
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if (sr_scpi_send(sdi->conn, ":WAV:FORM BYTE") != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:FORM BYTE") != SR_OK)
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return SR_ERR;
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if (devc->data_source == DATA_SOURCE_LIVE) {
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if (sr_scpi_send(sdi->conn, ":WAV:MODE NORM") != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:MODE NORM") != SR_OK)
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return SR_ERR;
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rigol_ds_set_wait_event(devc, WAIT_TRIGGER);
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} else {
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if (sr_scpi_send(sdi->conn, ":WAV:MODE RAW") != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:MODE RAW") != SR_OK)
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return SR_ERR;
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if (sr_scpi_send(sdi->conn, ":SING", devc->analog_frame_size) != SR_OK)
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if (rigol_ds_config_set(sdi, ":SING", devc->analog_frame_size) != SR_OK)
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return SR_ERR;
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rigol_ds_set_wait_event(devc, WAIT_STOP);
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}
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@ -338,13 +362,13 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
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return SR_ERR;
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}
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} else {
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if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN%d",
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if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d",
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probe->index + 1) != SR_OK)
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return SR_ERR;
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if (devc->data_source != DATA_SOURCE_LIVE) {
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if (sr_scpi_send(sdi->conn, ":WAV:RES") != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:RES") != SR_OK)
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return SR_ERR;
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if (sr_scpi_send(sdi->conn, ":WAV:BEG") != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:BEG") != SR_OK)
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return SR_ERR;
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rigol_ds_set_wait_event(devc, WAIT_BLOCK);
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} else
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@ -560,7 +584,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
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* to the next channel causes an error. Fun with
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* firmware...
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*/
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sr_scpi_send(sdi->conn, ":WAV:END");
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rigol_ds_config_set(sdi, ":WAV:END");
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}
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if (probe->type == SR_PROBE_ANALOG
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@ -669,7 +693,7 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
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if (devc->model->series >= RIGOL_DS1000Z) {
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/* Vertical reference - not certain if this is the place to read it. */
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for (i = 0; i < devc->model->analog_channels; i++) {
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if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN%d", i + 1) != SR_OK)
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if (rigol_ds_config_set(sdi, ":WAV:SOUR CHAN%d", i + 1) != SR_OK)
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return SR_ERR;
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if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?", &devc->vert_reference[i]) != SR_OK)
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return SR_ERR;
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@ -148,6 +148,7 @@ struct dev_context {
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float *data;
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};
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SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...);
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SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
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SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
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SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
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