sysclk-lwla: Clarify function of registers 10B0 to 10BC
Apparently, these four registers form an interface for indirect access to another internal 64 bit wide memory. This is likely the same memory as that accessed by the bulk transfer commands 7 and 8.
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@ -83,10 +83,10 @@ enum {
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REG_DIV_BYPASS = 0x1094, /* bypass clock divider flag */
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REG_CMD_CTRL1 = 0x10B0, /* command control ??? */
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REG_CMD_CTRL2 = 0x10B4, /* command control ??? */
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REG_CMD_CTRL3 = 0x10B8, /* command control ??? */
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REG_CMD_CTRL4 = 0x10BC, /* command control ??? */
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REG_LONG_STROBE = 0x10B0, /* long register read/write strobe */
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REG_LONG_ADDR = 0x10B4, /* long register address */
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REG_LONG_LOW = 0x10B8, /* long register low word */
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REG_LONG_HIGH = 0x10BC, /* long register high word */
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REG_FREQ_CH1 = 0x10C0, /* channel 1 live frequency */
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REG_FREQ_CH2 = 0x10C4, /* channel 2 live frequency */
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@ -327,16 +327,16 @@ static void issue_stop_capture(const struct sr_dev_inst *sdi)
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regvals = devc->reg_write_seq;
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regvals[0].reg = REG_CMD_CTRL2;
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regvals[0].reg = REG_LONG_ADDR;
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regvals[0].val = 10;
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regvals[1].reg = REG_CMD_CTRL3;
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regvals[1].reg = REG_LONG_LOW;
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regvals[1].val = 0;
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regvals[2].reg = REG_CMD_CTRL4;
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regvals[2].reg = REG_LONG_HIGH;
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regvals[2].val = 0;
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regvals[3].reg = REG_CMD_CTRL1;
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regvals[3].reg = REG_LONG_STROBE;
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regvals[3].val = 0;
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regvals[4].reg = REG_DIV_BYPASS;
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@ -714,25 +714,25 @@ SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi)
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if (ret != SR_OK)
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return ret;
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ret = lwla_write_reg(sdi->conn, REG_CMD_CTRL2, 100);
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ret = lwla_write_reg(sdi->conn, REG_LONG_ADDR, 100);
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if (ret != SR_OK)
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return ret;
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ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL1, &value);
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ret = lwla_read_reg(sdi->conn, REG_LONG_STROBE, &value);
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if (ret != SR_OK)
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return ret;
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sr_dbg("Received test word 0x%08X back.", value);
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if (value != 0x12345678)
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return SR_ERR;
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ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL4, &value);
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ret = lwla_read_reg(sdi->conn, REG_LONG_HIGH, &value);
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if (ret != SR_OK)
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return ret;
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sr_dbg("Received test word 0x%08X back.", value);
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if (value != 0x12345678)
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return SR_ERR;
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ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL3, &value);
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ret = lwla_read_reg(sdi->conn, REG_LONG_LOW, &value);
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if (ret != SR_OK)
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return ret;
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sr_dbg("Received test word 0x%08X back.", value);
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@ -833,16 +833,16 @@ SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi)
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regvals[1].reg = REG_MEM_CTRL2;
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regvals[1].val = 1;
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regvals[2].reg = REG_CMD_CTRL2;
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regvals[2].reg = REG_LONG_ADDR;
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regvals[2].val = 10;
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regvals[3].reg = REG_CMD_CTRL3;
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regvals[3].reg = REG_LONG_LOW;
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regvals[3].val = 0x74;
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regvals[4].reg = REG_CMD_CTRL4;
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regvals[4].reg = REG_LONG_HIGH;
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regvals[4].val = 0;
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regvals[5].reg = REG_CMD_CTRL1;
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regvals[5].reg = REG_LONG_STROBE;
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regvals[5].val = 0;
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regvals[6].reg = REG_DIV_BYPASS;
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@ -887,16 +887,16 @@ SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
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regvals = devc->reg_write_seq;
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regvals[0].reg = REG_CMD_CTRL2;
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regvals[0].reg = REG_LONG_ADDR;
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regvals[0].val = 10;
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regvals[1].reg = REG_CMD_CTRL3;
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regvals[1].reg = REG_LONG_LOW;
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regvals[1].val = 1;
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regvals[2].reg = REG_CMD_CTRL4;
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regvals[2].reg = REG_LONG_HIGH;
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regvals[2].val = 0;
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regvals[3].reg = REG_CMD_CTRL1;
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regvals[3].reg = REG_LONG_STROBE;
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regvals[3].val = 0;
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devc->reg_write_pos = 0;
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