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sysclk-lwla: Clarify function of registers 10B0 to 10BC 

Apparently, these four registers form an interface for indirect
access to another internal 64 bit wide memory. This is likely the
same memory as that accessed by the bulk transfer commands 7 and 8.
This commit is contained in:
Daniel Elstner 2015-10-25 02:26:44 +01:00
parent 8e0f9bf782
commit 3a322bbc3b
2 changed files with 20 additions and 20 deletions
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8
src/hardware/sysclk-lwla/lwla.h
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@ -83,10 +83,10 @@ enum {
REG_DIV_BYPASS = 0x1094, /* bypass clock divider flag */ REG_DIV_BYPASS = 0x1094, /* bypass clock divider flag */
REG_CMD_CTRL1 = 0x10B0, /* command control ??? */ REG_LONG_STROBE = 0x10B0, /* long register read/write strobe */
REG_CMD_CTRL2 = 0x10B4, /* command control ??? */ REG_LONG_ADDR = 0x10B4, /* long register address */
REG_CMD_CTRL3 = 0x10B8, /* command control ??? */ REG_LONG_LOW = 0x10B8, /* long register low word */
REG_CMD_CTRL4 = 0x10BC, /* command control ??? */ REG_LONG_HIGH = 0x10BC, /* long register high word */
REG_FREQ_CH1 = 0x10C0, /* channel 1 live frequency */ REG_FREQ_CH1 = 0x10C0, /* channel 1 live frequency */
REG_FREQ_CH2 = 0x10C4, /* channel 2 live frequency */ REG_FREQ_CH2 = 0x10C4, /* channel 2 live frequency */

32
src/hardware/sysclk-lwla/protocol.c
View File

@ -327,16 +327,16 @@ static void issue_stop_capture(const struct sr_dev_inst *sdi)
regvals = devc->reg_write_seq; regvals = devc->reg_write_seq;
regvals[0].reg = REG_CMD_CTRL2; regvals[0].reg = REG_LONG_ADDR;
regvals[0].val = 10; regvals[0].val = 10;
regvals[1].reg = REG_CMD_CTRL3; regvals[1].reg = REG_LONG_LOW;
regvals[1].val = 0; regvals[1].val = 0;
regvals[2].reg = REG_CMD_CTRL4; regvals[2].reg = REG_LONG_HIGH;
regvals[2].val = 0; regvals[2].val = 0;
regvals[3].reg = REG_CMD_CTRL1; regvals[3].reg = REG_LONG_STROBE;
regvals[3].val = 0; regvals[3].val = 0;
regvals[4].reg = REG_DIV_BYPASS; regvals[4].reg = REG_DIV_BYPASS;
@ -714,25 +714,25 @@ SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi)
if (ret != SR_OK) if (ret != SR_OK)
return ret; return ret;
ret = lwla_write_reg(sdi->conn, REG_CMD_CTRL2, 100); ret = lwla_write_reg(sdi->conn, REG_LONG_ADDR, 100);
if (ret != SR_OK) if (ret != SR_OK)
return ret; return ret;
ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL1, &value); ret = lwla_read_reg(sdi->conn, REG_LONG_STROBE, &value);
if (ret != SR_OK) if (ret != SR_OK)
return ret; return ret;
sr_dbg("Received test word 0x%08X back.", value); sr_dbg("Received test word 0x%08X back.", value);
if (value != 0x12345678) if (value != 0x12345678)
return SR_ERR; return SR_ERR;
ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL4, &value); ret = lwla_read_reg(sdi->conn, REG_LONG_HIGH, &value);
if (ret != SR_OK) if (ret != SR_OK)
return ret; return ret;
sr_dbg("Received test word 0x%08X back.", value); sr_dbg("Received test word 0x%08X back.", value);
if (value != 0x12345678) if (value != 0x12345678)
return SR_ERR; return SR_ERR;
ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL3, &value); ret = lwla_read_reg(sdi->conn, REG_LONG_LOW, &value);
if (ret != SR_OK) if (ret != SR_OK)
return ret; return ret;
sr_dbg("Received test word 0x%08X back.", value); sr_dbg("Received test word 0x%08X back.", value);
@ -833,16 +833,16 @@ SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi)
regvals[1].reg = REG_MEM_CTRL2; regvals[1].reg = REG_MEM_CTRL2;
regvals[1].val = 1; regvals[1].val = 1;
regvals[2].reg = REG_CMD_CTRL2; regvals[2].reg = REG_LONG_ADDR;
regvals[2].val = 10; regvals[2].val = 10;
regvals[3].reg = REG_CMD_CTRL3; regvals[3].reg = REG_LONG_LOW;
regvals[3].val = 0x74; regvals[3].val = 0x74;
regvals[4].reg = REG_CMD_CTRL4; regvals[4].reg = REG_LONG_HIGH;
regvals[4].val = 0; regvals[4].val = 0;
regvals[5].reg = REG_CMD_CTRL1; regvals[5].reg = REG_LONG_STROBE;
regvals[5].val = 0; regvals[5].val = 0;
regvals[6].reg = REG_DIV_BYPASS; regvals[6].reg = REG_DIV_BYPASS;
@ -887,16 +887,16 @@ SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
regvals = devc->reg_write_seq; regvals = devc->reg_write_seq;
regvals[0].reg = REG_CMD_CTRL2; regvals[0].reg = REG_LONG_ADDR;
regvals[0].val = 10; regvals[0].val = 10;
regvals[1].reg = REG_CMD_CTRL3; regvals[1].reg = REG_LONG_LOW;
regvals[1].val = 1; regvals[1].val = 1;
regvals[2].reg = REG_CMD_CTRL4; regvals[2].reg = REG_LONG_HIGH;
regvals[2].val = 0; regvals[2].val = 0;
regvals[3].reg = REG_CMD_CTRL1; regvals[3].reg = REG_LONG_STROBE;
regvals[3].val = 0; regvals[3].val = 0;
devc->reg_write_pos = 0; devc->reg_write_pos = 0;