dslogic: Implement trigger functionality
This commit implements DSLogic trigger functionality. The following triggers are working: - trigger on rising edge - trigger on falling edge - trigger on any edge - trigger on logic one - trigger on logic zero Pre-trigger capture ratio is also working. Signed-off-by: Diego Asanza <f.asanza@gmail.com> Tested-by: Andrew Bradford <andrew@bradfordembedded.com>
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@ -664,7 +664,7 @@ static int start_transfers(const struct sr_dev_inst *sdi)
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devc->acq_aborted = FALSE;
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devc->acq_aborted = FALSE;
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devc->empty_transfer_count = 0;
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devc->empty_transfer_count = 0;
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if ((trigger = sr_session_trigger_get(sdi->session))) {
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if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
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int pre_trigger_samples = 0;
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int pre_trigger_samples = 0;
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if (devc->limit_samples > 0)
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if (devc->limit_samples > 0)
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pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
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pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
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@ -741,11 +741,11 @@ static void LIBUSB_CALL dslogic_trigger_receive(struct libusb_transfer *transfer
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} else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
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} else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
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&& transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
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&& transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
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tpos = (struct dslogic_trigger_pos *)transfer->buffer;
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tpos = (struct dslogic_trigger_pos *)transfer->buffer;
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sr_dbg("tpos real_pos %.8x ram_saddr %.8x", tpos->real_pos, tpos->ram_saddr);
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sr_info("tpos real_pos %d ram_saddr %d", tpos->real_pos, tpos->ram_saddr);
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devc->trigger_pos = tpos->real_pos;
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g_free(tpos);
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g_free(tpos);
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start_transfers(sdi);
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start_transfers(sdi);
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}
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}
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libusb_free_transfer(transfer);
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libusb_free_transfer(transfer);
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}
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}
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@ -165,14 +165,13 @@ static int dslogic_set_trigger(const struct sr_dev_inst *sdi,
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struct sr_trigger *trigger;
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struct sr_trigger *trigger;
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struct sr_trigger_stage *stage;
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struct sr_trigger_stage *stage;
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struct sr_trigger_match *match;
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struct sr_trigger_match *match;
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struct dev_context *devc;
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struct dev_context *devc;
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devc = sdi->priv;
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const GSList *l, *m;
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const GSList *l, *m;
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int channelbit, i = 0;
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int channelbit, i = 0;
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uint16_t v16;
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uint16_t v16;
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devc = sdi->priv;
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devc->trigger_en = FALSE;
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cfg->trig_mask0[0] = 0xffff;
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cfg->trig_mask0[0] = 0xffff;
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cfg->trig_mask1[0] = 0xffff;
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cfg->trig_mask1[0] = 0xffff;
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@ -188,8 +187,33 @@ static int dslogic_set_trigger(const struct sr_dev_inst *sdi,
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cfg->trig_count0[0] = 0;
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cfg->trig_count0[0] = 0;
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cfg->trig_count1[0] = 0;
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cfg->trig_count1[0] = 0;
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if (!(trigger = sr_session_trigger_get(sdi->session)))
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cfg->trig_pos = 0;
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cfg->trig_sda = 0;
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cfg->trig_glb = 0;
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cfg->trig_adp = cfg->count - cfg->trig_pos - 1;
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for (i = 1; i < 16; i++) {
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cfg->trig_mask0[i] = 0xff;
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cfg->trig_mask1[i] = 0xff;
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cfg->trig_value0[i] = 0;
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cfg->trig_value1[i] = 0;
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cfg->trig_edge0[i] = 0;
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cfg->trig_edge1[i] = 0;
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cfg->trig_count0[i] = 0;
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cfg->trig_count1[i] = 0;
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cfg->trig_logic0[i] = 2;
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cfg->trig_logic1[i] = 2;
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}
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cfg->trig_pos = (uint32_t)(devc->capture_ratio / 100.0 * devc->limit_samples);
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sr_dbg("pos: %d", cfg->trig_pos);
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sr_dbg("configuring trigger");
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if (!(trigger = sr_session_trigger_get(sdi->session))){
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sr_dbg("No session trigger found");
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return SR_OK;
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return SR_OK;
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}
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for (l = trigger->stages; l; l = l->next) {
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for (l = trigger->stages; l; l = l->next) {
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stage = l->data;
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stage = l->data;
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@ -199,7 +223,6 @@ static int dslogic_set_trigger(const struct sr_dev_inst *sdi,
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/* Ignore disabled channels with a trigger. */
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/* Ignore disabled channels with a trigger. */
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continue;
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continue;
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channelbit = 1 << (match->channel->index);
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channelbit = 1 << (match->channel->index);
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devc->trigger_en = TRUE; /* Triggered. */
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/* Simple trigger support (event). */
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/* Simple trigger support (event). */
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if (match->match == SR_TRIGGER_ONE) {
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if (match->match == SR_TRIGGER_ONE) {
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cfg->trig_mask0[0] &= ~channelbit;
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cfg->trig_mask0[0] &= ~channelbit;
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@ -221,34 +244,19 @@ static int dslogic_set_trigger(const struct sr_dev_inst *sdi,
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cfg->trig_value1[0] |= channelbit;
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cfg->trig_value1[0] |= channelbit;
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cfg->trig_edge0[0] |= channelbit;
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cfg->trig_edge0[0] |= channelbit;
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cfg->trig_edge1[0] |= channelbit;
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cfg->trig_edge1[0] |= channelbit;
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} else if (match->match == SR_TRIGGER_EDGE){
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} else if(match->match == SR_TRIGGER_EDGE){
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cfg->trig_edge0[0] |= channelbit;
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cfg->trig_edge0[0] |= channelbit;
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cfg->trig_edge1[0] |= channelbit;
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cfg->trig_edge1[0] |= channelbit;
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}
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}
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}
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}
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}
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}
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v16 = RL16(&cfg->mode);
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if (devc->trigger_en) {
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v16 |= 1 << 0;
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for (i = 1; i < 16; i++) {
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WL16(&cfg->mode, v16);
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cfg->trig_mask0[i] = 0xff;
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cfg->trig_mask1[i] = 0xff;
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cfg->trig_value0[i] = 0;
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cfg->trig_value1[i] = 0;
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cfg->trig_edge0[i] = 0;
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cfg->trig_edge1[i] = 0;
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cfg->trig_count0[i] = 0;
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cfg->trig_count1[i] = 0;
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cfg->trig_logic0[i] = 2;
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cfg->trig_logic1[i] = 2;
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}
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v16 = RL16(&cfg->mode);
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v16 |= 1 << 0;
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WL16(&cfg->mode, v16);
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}
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return SR_OK;
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return SR_OK;
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}
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}
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SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi)
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SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi)
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{
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{
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struct dev_context *devc;
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struct dev_context *devc;
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@ -319,9 +327,8 @@ SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi)
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v16 = 1 << 14;
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v16 = 1 << 14;
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else if (devc->dslogic_mode == DS_OP_LOOPBACK_TEST)
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else if (devc->dslogic_mode == DS_OP_LOOPBACK_TEST)
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v16 = 1 << 13;
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v16 = 1 << 13;
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//if (devc->dslogic_external_clock)
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if (devc->dslogic_external_clock)
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// v16 |= 1 << 1;
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v16 |= 1 << 1;
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//v16 |= 1 << 0;
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WL16(&cfg.mode, v16);
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WL16(&cfg.mode, v16);
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v32 = ceil(SR_MHZ(100) * 1.0 / devc->cur_samplerate);
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v32 = ceil(SR_MHZ(100) * 1.0 / devc->cur_samplerate);
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WL32(&cfg.divider, v32);
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WL32(&cfg.divider, v32);
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@ -55,7 +55,8 @@ struct dslogic_mode {
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struct dslogic_trigger_pos {
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struct dslogic_trigger_pos {
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uint32_t real_pos;
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uint32_t real_pos;
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uint32_t ram_saddr;
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uint32_t ram_saddr;
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uint8_t first_block[504];
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uint32_t remain_cnt;
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uint8_t first_block[500];
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};
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};
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/*
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/*
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@ -306,7 +306,6 @@ SR_PRIV struct dev_context *fx2lafw_dev_new(void)
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devc->limit_samples = 0;
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devc->limit_samples = 0;
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devc->capture_ratio = 0;
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devc->capture_ratio = 0;
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devc->sample_wide = FALSE;
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devc->sample_wide = FALSE;
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devc->trigger_en = FALSE;
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devc->stl = NULL;
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devc->stl = NULL;
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return devc;
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return devc;
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@ -455,6 +454,7 @@ SR_PRIV void LIBUSB_CALL fx2lafw_receive_transfer(struct libusb_transfer *transf
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struct sr_dev_inst *sdi;
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struct sr_dev_inst *sdi;
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struct dev_context *devc;
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struct dev_context *devc;
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gboolean packet_has_error = FALSE;
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gboolean packet_has_error = FALSE;
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struct sr_datafeed_packet packet;
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unsigned int num_samples;
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unsigned int num_samples;
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int trigger_offset, cur_sample_count, unitsize;
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int trigger_offset, cur_sample_count, unitsize;
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int pre_trigger_samples;
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int pre_trigger_samples;
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@ -507,8 +507,6 @@ SR_PRIV void LIBUSB_CALL fx2lafw_receive_transfer(struct libusb_transfer *transf
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} else {
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} else {
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devc->empty_transfer_count = 0;
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devc->empty_transfer_count = 0;
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}
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}
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if (devc->trigger_en)
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devc->trigger_fired = TRUE;
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if (devc->trigger_fired) {
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if (devc->trigger_fired) {
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if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
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if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
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/* Send the incoming transfer to the session bus. */
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/* Send the incoming transfer to the session bus. */
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@ -517,9 +515,29 @@ SR_PRIV void LIBUSB_CALL fx2lafw_receive_transfer(struct libusb_transfer *transf
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else
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else
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num_samples = cur_sample_count;
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num_samples = cur_sample_count;
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devc->send_data_proc(sdi, (uint8_t *)transfer->buffer,
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if(devc->dslogic && devc->trigger_pos > devc->sent_samples
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num_samples * unitsize, unitsize);
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&& devc->trigger_pos <= devc->sent_samples + num_samples){
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devc->sent_samples += num_samples;
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/* dslogic trigger in this block. Send trigger position */
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trigger_offset = devc->trigger_pos - devc->sent_samples;
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/* pre-trigger samples */
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devc->send_data_proc(sdi, (uint8_t *)transfer->buffer,
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trigger_offset * unitsize, unitsize);
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devc->sent_samples += trigger_offset;
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/* trigger position */
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devc->trigger_pos = 0;
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packet.type = SR_DF_TRIGGER;
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packet.payload = NULL;
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sr_session_send(sdi, &packet);
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/* post trigger samples */
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num_samples -= trigger_offset;
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devc->send_data_proc(sdi, (uint8_t *)transfer->buffer
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+ trigger_offset * unitsize, num_samples * unitsize, unitsize);
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devc->sent_samples += num_samples;
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}else{
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devc->send_data_proc(sdi, (uint8_t *)transfer->buffer,
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num_samples * unitsize, unitsize);
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devc->sent_samples += num_samples;
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}
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}
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}
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} else {
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} else {
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trigger_offset = soft_trigger_logic_check(devc->stl,
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trigger_offset = soft_trigger_logic_check(devc->stl,
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@ -133,8 +133,8 @@ struct dev_context {
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/* Is this a DSLogic? */
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/* Is this a DSLogic? */
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gboolean dslogic;
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gboolean dslogic;
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uint16_t dslogic_mode;
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uint16_t dslogic_mode;
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uint32_t trigger_pos;
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int dslogic_external_clock;
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int dslogic_external_clock;
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gboolean trigger_en;
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};
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};
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SR_PRIV int fx2lafw_command_start_acquisition(const struct sr_dev_inst *sdi);
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SR_PRIV int fx2lafw_command_start_acquisition(const struct sr_dev_inst *sdi);
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