BLAHAJ
/
libsigrok
10
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

rigol-ds: Fix memory buffer readout on DS4000 series.

This commit is contained in:
Martin Ling 2018-12-29 03:18:05 +01:00
parent e150d55046
commit 47b821dc7d
2 changed files with 25 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/hardware/rigol-ds/api.c
View File

@ -208,7 +208,7 @@ static const struct rigol_ds_series supported_series[] = {
[DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
{50, 1}, {1, 1000}, 12, 1200, 12000000},
[DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
{1000, 1}, {1, 1000}, 14, 1400, 14000},
{1000, 1}, {1, 1000}, 14, 1400, 0},
[MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
{50, 1}, {2, 1000}, 10, 1000, 8000000},
};

30
src/hardware/rigol-ds/protocol.c
View File

@ -333,6 +333,7 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
struct dev_context *devc;
gchar *trig_mode;
unsigned int num_channels, i, j;
int buffer_samples;
if (!(devc = sdi->priv))
return SR_ERR;
@ -398,12 +399,29 @@ SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi)
}
}
devc->analog_frame_size = devc->digital_frame_size =
num_channels == 1 ?
devc->model->series->buffer_samples :
num_channels == 2 ?
devc->model->series->buffer_samples / 2 :
devc->model->series->buffer_samples / 4;
buffer_samples = devc->model->series->buffer_samples;
if (buffer_samples == 0)
{
/* The DS4000 series does not have a fixed memory depth, it
* can be chosen from the menu and also varies with number
* of active channels. Retrieve the actual number with the
* ACQ:MDEP command. */
sr_scpi_get_int(sdi->conn, "ACQ:MDEP?", &buffer_samples);
devc->analog_frame_size = devc->digital_frame_size =
buffer_samples;
}
else
{
/* The DS1000Z series has a fixed memory depth which we
* need to divide correctly according to the number of
* active channels. */
devc->analog_frame_size = devc->digital_frame_size =
num_channels == 1 ?
buffer_samples :
num_channels == 2 ?
buffer_samples / 2 :
buffer_samples / 4;
}
}
if (rigol_ds_config_set(sdi, ":SING") != SR_OK)