Added missing mso functions
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@ -22,6 +22,140 @@
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extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
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static struct sr_dev_driver *di = &link_mso19_driver_info;
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SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
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{
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struct dev_context *devc = sdi->priv;
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uint16_t ops[16];
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uint16_t dso_trigger = mso_calc_raw_from_mv(devc);
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dso_trigger &= 0x3ff;
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if ((!devc->trigger_slope && devc->trigger_chan == 1) ||
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(devc->trigger_slope &&
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(devc->trigger_chan == 0 ||
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devc->trigger_chan == 2 ||
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devc->trigger_chan == 3)))
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dso_trigger |= 0x400;
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switch (devc->trigger_chan) {
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case 1:
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dso_trigger |= 0xe000;
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case 2:
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dso_trigger |= 0x4000;
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break;
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case 3:
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dso_trigger |= 0x2000;
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break;
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case 4:
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dso_trigger |= 0xa000;
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break;
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case 5:
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dso_trigger |= 0x8000;
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break;
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default:
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case 0:
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break;
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}
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switch (devc->trigger_outsrc) {
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case 1:
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dso_trigger |= 0x800;
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break;
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case 2:
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dso_trigger |= 0x1000;
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break;
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case 3:
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dso_trigger |= 0x1800;
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break;
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}
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ops[0] = mso_trans(5, devc->la_trigger);
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ops[1] = mso_trans(6, devc->la_trigger_mask);
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ops[2] = mso_trans(3, dso_trigger & 0xff);
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ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
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ops[4] = mso_trans(11,
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devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
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/* Select the SPI/I2C trigger config bank */
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ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
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/* Configure the SPI/I2C protocol trigger */
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ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
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ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
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ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
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ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
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ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
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ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
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ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
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ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
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ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
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/* Select the default config bank */
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ops[15] = mso_trans(REG_CTL2, devc->ctlbase2);
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return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
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}
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SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi)
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{
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struct dev_context *devc = sdi->priv;
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return mso_dac_out(sdi, la_threshold_map[devc->la_threshold]);
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}
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SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi)
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{
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uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
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struct dev_context *devc = sdi->priv;
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sr_dbg("Requesting buffer dump.");
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return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
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}
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SR_PRIV int mso_arm(struct sr_dev_inst *sdi)
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{
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struct dev_context *devc = sdi->priv;
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uint16_t ops[] = {
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mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETFSM),
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mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_ARM),
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mso_trans(REG_CTL1, devc->ctlbase1),
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};
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sr_dbg("Requesting trigger arm.");
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return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
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}
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SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi)
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{
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struct dev_context *devc = sdi->priv;
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uint16_t ops[] = {
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mso_trans(REG_CTL1, devc->ctlbase1 | 8),
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mso_trans(REG_CTL1, devc->ctlbase1),
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};
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sr_dbg("Requesting forced capture.");
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return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
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}
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SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
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{
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struct dev_context *devc = sdi->priv;
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uint16_t ops[] = {
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mso_trans(REG_DAC1, (val >> 8) & 0xff),
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mso_trans(REG_DAC2, val & 0xff),
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mso_trans(REG_CTL1, devc->ctlbase1 | BIT_CTL1_RESETADC),
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};
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sr_dbg("Setting dac word to 0x%x.", val);
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return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
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}
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SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc)
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{
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return (uint16_t) (0x200 -
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((devc->dso_trigger_voltage / devc->dso_probe_attn) /
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devc->vbit));
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}
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SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
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struct dev_context *devc)
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{
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@ -151,7 +285,7 @@ SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
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for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
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if (rate_map[i].rate == rate) {
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devc->ctlbase2 = rate_map[i].slowmode;
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ret = mso_clkrate_out(sdi, rate_map[i].val);
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ret = mso_clkrate_out(devc->serial, rate_map[i].val);
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if (ret == SR_OK)
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devc->cur_rate = rate;
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return ret;
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@ -134,6 +134,15 @@ SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi);
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SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val);
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SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate);
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SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data);
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SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi);
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SR_PRIV int mso_configure_threshold_level(struct sr_dev_inst *sdi);
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SR_PRIV int mso_read_buffer(struct sr_dev_inst *sdi);
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SR_PRIV int mso_arm(struct sr_dev_inst *sdi);
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SR_PRIV int mso_force_capture(struct sr_dev_inst *sdi);
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SR_PRIV int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val);
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SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate);
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SR_PRIV inline uint16_t mso_calc_raw_from_mv(struct dev_context *devc);
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SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi);
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///////////////////////
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