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sysclk-lwla: Implement support for the LWLA1034.

This commit is contained in:
Daniel Elstner 2014-01-13 22:57:59 +01:00 committed by Uwe Hermann
parent aeaad0b0b5
commit 5874e88d83
7 changed files with 1745 additions and 77 deletions
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3
contrib/z60_libsigrok.rules
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@ -142,6 +142,9 @@ ATTRS{idVendor}=="0925", ATTRS{idProduct}=="3881", MODE="664", GROUP="plugdev"
# Saleae Logic16
ATTRS{idVendor}=="21a9", ATTRS{idProduct}=="1001", MODE="664", GROUP="plugdev"
# SysClk LWLA1034
ATTRS{idVendor}=="2961", ATTRS{idProduct}=="6689", MODE="664", GROUP="plugdev"
# UNI-T UT-D04 multimeter cable (for various UNI-T and rebranded DMMs)
# http://sigrok.org/wiki/Device_cables#UNI-T_UT-D04
# UNI-T UT325

4
hardware/sysclk-lwla/Makefile.am
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@ -19,11 +19,15 @@
if HW_SYSCLK_LWLA
AM_CPPFLAGS = -DFIRMWARE_DIR='"$(FIRMWARE_DIR)"'
# Local lib, this is NOT meant to be installed!
noinst_LTLIBRARIES = libsigrok_hw_sysclk_lwla.la
libsigrok_hw_sysclk_lwla_la_SOURCES = \
api.c \
lwla.c \
lwla.h \
protocol.c \
protocol.h

378
hardware/sysclk-lwla/api.c
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@ -18,59 +18,208 @@
*/
#include "protocol.h"
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include <glib.h>
#include <libusb.h>
#include <stdlib.h>
#include <string.h>
static const int32_t hwcaps[] = {
SR_CONF_LOGIC_ANALYZER,
SR_CONF_SAMPLERATE,
SR_CONF_EXTERNAL_CLOCK,
SR_CONF_TRIGGER_TYPE,
SR_CONF_LIMIT_SAMPLES,
};
/* The hardware supports more samplerates than these, but these are the
* options hardcoded into the vendor's Windows GUI.
*/
static const uint64_t samplerates[] = {
SR_MHZ(125), SR_MHZ(100),
SR_MHZ(50), SR_MHZ(20), SR_MHZ(10),
SR_MHZ(5), SR_MHZ(2), SR_MHZ(1),
SR_KHZ(500), SR_KHZ(200), SR_KHZ(100),
SR_KHZ(50), SR_KHZ(20), SR_KHZ(10),
SR_KHZ(5), SR_KHZ(2), SR_KHZ(1),
SR_HZ(500), SR_HZ(200), SR_HZ(100),
};
SR_PRIV struct sr_dev_driver sysclk_lwla_driver_info;
static struct sr_dev_driver *di = &sysclk_lwla_driver_info;
static struct sr_dev_driver *const di = &sysclk_lwla_driver_info;
static int init(struct sr_context *sr_ctx)
{
return std_init(sr_ctx, di, LOG_PREFIX);
}
static GSList *gen_probe_list(int num_probes)
{
GSList *list;
struct sr_probe *probe;
int i;
char name[8];
list = NULL;
for (i = num_probes; i > 0; --i) {
/* The LWLA series simply number probes from CH1 to CHxx. */
g_ascii_formatd(name, sizeof name, "CH%.0f", i);
probe = sr_probe_new(i - 1, SR_PROBE_LOGIC, TRUE, name);
list = g_slist_prepend(list, probe);
}
return list;
}
static GSList *scan(GSList *options)
{
GSList *usb_devices, *devices, *node;
struct drv_context *drvc;
GSList *devices;
struct sr_dev_inst *sdi;
struct dev_context *devc;
struct sr_usb_dev_inst *usb;
int device_index;
(void)options;
devices = NULL;
drvc = di->priv;
drvc->instances = NULL;
device_index = 0;
/* TODO: scan for devices, either based on a SR_CONF_CONN option
* or on a USB scan. */
usb_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, USB_VID_PID);
for (node = usb_devices; node != NULL; node = node->next) {
usb = node->data;
/* Allocate memory for our private driver context. */
devc = g_try_new0(struct dev_context, 1);
if (!devc) {
sr_err("Device context malloc failed.");
sr_usb_dev_inst_free(usb);
continue;
}
/* Register the device with libsigrok. */
sdi = sr_dev_inst_new(device_index, SR_ST_INACTIVE,
VENDOR_NAME, MODEL_NAME, NULL);
if (!sdi) {
sr_err("Failed to instantiate device.");
g_free(devc);
sr_usb_dev_inst_free(usb);
continue;
}
sdi->driver = di;
sdi->priv = devc;
sdi->inst_type = SR_INST_USB;
sdi->conn = usb;
sdi->probes = gen_probe_list(NUM_PROBES);
drvc->instances = g_slist_append(drvc->instances, sdi);
devices = g_slist_append(devices, sdi);
}
g_slist_free(usb_devices);
return devices;
}
static GSList *dev_list(void)
{
return ((struct drv_context *)(di->priv))->instances;
struct drv_context *drvc;
drvc = di->priv;
return drvc->instances;
}
static void clear_dev_context(void *priv)
{
struct dev_context *devc;
devc = priv;
sr_dbg("Device context cleared.");
lwla_free_acquisition_state(devc->acquisition);
g_free(devc);
}
static int dev_clear(void)
{
return std_dev_clear(di, NULL);
return std_dev_clear(di, &clear_dev_context);
}
static int dev_open(struct sr_dev_inst *sdi)
{
(void)sdi;
struct drv_context *drvc;
struct dev_context *devc;
struct sr_usb_dev_inst *usb;
int ret;
/* TODO: get handle from sdi->conn and open it. */
drvc = di->priv;
if (!drvc) {
sr_err("Driver was not initialized.");
return SR_ERR;
}
usb = sdi->conn;
devc = sdi->priv;
ret = sr_usb_open(drvc->sr_ctx->libusb_ctx, usb);
if (ret != SR_OK)
return ret;
ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
if (ret < 0) {
sr_err("Failed to claim interface: %s.",
libusb_error_name(ret));
return SR_ERR;
}
sdi->status = SR_ST_INITIALIZING;
if (devc->samplerate == 0)
/* Apply default if the samplerate hasn't been set yet. */
devc->samplerate = DEFAULT_SAMPLERATE;
ret = lwla_init_device(sdi);
if (ret == SR_OK)
sdi->status = SR_ST_ACTIVE;
return SR_OK;
return ret;
}
static int dev_close(struct sr_dev_inst *sdi)
{
(void)sdi;
struct sr_usb_dev_inst *usb;
struct dev_context *devc;
/* TODO: get handle from sdi->conn and close it. */
if (!di->priv) {
sr_err("Driver was not initialized.");
return SR_ERR;
}
usb = sdi->conn;
devc = sdi->priv;
if (!usb->devhdl)
return SR_OK;
/* Trigger download of the shutdown bitstream. */
devc->selected_clock_source = CLOCK_SOURCE_NONE;
if (lwla_set_clock_source(sdi) != SR_OK)
sr_err("Unable to shut down device.");
libusb_release_interface(usb->devhdl, USB_INTERFACE);
libusb_close(usb->devhdl);
usb->devhdl = NULL;
sdi->status = SR_ST_INACTIVE;
return SR_OK;
@ -78,83 +227,228 @@ static int dev_close(struct sr_dev_inst *sdi)
static int cleanup(void)
{
dev_clear();
/* TODO: free other driver resources, if any. */
return SR_OK;
return dev_clear();
}
static int config_get(int key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_probe_group *probe_group)
{
int ret;
struct dev_context *devc;
(void)sdi;
(void)data;
(void)probe_group;
ret = SR_OK;
if (!sdi)
return SR_ERR_ARG;
devc = sdi->priv;
switch (key) {
/* TODO */
case SR_CONF_SAMPLERATE:
*data = g_variant_new_uint64(devc->samplerate);
break;
case SR_CONF_LIMIT_SAMPLES:
*data = g_variant_new_uint64(devc->limit_samples);
break;
case SR_CONF_EXTERNAL_CLOCK:
*data = g_variant_new_boolean(devc->selected_clock_source
>= CLOCK_SOURCE_EXT_RISE);
break;
default:
return SR_ERR_NA;
}
return ret;
return SR_OK;
}
static int config_set(int key, GVariant *data, const struct sr_dev_inst *sdi,
const struct sr_probe_group *probe_group)
{
int ret;
struct dev_context *devc;
uint64_t rate;
(void)data;
(void)probe_group;
if (sdi->status != SR_ST_ACTIVE)
devc = sdi->priv;
if (!devc)
return SR_ERR_DEV_CLOSED;
ret = SR_OK;
switch (key) {
/* TODO */
case SR_CONF_SAMPLERATE:
rate = g_variant_get_uint64(data);
sr_info("Setting samplerate %" G_GUINT64_FORMAT, rate);
if (rate > samplerates[0]
|| rate < samplerates[G_N_ELEMENTS(samplerates) - 1])
return SR_ERR_SAMPLERATE;
devc->samplerate = rate;
break;
case SR_CONF_LIMIT_SAMPLES:
devc->limit_samples = g_variant_get_uint64(data);
break;
case SR_CONF_EXTERNAL_CLOCK:
if (g_variant_get_boolean(data)) {
sr_info("Enabling external clock.");
/* TODO: Allow the external clock to be inverted */
devc->selected_clock_source = CLOCK_SOURCE_EXT_RISE;
} else {
sr_info("Disabling external clock.");
devc->selected_clock_source = CLOCK_SOURCE_INT;
}
if (sdi->status == SR_ST_ACTIVE)
return lwla_set_clock_source(sdi);
break;
default:
ret = SR_ERR_NA;
return SR_ERR_NA;
}
return ret;
return SR_OK;
}
static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
const struct sr_probe_group *probe_group)
{
int ret;
GVariant *gvar;
GVariantBuilder gvb;
(void)sdi;
(void)data;
(void)probe_group;
ret = SR_OK;
switch (key) {
/* TODO */
case SR_CONF_DEVICE_OPTIONS:
*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
break;
case SR_CONF_SAMPLERATE:
g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"),
samplerates, ARRAY_SIZE(samplerates),
sizeof(uint64_t));
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
case SR_CONF_TRIGGER_TYPE:
*data = g_variant_new_string(TRIGGER_TYPES);
break;
default:
return SR_ERR_NA;
}
return ret;
return SR_OK;
}
static int dev_acquisition_start(const struct sr_dev_inst *sdi,
void *cb_data)
static int configure_probes(const struct sr_dev_inst *sdi)
{
(void)sdi;
struct dev_context *devc;
const struct sr_probe *probe;
const GSList *node;
uint64_t probe_bit;
devc = sdi->priv;
devc->channel_mask = 0;
devc->trigger_mask = 0;
devc->trigger_edge_mask = 0;
devc->trigger_values = 0;
for (node = sdi->probes, probe_bit = 1;
node != NULL;
node = node->next, probe_bit <<= 1) {
if (probe_bit >= ((uint64_t)1 << NUM_PROBES)) {
sr_err("Channels over the limit of %d.", NUM_PROBES);
return SR_ERR;
}
probe = node->data;
if (!probe || !probe->enabled)
continue;
/* Enable input channel for this probe. */
devc->channel_mask |= probe_bit;
if (!probe->trigger || probe->trigger[0] == '\0')
continue;
if (probe->trigger[1] != '\0') {
sr_err("Only one trigger stage is supported.");
return SR_ERR;
}
/* Enable trigger for this probe. */
devc->trigger_mask |= probe_bit;
/* Configure edge mask and trigger value. */
switch (probe->trigger[0]) {
case '1': devc->trigger_values |= probe_bit;
case '0': break;
case 'r': devc->trigger_values |= probe_bit;
case 'f': devc->trigger_edge_mask |= probe_bit;
break;
default:
sr_err("Trigger type '%c' is not supported.",
probe->trigger[0]);
return SR_ERR;
}
}
return SR_OK;
}
static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
{
struct drv_context *drvc;
struct dev_context *devc;
struct acquisition_state *acq;
int ret;
(void)cb_data;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
/* TODO: configure hardware, reset acquisition state, set up
* callbacks and send header packet. */
devc = sdi->priv;
drvc = di->priv;
if (devc->acquisition) {
sr_err("Acquisition still in progress?");
return SR_ERR;
}
acq = lwla_alloc_acquisition_state();
if (!acq)
return SR_ERR_MALLOC;
devc->stopping_in_progress = FALSE;
devc->transfer_error = FALSE;
ret = configure_probes(sdi);
if (ret != SR_OK) {
sr_err("Failed to configure probes.");
lwla_free_acquisition_state(acq);
return ret;
}
sr_info("Starting acquisition.");
devc->acquisition = acq;
ret = lwla_setup_acquisition(sdi);
if (ret != SR_OK) {
sr_err("Failed to set up aquisition.");
devc->acquisition = NULL;
lwla_free_acquisition_state(acq);
return ret;
}
ret = lwla_start_acquisition(sdi);
if (ret != SR_OK) {
sr_err("Failed to start aquisition.");
devc->acquisition = NULL;
lwla_free_acquisition_state(acq);
return ret;
}
usb_source_add(drvc->sr_ctx, 100, &lwla_receive_data,
(struct sr_dev_inst *)sdi);
sr_info("Waiting for data.");
/* Send header packet to the session bus. */
std_session_send_df_header(sdi, LOG_PREFIX);
return SR_OK;
}
@ -166,14 +460,16 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
/* TODO: stop acquisition. */
sr_dbg("Stopping acquisition.");
sdi->status = SR_ST_STOPPING;
return SR_OK;
}
SR_PRIV struct sr_dev_driver sysclk_lwla_driver_info = {
.name = "sysclk-lwla",
.longname = "SysClk LWLA",
.longname = "SysClk LWLA series",
.api_version = 1,
.init = init,
.cleanup = cleanup,

186
hardware/sysclk-lwla/lwla.c Normal file
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@ -0,0 +1,186 @@
/*
* This file is part of the libsigrok project.
*
* Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "lwla.h"
#include "protocol.h"
#include "libsigrok-internal.h"
SR_PRIV int lwla_send_bitstream(const struct sr_usb_dev_inst *usb,
const char *filename)
{
GMappedFile *file;
GError *error;
char *stream;
size_t length;
int ret;
int xfer_len;
if (usb == NULL || filename == NULL)
return SR_ERR_ARG;
sr_info("Downloading FPGA bitstream at '%s'.", filename);
/* Map bitstream file into memory. */
error = NULL;
file = g_mapped_file_new(filename, FALSE, &error);
if (!file) {
sr_err("Unable to open bitstream file: %s.", error->message);
g_error_free(error);
return SR_ERR;
}
stream = g_mapped_file_get_contents(file);
length = g_mapped_file_get_length(file);
/* Sanity check. */
if (!stream || length < 4 || RB32(stream) != length) {
sr_err("Invalid FPGA bitstream.");
g_mapped_file_unref(file);
return SR_ERR;
}
/* Transfer the entire bitstream in one URB. */
ret = libusb_bulk_transfer(usb->devhdl, EP_BITSTREAM,
(unsigned char *)stream, length,
&xfer_len, USB_TIMEOUT);
if (ret != 0) {
sr_err("Failed to transfer bitstream: %s.",
libusb_error_name(ret));
g_mapped_file_unref(file);
return SR_ERR;
}
if (xfer_len != (int)length) {
sr_err("Failed to transfer bitstream: incorrect length "
"%d != %d.", xfer_len, (int)length);
g_mapped_file_unref(file);
return SR_ERR;
}
g_mapped_file_unref(file);
sr_info("FPGA bitstream download of %d bytes done.", xfer_len);
/* This delay appears to be necessary for reliable operation. */
g_usleep(30000);
return SR_OK;
}
SR_PRIV int lwla_send_command(const struct sr_usb_dev_inst *usb,
const uint16_t *command, int cmd_len)
{
int ret;
int xfer_len = 0;
if (usb == NULL || command == NULL || cmd_len < 1)
return SR_ERR_ARG;
ret = libusb_bulk_transfer(usb->devhdl, EP_COMMAND,
(unsigned char *)command, cmd_len * 2,
&xfer_len, USB_TIMEOUT);
if (ret != 0) {
sr_dbg("Failed to send command %u: %s.",
LWLA_READ16(command), libusb_error_name(ret));
return SR_ERR;
}
if (xfer_len != cmd_len * 2) {
sr_dbg("Failed to send command %u: incorrect length %d != %d.",
LWLA_READ16(command), xfer_len, cmd_len * 2);
return SR_ERR;
}
return SR_OK;
}
SR_PRIV int lwla_receive_reply(const struct sr_usb_dev_inst *usb,
uint16_t *reply, int reply_len, int expect_len)
{
int ret;
int xfer_len = 0;
if (reply_len == 0)
return SR_OK;
if (usb == NULL || reply == NULL || reply_len < 0)
return SR_ERR_ARG;
ret = libusb_bulk_transfer(usb->devhdl, EP_REPLY,
(unsigned char *)reply, reply_len * 2,
&xfer_len, USB_TIMEOUT);
if (ret != 0) {
sr_dbg("Failed to receive reply: %s.", libusb_error_name(ret));
return SR_ERR;
}
if (xfer_len != expect_len * 2) {
sr_dbg("Failed to receive reply: incorrect length %d != %d.",
xfer_len, expect_len * 2);
return SR_ERR;
}
return SR_OK;
}
SR_PRIV int lwla_read_reg(const struct sr_usb_dev_inst *usb,
uint16_t reg, uint32_t *value)
{
int ret;
uint16_t command[2];
uint16_t reply[256];
command[0] = LWLA_WORD(CMD_READ_REG);
command[1] = LWLA_WORD(reg);
ret = lwla_send_command(usb, command, G_N_ELEMENTS(command));
if (ret != SR_OK)
return ret;
ret = lwla_receive_reply(usb, reply, G_N_ELEMENTS(reply), 2);
if (ret == SR_OK)
*value = LWLA_READ32(reply);
return ret;
}
SR_PRIV int lwla_write_reg(const struct sr_usb_dev_inst *usb,
uint16_t reg, uint32_t value)
{
uint16_t command[4];
command[0] = LWLA_WORD(CMD_WRITE_REG);
command[1] = LWLA_WORD(reg);
command[2] = LWLA_WORD_0(value);
command[3] = LWLA_WORD_1(value);
return lwla_send_command(usb, command, G_N_ELEMENTS(command));
}
SR_PRIV int lwla_write_regs(const struct sr_usb_dev_inst *usb,
const struct regval_pair *regvals, int count)
{
int i;
int ret;
ret = SR_OK;
for (i = 0; i < count; ++i) {
ret = lwla_write_reg(usb, regvals[i].reg, regvals[i].val);
if (ret != SR_OK)
break;
}
return ret;
}

122
hardware/sysclk-lwla/lwla.h Normal file
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@ -0,0 +1,122 @@
/*
* This file is part of the libsigrok project.
*
* Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H
#define LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H
#include "libsigrok.h"
#include <stdint.h>
#include <libusb.h>
#include <glib.h>
struct sr_usb_dev_inst;
/* Read mixed endian words from a buffer of 16-bit units. */
#define LWLA_READ16(buf) GUINT16_FROM_LE(*(buf))
#define LWLA_READ32(buf) \
(((uint32_t)GUINT16_FROM_LE((buf)[0]) << 16) | \
((uint32_t)GUINT16_FROM_LE((buf)[1])))
#define LWLA_READ64(buf) \
(((uint64_t)LWLA_READ32((buf))) | \
((uint64_t)LWLA_READ32((buf) + 2) << 32))
/* Convert 16-bit argument to little endian. */
#define LWLA_WORD(val) GUINT16_TO_LE(val)
/* Extract 16-bit units from 32/64-bit value in mixed endian order. */
#define LWLA_WORD_0(val) GUINT16_TO_LE(((val) & 0xFFFF0000u) >> 16)
#define LWLA_WORD_1(val) GUINT16_TO_LE(((val) & 0x0000FFFFu))
#define LWLA_WORD_2(val) \
GUINT16_TO_LE(((val) & G_GUINT64_CONSTANT(0xFFFF000000000000)) >> 48)
#define LWLA_WORD_3(val) \
GUINT16_TO_LE(((val) & G_GUINT64_CONSTANT(0x0000FFFF00000000)) >> 32)
/** USB device end points.
*/
enum {
EP_COMMAND = 2,
EP_BITSTREAM = 4,
EP_REPLY = 6 | LIBUSB_ENDPOINT_IN
};
/** LWLA protocol command ID codes.
*/
enum {
CMD_READ_REG = 1,
CMD_WRITE_REG = 2,
CMD_READ_MEM = 6,
CMD_CAP_SETUP = 7,
CMD_CAP_STATUS = 8,
};
/** LWLA capture state flags.
*/
enum {
STATUS_CAPTURING = 1 << 1,
STATUS_TRIGGERED = 1 << 4,
STATUS_MEM_AVAIL = 1 << 5,
STATUS_FLAG_MASK = 0x3F
};
/** LWLA register addresses.
*/
enum {
REG_MEM_CTRL2 = 0x1074, /* capture buffer control ??? */
REG_MEM_FILL = 0x1078, /* capture buffer fill level */
REG_MEM_CTRL4 = 0x107C, /* capture buffer control ??? */
REG_DIV_BYPASS = 0x1094, /* bypass clock divider flag */
REG_CMD_CTRL1 = 0x10B0, /* command control ??? */
REG_CMD_CTRL2 = 0x10B4, /* command control ??? */
REG_CMD_CTRL3 = 0x10B8, /* command control ??? */
REG_CMD_CTRL4 = 0x10BC, /* command control ??? */
REG_FREQ_CH1 = 0x10C0, /* channel 1 live frequency */
REG_FREQ_CH2 = 0x10C4, /* channel 2 live frequency */
REG_FREQ_CH3 = 0x10C8, /* channel 3 live frequency */
REG_FREQ_CH4 = 0x10CC, /* channel 4 live frequency */
};
/** Register/value pair.
*/
struct regval_pair {
unsigned int reg;
unsigned int val;
};
SR_PRIV int lwla_send_bitstream(const struct sr_usb_dev_inst *usb,
const char *filename);
SR_PRIV int lwla_send_command(const struct sr_usb_dev_inst *usb,
const uint16_t *command, int cmd_len);
SR_PRIV int lwla_receive_reply(const struct sr_usb_dev_inst *usb,
uint16_t *reply, int reply_len, int expect_len);
SR_PRIV int lwla_read_reg(const struct sr_usb_dev_inst *usb,
uint16_t reg, uint32_t *value);
SR_PRIV int lwla_write_reg(const struct sr_usb_dev_inst *usb,
uint16_t reg, uint32_t value);
SR_PRIV int lwla_write_regs(const struct sr_usb_dev_inst *usb,
const struct regval_pair *regvals, int count);
#endif /* !LIBSIGROK_HARDWARE_SYSCLK_LWLA_LWLA_H */

905
hardware/sysclk-lwla/protocol.c
View File

@ -18,23 +18,912 @@
*/
#include "protocol.h"
#include <string.h>
SR_PRIV int sysclk_lwla_receive_data(int fd, int revents, void *cb_data)
/* Bit mask covering all 34 channels. */
#define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_PROBES) - 1)
/* Bit mask for the RLE repeat-count-follows flag. */
#define RLE_FLAG_LEN_FOLLOWS ((uint64_t)1 << 35)
/* Start address of capture status memory area to read. */
#define CAP_STAT_ADDR 5
/* Number of 64-bit words read from the capture status memory. */
#define CAP_STAT_LEN 5
/* The bitstream filenames are indexed by the clock source enumeration.
*/
static const char *const bitstream_map[] = {
FIRMWARE_DIR "/sysclk-lwla1034-off.bitstream",
FIRMWARE_DIR "/sysclk-lwla1034-int.bitstream",
FIRMWARE_DIR "/sysclk-lwla1034-extpos.bitstream",
FIRMWARE_DIR "/sysclk-lwla1034-extneg.bitstream",
};
/* Submit an already filled-in USB transfer.
*/
static int submit_transfer(struct dev_context *devc,
struct libusb_transfer *xfer)
{
int ret;
ret = libusb_submit_transfer(xfer);
if (ret != 0) {
sr_err("Submit transfer failed: %s.", libusb_error_name(ret));
devc->transfer_error = TRUE;
return SR_ERR;
}
return SR_OK;
}
/* Set up the LWLA in preparation for an acquisition session.
*/
static int capture_setup(const struct sr_dev_inst *sdi)
{
const struct sr_dev_inst *sdi;
struct dev_context *devc;
uint64_t divider_count;
uint64_t memory_limit;
uint16_t command[3 + 10*4];
devc = sdi->priv;
command[0] = LWLA_WORD(CMD_CAP_SETUP);
command[1] = LWLA_WORD(0); /* address */
command[2] = LWLA_WORD(10); /* length */
command[3] = LWLA_WORD_0(devc->channel_mask);
command[4] = LWLA_WORD_1(devc->channel_mask);
command[5] = LWLA_WORD_2(devc->channel_mask);
command[6] = LWLA_WORD_3(devc->channel_mask);
/* Set the clock divide counter maximum for samplerates of up to
* 100 MHz. At the highest samplerate of 125 MHz the clock divider
* is bypassed.
*/
if (devc->samplerate > 0 && devc->samplerate < SR_MHZ(100))
divider_count = SR_MHZ(100) / devc->samplerate - 1;
else
divider_count = 0;
command[7] = LWLA_WORD_0(divider_count);
command[8] = LWLA_WORD_1(divider_count);
command[9] = LWLA_WORD_2(divider_count);
command[10] = LWLA_WORD_3(divider_count);
command[11] = LWLA_WORD_0(devc->trigger_values);
command[12] = LWLA_WORD_1(devc->trigger_values);
command[13] = LWLA_WORD_2(devc->trigger_values);
command[14] = LWLA_WORD_3(devc->trigger_values);
command[15] = LWLA_WORD_0(devc->trigger_edge_mask);
command[16] = LWLA_WORD_1(devc->trigger_edge_mask);
command[17] = LWLA_WORD_2(devc->trigger_edge_mask);
command[18] = LWLA_WORD_3(devc->trigger_edge_mask);
command[19] = LWLA_WORD_0(devc->trigger_mask);
command[20] = LWLA_WORD_1(devc->trigger_mask);
command[21] = LWLA_WORD_2(devc->trigger_mask);
command[22] = LWLA_WORD_3(devc->trigger_mask);
/* Set the capture memory full threshold. This is slightly less
* than the actual maximum, most likely in order to compensate for
* pipeline latency.
*/
memory_limit = MEMORY_DEPTH - 16;
command[23] = LWLA_WORD_0(memory_limit);
command[24] = LWLA_WORD_1(memory_limit);
command[25] = LWLA_WORD_2(memory_limit);
command[26] = LWLA_WORD_3(memory_limit);
/* Fill remaining 64-bit words with zeroes. */
memset(&command[27], 0, 16 * sizeof(uint16_t));
return lwla_send_command(sdi->conn, command, G_N_ELEMENTS(command));
}
/* Issue a register write command as an asynchronous USB transfer.
*/
static int issue_write_reg(const struct sr_dev_inst *sdi,
unsigned int reg, unsigned int value)
{
struct dev_context *devc;
struct acquisition_state *acq;
devc = sdi->priv;
acq = devc->acquisition;
acq->xfer_buf_out[0] = LWLA_WORD(CMD_WRITE_REG);
acq->xfer_buf_out[1] = LWLA_WORD(reg);
acq->xfer_buf_out[2] = LWLA_WORD_0(value);
acq->xfer_buf_out[3] = LWLA_WORD_1(value);
acq->xfer_out->length = 4 * sizeof(uint16_t);
return submit_transfer(devc, acq->xfer_out);
}
/* Issue a register write command as an asynchronous USB transfer for the
* next register/value pair of the currently active register write sequence.
*/
static int issue_next_write_reg(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct regval_pair *regval;
int ret;
devc = sdi->priv;
if (devc->reg_write_pos >= devc->reg_write_len) {
sr_err("Already written all registers in sequence.");
return SR_ERR_BUG;
}
regval = &devc->reg_write_seq[devc->reg_write_pos];
ret = issue_write_reg(sdi, regval->reg, regval->val);
if (ret != SR_OK)
return ret;
++devc->reg_write_pos;
return SR_OK;
}
/* Issue a capture status request as an asynchronous USB transfer.
*/
static void request_capture_status(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct acquisition_state *acq;
devc = sdi->priv;
acq = devc->acquisition;
acq->xfer_buf_out[0] = LWLA_WORD(CMD_CAP_STATUS);
acq->xfer_buf_out[1] = LWLA_WORD(CAP_STAT_ADDR);
acq->xfer_buf_out[2] = LWLA_WORD(CAP_STAT_LEN);
acq->xfer_out->length = 3 * sizeof(uint16_t);
if (submit_transfer(devc, acq->xfer_out) == SR_OK)
devc->state = STATE_STATUS_REQUEST;
}
/* Issue a request for the capture buffer fill level as
* an asynchronous USB transfer.
*/
static void request_capture_length(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct acquisition_state *acq;
devc = sdi->priv;
acq = devc->acquisition;
acq->xfer_buf_out[0] = LWLA_WORD(CMD_READ_REG);
acq->xfer_buf_out[1] = LWLA_WORD(REG_MEM_FILL);
acq->xfer_out->length = 2 * sizeof(uint16_t);
if (submit_transfer(devc, acq->xfer_out) == SR_OK)
devc->state = STATE_LENGTH_REQUEST;
}
/* Initiate the capture memory read operation: Reset the acquisition state
* and start a sequence of register writes in order to set up the device for
* reading from the capture buffer.
*/
static void issue_read_start(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct acquisition_state *acq;
struct regval_pair *regvals;
devc = sdi->priv;
acq = devc->acquisition;
/* Reset RLE state. */
acq->rle = RLE_STATE_DATA;
acq->sample = 0;
acq->run_len = 0;
acq->captured_samples = 0;
acq->transferred_samples = 0;
/* For some reason, the start address is 4 rather than 0. */
acq->mem_addr_done = 4;
acq->mem_addr_next = 4;
acq->mem_addr_stop = acq->mem_addr_fill;
/* Byte offset into the packet output buffer. */
acq->out_offset = 0;
regvals = devc->reg_write_seq;
regvals[0].reg = REG_DIV_BYPASS;
regvals[0].val = 1;
regvals[1].reg = REG_MEM_CTRL2;
regvals[1].val = 2;
regvals[2].reg = REG_MEM_CTRL4;
regvals[2].val = 4;
devc->reg_write_pos = 0;
devc->reg_write_len = 3;
if (issue_next_write_reg(sdi) == SR_OK)
devc->state = STATE_READ_PREPARE;
}
static void issue_read_end(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
devc = sdi->priv;
if (issue_write_reg(sdi, REG_DIV_BYPASS, 0) == SR_OK)
devc->state = STATE_READ_END;
}
/* Decode an incoming reponse to a buffer fill level request and act on it
* as appropriate. Note that this function changes the device context state.
*/
static void process_capture_length(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct acquisition_state *acq;
devc = sdi->priv;
acq = devc->acquisition;
if (acq->xfer_in->actual_length != 4) {
sr_err("Received size %d doesn't match expected size 4.",
acq->xfer_in->actual_length);
devc->transfer_error = TRUE;
return;
}
acq->mem_addr_fill = LWLA_READ32(acq->xfer_buf_in);
sr_dbg("%lu words in capture buffer.",
(unsigned long)acq->mem_addr_fill);
if (acq->mem_addr_fill > 0 && sdi->status == SR_ST_ACTIVE)
issue_read_start(sdi);
else
issue_read_end(sdi);
}
/* Initiate a sequence of register write commands with the effect of
* cancelling a running capture operation. This sets a new device state
* if issuing the first command succeeds.
*/
static void issue_stop_capture(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct regval_pair *regvals;
devc = sdi->priv;
if (devc->stopping_in_progress)
return;
regvals = devc->reg_write_seq;
regvals[0].reg = REG_CMD_CTRL2;
regvals[0].val = 10;
regvals[1].reg = REG_CMD_CTRL3;
regvals[1].val = 0;
regvals[2].reg = REG_CMD_CTRL4;
regvals[2].val = 0;
regvals[3].reg = REG_CMD_CTRL1;
regvals[3].val = 0;
regvals[4].reg = REG_DIV_BYPASS;
regvals[4].val = 0;
devc->reg_write_pos = 0;
devc->reg_write_len = 5;
if (issue_next_write_reg(sdi) == SR_OK) {
devc->stopping_in_progress = TRUE;
devc->state = STATE_STOP_CAPTURE;
}
}
/* Decode an incoming capture status reponse and act on it as appropriate.
* Note that this function changes the device state.
*/
static void process_capture_status(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct acquisition_state *acq;
devc = sdi->priv;
acq = devc->acquisition;
if (acq->xfer_in->actual_length != CAP_STAT_LEN * 8) {
sr_err("Received size %d doesn't match expected size %d.",
acq->xfer_in->actual_length, CAP_STAT_LEN * 8);
devc->transfer_error = TRUE;
return;
}
/* TODO: Find out the actual bit width of these fields as stored
* in the FPGA. These fields are definitely less than 64 bit wide
* internally, and the unused bits occasionally even contain garbage.
*/
acq->mem_addr_fill = LWLA_READ32(&acq->xfer_buf_in[0]);
acq->captured_samples = LWLA_READ32(&acq->xfer_buf_in[8])
* (uint64_t)100000;
acq->capture_flags = LWLA_READ32(&acq->xfer_buf_in[16])
& STATUS_FLAG_MASK;
sr_spew("Captured %lu words, %" PRIu64 " samples, flags 0x%02X",
(unsigned long)acq->mem_addr_fill,
acq->captured_samples, acq->capture_flags);
if (acq->captured_samples >= devc->limit_samples) {
issue_stop_capture(sdi);
return;
}
devc->state = STATE_STATUS_WAIT;
if ((acq->capture_flags & STATUS_TRIGGERED) == 0) {
sr_spew("Waiting for trigger.");
} else if ((acq->capture_flags & STATUS_MEM_AVAIL) == 0) {
sr_dbg("Capture memory filled.");
request_capture_length(sdi);
} else if ((acq->capture_flags & STATUS_CAPTURING) != 0) {
sr_spew("Sampling in progress.");
}
}
/* Issue a capture buffer read request as an asynchronous USB transfer.
* The address and size of the memory area to read are derived from the
* current acquisition state.
*/
static void request_read_mem(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct acquisition_state *acq;
size_t count;
devc = sdi->priv;
acq = devc->acquisition;
if (acq->mem_addr_next >= acq->mem_addr_stop)
return;
/* Always read a multiple of 8 device words. */
count = (acq->mem_addr_stop - acq->mem_addr_next + 7) / 8 * 8;
count = MIN(count, READ_CHUNK_LEN);
acq->xfer_buf_out[0] = LWLA_WORD(CMD_READ_MEM);
acq->xfer_buf_out[1] = LWLA_WORD_0(acq->mem_addr_next);
acq->xfer_buf_out[2] = LWLA_WORD_1(acq->mem_addr_next);
acq->xfer_buf_out[3] = LWLA_WORD_0(count);
acq->xfer_buf_out[4] = LWLA_WORD_1(count);
acq->xfer_out->length = 5 * sizeof(uint16_t);
if (submit_transfer(devc, acq->xfer_out) == SR_OK) {
acq->mem_addr_next += count;
devc->state = STATE_READ_REQUEST;
}
}
/* Send a packet of logic samples to the session bus. The payload is taken
* from the acquisition state. The return value indicates whether to stop
* reading more samples.
*/
static gboolean send_logic_packet(const struct sr_dev_inst *sdi)
{
uint64_t samples;
struct dev_context *devc;
struct acquisition_state *acq;
struct sr_datafeed_packet packet;
struct sr_datafeed_logic logic;
int last;
devc = sdi->priv;
acq = devc->acquisition;
if (acq->transferred_samples >= devc->limit_samples)
return TRUE;
packet.type = SR_DF_LOGIC;
packet.payload = &logic;
logic.unitsize = UNIT_SIZE;
logic.data = acq->out_packet;
logic.length = acq->out_offset;
samples = acq->out_offset / UNIT_SIZE;
last = FALSE;
/* Cut the packet short if necessary. */
if (acq->transferred_samples + samples >= devc->limit_samples) {
samples = devc->limit_samples - acq->transferred_samples;
logic.length = samples * UNIT_SIZE;
last = TRUE;
}
acq->transferred_samples += samples;
acq->out_offset = 0;
/* Send off logic datafeed packet. */
sr_session_send(sdi, &packet);
return last;
}
/* Demangle and decompress incoming sample data from the capture buffer.
* The data chunk is taken from the acquisition state, and is expected to
* contain a multiple of 8 device words.
* All data currently in the acquisition buffer will be processed. Packets
* of decoded samples are sent off to the session bus whenever the output
* buffer becomes full while decoding.
*/
static int process_sample_data(const struct sr_dev_inst *sdi)
{
uint64_t sample;
uint64_t run_len;
uint64_t high_nibbles;
uint64_t word;
struct dev_context *devc;
struct acquisition_state *acq;
uint8_t *out_p;
uint16_t *slice;
size_t expect_len;
size_t actual_len;
size_t in_words_left;
size_t si;
devc = sdi->priv;
acq = devc->acquisition;
if (acq->mem_addr_done >= acq->mem_addr_stop
|| acq->transferred_samples >= devc->limit_samples)
return SR_OK;
in_words_left = MIN(acq->mem_addr_stop - acq->mem_addr_done,
READ_CHUNK_LEN);
expect_len = LWLA1034_MEMBUF_LEN(in_words_left) * sizeof(uint16_t);
actual_len = acq->xfer_in->actual_length;
if (actual_len != expect_len) {
sr_err("Received size %lu does not match expected size %lu.",
(unsigned long)actual_len, (unsigned long)expect_len);
devc->transfer_error = TRUE;
return SR_ERR;
}
acq->mem_addr_done += in_words_left;
slice = acq->xfer_buf_in;
si = 0; /* word index within slice */
for (;;) {
sample = acq->sample;
/* Expand run-length samples into session packet. */
for (run_len = acq->run_len; run_len > 0; --run_len) {
out_p = &acq->out_packet[acq->out_offset];
out_p[0] = sample & 0xFF;
out_p[1] = (sample >> 8) & 0xFF;
out_p[2] = (sample >> 16) & 0xFF;
out_p[3] = (sample >> 24) & 0xFF;
out_p[4] = (sample >> 32) & 0xFF;
acq->out_offset += UNIT_SIZE;
/* Send out packet if it is full. */
if (acq->out_offset > PACKET_SIZE - UNIT_SIZE)
if (send_logic_packet(sdi))
return SR_OK; /* sample limit reached */
}
acq->run_len = 0;
if (in_words_left == 0)
break; /* done with current chunk */
/* Now work on the current slice. */
high_nibbles = LWLA_READ32(&slice[8 * 2]);
word = LWLA_READ32(&slice[si * 2]);
word |= (high_nibbles << (4 * si + 4)) & ((uint64_t)0xF << 32);
if (acq->rle == RLE_STATE_DATA) {
acq->sample = word & ALL_CHANNELS_MASK;
acq->run_len = ((word >> NUM_PROBES) & 1) + 1;
if (word & RLE_FLAG_LEN_FOLLOWS)
acq->rle = RLE_STATE_LEN;
} else {
acq->run_len += word << 1;
acq->rle = RLE_STATE_DATA;
}
/* Move to next word. */
if (++si >= 8) {
si = 0;
slice += 9 * 2;
}
--in_words_left;
}
/* Send out partially filled packet if it is the last one. */
if (acq->mem_addr_done >= acq->mem_addr_stop && acq->out_offset > 0)
send_logic_packet(sdi);
return SR_OK;
}
/* Finish an acquisition session. This sends the end packet to the session
* bus and removes the listener for asynchronous USB transfers.
*/
static void end_acquisition(struct sr_dev_inst *sdi)
{
struct drv_context *drvc;
struct dev_context *devc;
struct sr_datafeed_packet packet;
drvc = sdi->driver->priv;
devc = sdi->priv;
if (devc->state == STATE_IDLE)
return;
devc->state = STATE_IDLE;
/* Remove USB file descriptors from polling. */
usb_source_remove(drvc->sr_ctx);
packet.type = SR_DF_END;
sr_session_send(sdi, &packet);
lwla_free_acquisition_state(devc->acquisition);
devc->acquisition = NULL;
sdi->status = SR_ST_ACTIVE;
}
/* USB output transfer completion callback.
*/
static void receive_transfer_out(struct libusb_transfer *transfer)
{
struct sr_dev_inst *sdi;
struct dev_context *devc;
sdi = transfer->user_data;
devc = sdi->priv;
if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
sr_err("Transfer to device failed: %d.", transfer->status);
devc->transfer_error = TRUE;
return;
}
if (devc->reg_write_pos < devc->reg_write_len) {
issue_next_write_reg(sdi);
} else {
switch (devc->state) {
case STATE_START_CAPTURE:
devc->state = STATE_STATUS_WAIT;
break;
case STATE_STATUS_REQUEST:
devc->state = STATE_STATUS_RESPONSE;
submit_transfer(devc, devc->acquisition->xfer_in);
break;
case STATE_STOP_CAPTURE:
if (sdi->status == SR_ST_ACTIVE)
request_capture_length(sdi);
else
end_acquisition(sdi);
break;
case STATE_LENGTH_REQUEST:
devc->state = STATE_LENGTH_RESPONSE;
submit_transfer(devc, devc->acquisition->xfer_in);
break;
case STATE_READ_PREPARE:
request_read_mem(sdi);
break;
case STATE_READ_REQUEST:
devc->state = STATE_READ_RESPONSE;
submit_transfer(devc, devc->acquisition->xfer_in);
break;
case STATE_READ_END:
end_acquisition(sdi);
break;
default:
sr_err("Unexpected device state %d.", devc->state);
break;
}
}
}
/* USB input transfer completion callback.
*/
static void receive_transfer_in(struct libusb_transfer *transfer)
{
struct sr_dev_inst *sdi;
struct dev_context *devc;
struct acquisition_state *acq;
sdi = transfer->user_data;
devc = sdi->priv;
acq = devc->acquisition;
if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
sr_err("Transfer from device failed: %d.", transfer->status);
devc->transfer_error = TRUE;
return;
}
switch (devc->state) {
case STATE_STATUS_RESPONSE:
process_capture_status(sdi);
break;
case STATE_LENGTH_RESPONSE:
process_capture_length(sdi);
break;
case STATE_READ_RESPONSE:
if (process_sample_data(sdi) == SR_OK
&& acq->mem_addr_next < acq->mem_addr_stop
&& acq->transferred_samples < devc->limit_samples)
request_read_mem(sdi);
else
issue_read_end(sdi);
break;
default:
sr_err("Unexpected device state %d.", devc->state);
break;
}
}
/* Initialize the LWLA. This downloads a bitstream into the FPGA
* and executes a simple device test sequence.
*/
SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
int ret;
uint32_t value;
devc = sdi->priv;
/* Select internal clock if it hasn't been set yet */
if (devc->selected_clock_source == CLOCK_SOURCE_NONE)
devc->selected_clock_source = CLOCK_SOURCE_INT;
/* Force reload of bitstream */
devc->cur_clock_source = CLOCK_SOURCE_NONE;
ret = lwla_set_clock_source(sdi);
if (ret != SR_OK)
return ret;
ret = lwla_write_reg(sdi->conn, REG_CMD_CTRL2, 100);
if (ret != SR_OK)
return ret;
ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL1, &value);
if (ret != SR_OK)
return ret;
sr_info("Received test word 0x%08X back.", value);
if (value != 0x12345678)
return SR_ERR;
ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL4, &value);
if (ret != SR_OK)
return ret;
sr_info("Received test word 0x%08X back.", value);
if (value != 0x12345678)
return SR_ERR;
ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL3, &value);
if (ret != SR_OK)
return ret;
sr_info("Received test word 0x%08X back.", value);
if (value != 0x87654321)
return SR_ERR;
return ret;
}
/* Select the LWLA clock source. If the clock source changed from the
* previous setting, this will download a new bitstream to the FPGA.
*/
SR_PRIV int lwla_set_clock_source(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
int ret;
enum clock_source selected;
devc = sdi->priv;
selected = devc->selected_clock_source;
if (devc->cur_clock_source != selected) {
devc->cur_clock_source = CLOCK_SOURCE_NONE;
if (selected >= 0 && selected < G_N_ELEMENTS(bitstream_map)) {
ret = lwla_send_bitstream(sdi->conn,
bitstream_map[selected]);
if (ret == SR_OK)
devc->cur_clock_source = selected;
return ret;
}
}
return SR_OK;
}
/* Configure the LWLA in preparation for an acquisition session.
*/
SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct sr_usb_dev_inst *usb;
struct regval_pair regvals[7];
int ret;
devc = sdi->priv;
usb = sdi->conn;
regvals[0].reg = REG_MEM_CTRL2;
regvals[0].val = 2;
regvals[1].reg = REG_MEM_CTRL2;
regvals[1].val = 1;
regvals[2].reg = REG_CMD_CTRL2;
regvals[2].val = 10;
regvals[3].reg = REG_CMD_CTRL3;
regvals[3].val = 0x74;
regvals[4].reg = REG_CMD_CTRL4;
regvals[4].val = 0;
regvals[5].reg = REG_CMD_CTRL1;
regvals[5].val = 0;
regvals[6].reg = REG_DIV_BYPASS;
regvals[6].val = (devc->samplerate > SR_MHZ(100)) ? 1 : 0;
ret = lwla_write_regs(usb, regvals, G_N_ELEMENTS(regvals));
if (ret != SR_OK)
return ret;
return capture_setup(sdi);
}
/* Start the capture operation on the LWLA device. Beginning with this
* function, all USB transfers will be asynchronous until the end of the
* acquisition session.
*/
SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
struct sr_usb_dev_inst *usb;
struct acquisition_state *acq;
struct regval_pair *regvals;
devc = sdi->priv;
usb = sdi->conn;
acq = devc->acquisition;
libusb_fill_bulk_transfer(acq->xfer_out, usb->devhdl, EP_COMMAND,
(unsigned char *)acq->xfer_buf_out, 0,
&receive_transfer_out,
(struct sr_dev_inst *)sdi, USB_TIMEOUT);
libusb_fill_bulk_transfer(acq->xfer_in, usb->devhdl, EP_REPLY,
(unsigned char *)acq->xfer_buf_in,
sizeof acq->xfer_buf_in,
&receive_transfer_in,
(struct sr_dev_inst *)sdi, USB_TIMEOUT);
regvals = devc->reg_write_seq;
regvals[0].reg = REG_CMD_CTRL2;
regvals[0].val = 10;
regvals[1].reg = REG_CMD_CTRL3;
regvals[1].val = 1;
regvals[2].reg = REG_CMD_CTRL4;
regvals[2].val = 0;
regvals[3].reg = REG_CMD_CTRL1;
regvals[3].val = 0;
devc->reg_write_pos = 0;
devc->reg_write_len = 4;
devc->state = STATE_START_CAPTURE;
return issue_next_write_reg(sdi);
}
/* Allocate an acquisition state object.
*/
SR_PRIV struct acquisition_state *lwla_alloc_acquisition_state(void)
{
struct acquisition_state *acq;
acq = g_try_new0(struct acquisition_state, 1);
if (!acq) {
sr_err("Acquisition state malloc failed.");
return NULL;
}
acq->xfer_in = libusb_alloc_transfer(0);
if (!acq->xfer_in) {
sr_err("Transfer malloc failed.");
g_free(acq);
return NULL;
}
acq->xfer_out = libusb_alloc_transfer(0);
if (!acq->xfer_out) {
sr_err("Transfer malloc failed.");
libusb_free_transfer(acq->xfer_in);
g_free(acq);
return NULL;
}
return acq;
}
/* Deallocate an acquisition state object.
*/
SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq)
{
if (acq) {
libusb_free_transfer(acq->xfer_out);
libusb_free_transfer(acq->xfer_in);
g_free(acq);
}
}
/* USB I/O source callback.
*/
SR_PRIV int lwla_receive_data(int fd, int revents, void *cb_data)
{
struct sr_dev_inst *sdi;
struct dev_context *devc;
struct drv_context *drvc;
struct timeval tv;
int ret;
(void)fd;
if (!(sdi = cb_data))
return TRUE;
sdi = cb_data;
devc = sdi->priv;
drvc = sdi->driver->priv;
if (!(devc = sdi->priv))
return TRUE;
if (!devc || !drvc)
return FALSE;
if (revents == G_IO_IN) {
/* TODO */
/* No timeout: return immediately. */
tv.tv_sec = 0;
tv.tv_usec = 0;
ret = libusb_handle_events_timeout_completed(drvc->sr_ctx->libusb_ctx,
&tv, NULL);
if (ret != 0)
sr_err("Event handling failed: %s.", libusb_error_name(ret));
/* If no event flags are set the timeout must have expired. */
if (revents == 0 && devc->state == STATE_STATUS_WAIT) {
if (sdi->status == SR_ST_STOPPING)
issue_stop_capture(sdi);
else
request_capture_status(sdi);
}
/* Check if an error occurred on a transfer. */
if (devc->transfer_error)
end_acquisition(sdi);
return TRUE;
}

194
hardware/sysclk-lwla/protocol.h
View File

@ -20,26 +20,194 @@
#ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
#define LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
#include <stdint.h>
#include <glib.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"
/* Message logging helpers with subsystem-specific prefix string. */
#define LOG_PREFIX "sysclk-lwla"
/** Private, per-device-instance driver context. */
struct dev_context {
/* Model-specific information */
#include "lwla.h"
#include "libsigrok.h"
#include "libsigrok-internal.h"
#include <stdint.h>
#include <glib.h>
/* Acquisition settings */
/* For now, only the LWLA1034 is supported.
*/
#define VENDOR_NAME "SysClk"
#define MODEL_NAME "LWLA1034"
/* Operational state */
#define USB_VID_PID "2961.6689"
#define USB_INTERFACE 0
#define USB_TIMEOUT 3000 /* ms */
/* Temporary state across callbacks */
#define NUM_PROBES 34
#define TRIGGER_TYPES "01fr"
/** Unit and packet size for the sigrok logic datafeed.
*/
#define UNIT_SIZE ((NUM_PROBES + 7) / 8)
#define PACKET_SIZE (10000 * UNIT_SIZE) /* bytes */
/** Size of the acquisition buffer in device memory units.
*/
#define MEMORY_DEPTH (256 * 1024) /* 256k x 36 bit */
/** Number of device memory units (36 bit) to read at a time. Slices of 8
* consecutive 36-bit words are mapped to 9 32-bit words each, so the chunk
* length should be a multiple of 8 to ensure alignment to slice boundaries.
*
* Experimentation has shown that reading chunks larger than about 1024 bytes
* is unreliable. The threshold seems to relate to the buffer size on the FX2
* USB chip: The configured endpoint buffer size is 512, and with double or
* triple buffering enabled a multiple of 512 bytes can be kept in fly.
*
* The vendor software limits reads to 120 words (15 slices, 540 bytes) at
* a time. So far, it appears safe to increase this to 224 words (28 slices,
* 1008 bytes), thus making the most of two 512 byte buffers.
*/
#define READ_CHUNK_LEN (28 * 8)
/** Calculate the required buffer size in 16-bit units for reading a given
* number of device memory words. Rounded to a multiple of 8 device words.
*/
#define LWLA1034_MEMBUF_LEN(count) (((count) + 7) / 8 * 18)
/** Maximum number of 16-bit words sent at a time during acquisition.
* Used for allocating the libusb transfer buffer.
*/
#define MAX_ACQ_SEND_WORDS 8 /* 5 for memory read request plus stuffing */
/** Maximum number of 16-bit words received at a time during acquisition.
* Round to the next multiple of the endpoint buffer size to avoid nasty
* transfer overflow conditions on hiccups.
*/
#define MAX_ACQ_RECV_WORDS ((READ_CHUNK_LEN / 4 * 9 + 255) / 256 * 256)
/** Maximum length of a register write sequence.
*/
#define MAX_REG_WRITE_SEQ_LEN 5
/** Default configured samplerate.
*/
#define DEFAULT_SAMPLERATE SR_MHZ(125)
/** LWLA clock sources.
*/
enum clock_source {
CLOCK_SOURCE_NONE,
CLOCK_SOURCE_INT,
CLOCK_SOURCE_EXT_RISE,
CLOCK_SOURCE_EXT_FALL,
};
SR_PRIV int sysclk_lwla_receive_data(int fd, int revents, void *cb_data);
/** LWLA device states.
*/
enum device_state {
STATE_IDLE = 0,
#endif
STATE_START_CAPTURE,
STATE_STATUS_WAIT,
STATE_STATUS_REQUEST,
STATE_STATUS_RESPONSE,
STATE_STOP_CAPTURE,
STATE_LENGTH_REQUEST,
STATE_LENGTH_RESPONSE,
STATE_READ_PREPARE,
STATE_READ_REQUEST,
STATE_READ_RESPONSE,
STATE_READ_END,
};
/** LWLA run-length encoding states.
*/
enum rle_state {
RLE_STATE_DATA,
RLE_STATE_LEN
};
/** LWLA sample acquisition and decompression state.
*/
struct acquisition_state {
uint64_t sample;
uint64_t run_len;
/** Number of samples acquired so far. */
uint64_t captured_samples;
/** Number of samples sent to the session bus. */
uint64_t transferred_samples;
/** Capture memory fill level. */
size_t mem_addr_fill;
size_t mem_addr_done;
size_t mem_addr_next;
size_t mem_addr_stop;
size_t out_offset;
struct libusb_transfer *xfer_in;
struct libusb_transfer *xfer_out;
unsigned int capture_flags;
enum rle_state rle;
/* Payload data buffers for outgoing and incoming transfers. */
uint16_t xfer_buf_out[MAX_ACQ_SEND_WORDS];
uint16_t xfer_buf_in[MAX_ACQ_RECV_WORDS];
/* Payload buffer for sigrok logic packets. */
uint8_t out_packet[PACKET_SIZE];
};
/** Private, per-device-instance driver context.
*/
struct dev_context {
/** The samplerate selected by the user. */
uint64_t samplerate;
/** The maximimum number of samples to acquire. */
uint64_t limit_samples;
/** Channels to use. */
uint64_t channel_mask;
uint64_t trigger_mask;
uint64_t trigger_edge_mask;
uint64_t trigger_values;
struct acquisition_state *acquisition;
struct regval_pair reg_write_seq[MAX_REG_WRITE_SEQ_LEN];
int reg_write_pos;
int reg_write_len;
enum device_state state;
enum device_state next_state;
/** The currently configured clock source of the device. */
enum clock_source cur_clock_source;
/** The clock source selected by the user. */
enum clock_source selected_clock_source;
/* Indicates that stopping the acquisition is currently in progress. */
gboolean stopping_in_progress;
/* Indicates whether a transfer failed. */
gboolean transfer_error;
};
SR_PRIV struct acquisition_state *lwla_alloc_acquisition_state(void);
SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq);
SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_set_clock_source(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_abort_acquisition(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_receive_data(int fd, int revents, void *cb_data);
#endif /* !LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H */