saleae-logic16: Add SR_CONF_CAPTURE_RATIO support.
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7bfcb25cf1
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@ -53,6 +53,7 @@ static const uint32_t devopts[] = {
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SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
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SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
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SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
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};
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static const int32_t soft_trigger_matches[] = {
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@ -459,6 +460,12 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s
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devc = sdi->priv;
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*data = g_variant_new_uint64(devc->cur_samplerate);
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break;
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case SR_CONF_CAPTURE_RATIO:
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if (!sdi)
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return SR_ERR;
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devc = sdi->priv;
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*data = g_variant_new_uint64(devc->capture_ratio);
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break;
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case SR_CONF_VOLTAGE_THRESHOLD:
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if (!sdi)
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return SR_ERR;
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@ -505,6 +512,14 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd
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case SR_CONF_LIMIT_SAMPLES:
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devc->limit_samples = g_variant_get_uint64(data);
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break;
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case SR_CONF_CAPTURE_RATIO:
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devc->capture_ratio = g_variant_get_uint64(data);
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if (devc->capture_ratio > 100) {
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devc->capture_ratio = 0;
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ret = SR_ERR;
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} else
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ret = SR_OK;
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break;
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case SR_CONF_VOLTAGE_THRESHOLD:
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g_variant_get(data, "(dd)", &low, &high);
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ret = SR_ERR_ARG;
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@ -719,7 +734,12 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
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memset(devc->channel_data, 0, sizeof(devc->channel_data));
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if ((trigger = sr_session_trigger_get(sdi->session))) {
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devc->stl = soft_trigger_logic_new(sdi, trigger, 0);
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int pre_trigger_samples = 0;
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if (devc->limit_samples > 0)
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pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
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devc->stl = soft_trigger_logic_new(sdi, trigger, pre_trigger_samples);
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if (devc->stl == NULL)
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return SR_ERR_MALLOC;
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devc->trigger_fired = FALSE;
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} else
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devc->trigger_fired = TRUE;
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@ -713,6 +713,7 @@ SR_PRIV void logic16_receive_transfer(struct libusb_transfer *transfer)
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struct dev_context *devc;
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size_t new_samples, num_samples;
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int trigger_offset;
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int pre_trigger_samples;
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sdi = transfer->user_data;
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devc = sdi->priv;
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@ -785,8 +786,9 @@ SR_PRIV void logic16_receive_transfer(struct libusb_transfer *transfer)
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devc->sent_samples += new_samples;
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} else {
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trigger_offset = soft_trigger_logic_check(devc->stl,
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devc->convbuffer, new_samples * 2, NULL);
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devc->convbuffer, new_samples * 2, &pre_trigger_samples);
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if (trigger_offset > -1) {
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devc->sent_samples += pre_trigger_samples;
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packet.type = SR_DF_LOGIC;
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packet.payload = &logic;
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num_samples = new_samples - trigger_offset;
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@ -59,6 +59,9 @@ struct dev_context {
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/** Maximum number of samples to capture, if nonzero. */
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uint64_t limit_samples;
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/** Percent of the samples that should be captured before the trigger. */
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uint64_t capture_ratio;
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/** The currently configured input voltage of the device. */
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enum voltage_range cur_voltage_range;
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