parent
643c8824a5
commit
6b04525ba2
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@ -171,6 +171,7 @@ enum series {
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DS2000A,
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DSO1000,
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DS1000Z,
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DS4000,
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};
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/* short name, full name */
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@ -195,6 +196,8 @@ static const struct rigol_ds_series supported_series[] = {
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{50, 1}, {2, 1000}, 12, 600, 20480},
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[DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
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{50, 1}, {1, 1000}, 12, 1200, 12000000},
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[DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
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{1000, 1}, {1, 1000}, 14, 1400, 14000},
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};
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#define SERIES(x) &supported_series[x]
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@ -252,6 +255,7 @@ static const struct rigol_ds_model supported_models[] = {
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{SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true)},
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{SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true)},
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{SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true)},
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{SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false)},
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};
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static struct sr_dev_driver rigol_ds_driver_info;
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@ -474,10 +474,19 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
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if (devc->model->series->protocol >= PROTOCOL_V3 &&
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ch->type == SR_CHANNEL_ANALOG) {
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/* Vertical increment. */
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if (sr_scpi_get_float(sdi->conn, ":WAV:YINC?",
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&devc->vert_inc[ch->index]) != SR_OK)
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/* Vertical origin. */
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if (sr_scpi_get_float(sdi->conn, ":WAV:YOR?",
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&devc->vert_origin[ch->index]) != SR_OK)
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return SR_ERR;
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/* Vertical reference. */
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if (sr_scpi_get_int(sdi->conn, ":WAV:YREF?",
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&devc->vert_reference[ch->index]) != SR_OK)
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return SR_ERR;
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} else if (ch->type == SR_CHANNEL_ANALOG) {
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devc->vert_inc[ch->index] = devc->vdiv[ch->index] / 25.6;
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}
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rigol_ds_set_wait_event(devc, WAIT_BLOCK);
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@ -557,7 +566,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
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struct sr_analog_meaning meaning;
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struct sr_analog_spec spec;
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struct sr_datafeed_logic logic;
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double vdiv, offset;
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double vdiv, offset, origin;
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int len, i, vref;
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struct sr_channel *ch;
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gsize expected_data_bytes;
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@ -677,11 +686,12 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
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if (ch->type == SR_CHANNEL_ANALOG) {
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vref = devc->vert_reference[ch->index];
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vdiv = devc->vdiv[ch->index] / 25.6;
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vdiv = devc->vert_inc[ch->index];
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origin = devc->vert_origin[ch->index];
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offset = devc->vert_offset[ch->index];
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if (devc->model->series->protocol >= PROTOCOL_V3)
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for (i = 0; i < len; i++)
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devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
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devc->data[i] = ((int)devc->buffer[i] - vref - origin) * vdiv;
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else
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for (i = 0; i < len; i++)
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devc->data[i] = (128 - devc->buffer[i]) * vdiv - offset;
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@ -120,7 +120,9 @@ struct dev_context {
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float attenuation[MAX_ANALOG_CHANNELS];
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float vdiv[MAX_ANALOG_CHANNELS];
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int vert_reference[MAX_ANALOG_CHANNELS];
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float vert_origin[MAX_ANALOG_CHANNELS];
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float vert_offset[MAX_ANALOG_CHANNELS];
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float vert_inc[MAX_ANALOG_CHANNELS];
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char *trigger_source;
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float horiz_triggerpos;
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char *trigger_slope;
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@ -105,6 +105,7 @@ struct usbtmc_blacklist {
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static struct usbtmc_blacklist blacklist_remote[] = {
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{ 0x1ab1, 0x0588 }, /* Rigol DS1000 series */
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{ 0x1ab1, 0x04b0 }, /* Rigol DS2000 series */
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{ 0x1ab1, 0x04b1 }, /* Rigol DS4000 series */
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{ 0x0957, 0x0588 }, /* Agilent DSO1000 series (rebadged Rigol DS1000) */
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{ 0x0b21, 0xffff }, /* All Yokogawa devices */
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{ 0xf4ec, 0xffff }, /* All Siglent SDS devices */
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