ols: Detect Demon Core, use its canonic command names

Document Demon Core commands and associated metadata magic numbers.
See http://web.archive.org/web/20190317154112/
http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf for documentation.

Detect the Demon Core presence, use more symbolic names in related
code paths to eliminate magic numbers, switch to their canonic names.

Reviewed-By: Wolfram Sang <wsa@kernel.org>
This commit is contained in:
v1ne 2020-03-31 21:51:22 +02:00 committed by Gerhard Sittig
parent 2755ab36f3
commit 6f9234e6f3
3 changed files with 71 additions and 48 deletions

View File

@ -358,7 +358,7 @@ static int config_list(uint32_t key, GVariant **data,
return SR_OK;
}
static int set_trigger(const struct sr_dev_inst *sdi, int stage)
static int set_basic_trigger(const struct sr_dev_inst *sdi, int stage)
{
struct dev_context *devc;
struct sr_serial_dev_inst *serial;
@ -367,7 +367,7 @@ static int set_trigger(const struct sr_dev_inst *sdi, int stage)
devc = sdi->priv;
serial = sdi->conn;
cmd = CMD_SET_TRIGGER_MASK + stage * 4;
cmd = CMD_SET_BASIC_TRIGGER_MASK0 + stage * 4;
arg[0] = devc->trigger_mask[stage] & 0xff;
arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
@ -375,7 +375,7 @@ static int set_trigger(const struct sr_dev_inst *sdi, int stage)
if (send_longcommand(serial, cmd, arg) != SR_OK)
return SR_ERR;
cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
cmd = CMD_SET_BASIC_TRIGGER_VALUE0 + stage * 4;
arg[0] = devc->trigger_value[stage] & 0xff;
arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
@ -383,7 +383,7 @@ static int set_trigger(const struct sr_dev_inst *sdi, int stage)
if (send_longcommand(serial, cmd, arg) != SR_OK)
return SR_ERR;
cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
cmd = CMD_SET_BASIC_TRIGGER_CONFIG0 + stage * 4;
arg[0] = arg[1] = arg[3] = 0x00;
arg[2] = stage;
if (stage == devc->num_stages)
@ -443,13 +443,13 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
devc->trigger_at_smpl = (readcount - delaycount) * 4 - devc->num_stages;
for (i = 0; i <= devc->num_stages; i++) {
sr_dbg("Setting OLS stage %d trigger.", i);
if ((ret = set_trigger(sdi, i)) != SR_OK)
if ((ret = set_basic_trigger(sdi, i)) != SR_OK)
return ret;
}
} else {
/* No triggers configured, force trigger on first stage. */
sr_dbg("Forcing trigger at stage 0.");
if ((ret = set_trigger(sdi, 0)) != SR_OK)
if ((ret = set_basic_trigger(sdi, 0)) != SR_OK)
return ret;
delaycount = readcount;
}
@ -512,7 +512,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
return SR_ERR;
/* Start acquisition on the device. */
if (send_shortcommand(serial, CMD_RUN) != SR_OK)
if (send_shortcommand(serial, CMD_ARM_BASIC_TRIGGER) != SR_OK)
return SR_ERR;
/* Reset all operational states. */

View File

@ -171,6 +171,9 @@ static void metadata_quirks(struct sr_dev_inst *sdi)
if (!devc->max_samplerate)
devc->max_samplerate = SR_MHZ(20);
}
if (sdi->version && strstr(sdi->version, "FPGA version 3.07"))
devc->device_flags |= DEVICE_FLAG_IS_DEMON_CORE;
}
SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
@ -178,7 +181,7 @@ SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
struct sr_dev_inst *sdi;
struct dev_context *devc;
uint32_t tmp_int;
uint8_t key, type, token;
uint8_t key, type;
int delay_ms;
GString *tmp_str, *devname, *version;
guchar tmp_c;
@ -196,12 +199,11 @@ SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
delay_ms = serial_timeout(serial, 1);
if (serial_read_blocking(serial, &key, 1, delay_ms) != 1)
break;
if (key == 0x00) {
if (key == METADATA_TOKEN_END) {
sr_dbg("Got metadata key 0x00, metadata ends.");
break;
}
type = key >> 5;
token = key & 0x1f;
switch (type) {
case 0:
/* NULL-terminated string */
@ -209,21 +211,20 @@ SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
delay_ms = serial_timeout(serial, 1);
while (serial_read_blocking(serial, &tmp_c, 1, delay_ms) == 1 && tmp_c != '\0')
g_string_append_c(tmp_str, tmp_c);
sr_dbg("Got metadata key 0x%.2x value '%s'.",
key, tmp_str->str);
switch (token) {
case 0x01:
sr_dbg("Got metadata token 0x%.2x value '%s'.", key, tmp_str->str);
switch (key) {
case METADATA_TOKEN_DEVICE_NAME:
/* Device name */
devname = g_string_append(devname, tmp_str->str);
break;
case 0x02:
case METADATA_TOKEN_FPGA_VERSION:
/* FPGA firmware version */
if (version->len)
g_string_append(version, ", ");
g_string_append(version, "FPGA version ");
g_string_append(version, tmp_str->str);
break;
case 0x03:
case METADATA_TOKEN_ANCILLARY_VERSION:
/* Ancillary version */
if (version->len)
g_string_append(version, ", ");
@ -231,8 +232,7 @@ SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
g_string_append(version, tmp_str->str);
break;
default:
sr_info("ols: unknown token 0x%.2x: '%s'",
token, tmp_str->str);
sr_info("ols: unknown token 0x%.2x: '%s'", key, tmp_str->str);
break;
}
g_string_free(tmp_str, TRUE);
@ -243,32 +243,30 @@ SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
if (serial_read_blocking(serial, &tmp_int, 4, delay_ms) != 4)
break;
tmp_int = RB32(&tmp_int);
sr_dbg("Got metadata key 0x%.2x value 0x%.8x.",
key, tmp_int);
switch (token) {
case 0x00:
sr_dbg("Got metadata token 0x%.2x value 0x%.8x.", key, tmp_int);
switch (key) {
case METADATA_TOKEN_NUM_PROBES_LONG:
/* Number of usable channels */
ols_channel_new(sdi, tmp_int);
break;
case 0x01:
case METADATA_TOKEN_SAMPLE_MEMORY_BYTES:
/* Amount of sample memory available (bytes) */
devc->max_samples = tmp_int;
break;
case 0x02:
case METADATA_TOKEN_DYNAMIC_MEMORY_BYTES:
/* Amount of dynamic memory available (bytes) */
/* what is this for? */
break;
case 0x03:
case METADATA_TOKEN_MAX_SAMPLE_RATE_HZ:
/* Maximum sample rate (Hz) */
devc->max_samplerate = tmp_int;
break;
case 0x04:
case METADATA_TOKEN_PROTOCOL_VERSION_LONG:
/* protocol version */
devc->protocol_version = tmp_int;
break;
default:
sr_info("Unknown token 0x%.2x: 0x%.8x.",
token, tmp_int);
sr_info("Unknown token 0x%.2x: 0x%.8x.", key, tmp_int);
break;
}
break;
@ -277,20 +275,18 @@ SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
delay_ms = serial_timeout(serial, 1);
if (serial_read_blocking(serial, &tmp_c, 1, delay_ms) != 1)
break;
sr_dbg("Got metadata key 0x%.2x value 0x%.2x.",
key, tmp_c);
switch (token) {
case 0x00:
sr_dbg("Got metadata token 0x%.2x value 0x%.2x.", key, tmp_c);
switch (key) {
case METADATA_TOKEN_NUM_PROBES_SHORT:
/* Number of usable channels */
ols_channel_new(sdi, tmp_c);
break;
case 0x01:
case METADATA_TOKEN_PROTOCOL_VERSION_SHORT:
/* protocol version */
devc->protocol_version = tmp_c;
break;
default:
sr_info("Unknown token 0x%.2x: 0x%.2x.",
token, tmp_c);
sr_info("Unknown token 0x%.2x: 0x%.2x.", key, tmp_c);
break;
}
break;

View File

@ -34,20 +34,46 @@
#define DEFAULT_SAMPLERATE SR_KHZ(200)
/* Command opcodes */
#define CMD_RESET 0x00
#define CMD_RUN 0x01
#define CMD_ID 0x02
#define CMD_METADATA 0x04
#define CMD_SET_DIVIDER 0x80
#define CMD_CAPTURE_SIZE 0x81
#define CMD_SET_FLAGS 0x82
#define CMD_CAPTURE_DELAYCOUNT 0x83 /* extension for Pepino */
#define CMD_CAPTURE_READCOUNT 0x84 /* extension for Pepino */
#define CMD_SET_TRIGGER_MASK 0xc0
#define CMD_SET_TRIGGER_VALUE 0xc1
#define CMD_SET_TRIGGER_CONFIG 0xc2
#define CMD_RESET 0x00
#define CMD_ARM_BASIC_TRIGGER 0x01
#define CMD_ID 0x02
#define CMD_METADATA 0x04
#define CMD_FINISH_NOW 0x05 /* extension of Demon Core */
#define CMD_QUERY_INPUT_DATA 0x06 /* extension of Demon Core */
#define CMD_QUERY_CAPTURE_STATE 0x07 /* extension of Demon Core */
#define CMD_RETURN_CAPTURE_DATA 0x08 /* extension of Demon Core */
#define CMD_ARM_ADVANCED_TRIGGER 0x0F /* extension of Demon Core */
#define CMD_XON 0x11
#define CMD_XOFF 0x13
#define CMD_SET_DIVIDER 0x80
#define CMD_CAPTURE_SIZE 0x81
#define CMD_SET_FLAGS 0x82
#define CMD_CAPTURE_DELAYCOUNT 0x83 /* extension of Pepino */
#define CMD_CAPTURE_READCOUNT 0x84 /* extension of Pepino */
#define CMD_SET_ADVANCED_TRIG_SEL 0x9E /* extension of Demon Core */
#define CMD_SET_ADVANCED_TRIG_WRITE 0x9F /* extension of Demon Core */
#define CMD_SET_BASIC_TRIGGER_MASK0 0xC0 /* 4 stages: 0xC0, 0xC4, 0xC8, 0xCC */
#define CMD_SET_BASIC_TRIGGER_VALUE0 0xC1 /* 4 stages: 0xC1, 0xC5, 0xC9, 0xCD */
#define CMD_SET_BASIC_TRIGGER_CONFIG0 0xC2 /* 4 stages: 0xC2, 0xC6, 0xCA, 0xCE */
/* Trigger config */
/* Metadata tokens */
#define METADATA_TOKEN_END 0x0
#define METADATA_TOKEN_DEVICE_NAME 0x1
#define METADATA_TOKEN_FPGA_VERSION 0x2
#define METADATA_TOKEN_ANCILLARY_VERSION 0x3
#define METADATA_TOKEN_NUM_PROBES_LONG 0x20
#define METADATA_TOKEN_SAMPLE_MEMORY_BYTES 0x21
#define METADATA_TOKEN_DYNAMIC_MEMORY_BYTES 0x22
#define METADATA_TOKEN_MAX_SAMPLE_RATE_HZ 0x23
#define METADATA_TOKEN_PROTOCOL_VERSION_LONG 0x24
#define METADATA_TOKEN_CAPABILITIES 0x25 /* not implemented in Demon Core v3.07 */
#define METADATA_TOKEN_NUM_PROBES_SHORT 0x40
#define METADATA_TOKEN_PROTOCOL_VERSION_SHORT 0x41
/* Device config flags */
#define DEVICE_FLAG_IS_DEMON_CORE (1 << 0)
/* Basic Trigger Config */
#define TRIGGER_START (1 << 3)
/* Bit mask used for "set flags" command (0x82) */
@ -78,6 +104,7 @@ struct dev_context {
uint32_t max_samples;
uint32_t max_samplerate;
uint32_t protocol_version;
uint16_t device_flags;
/* acquisition-related properties: */
uint64_t cur_samplerate;