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asix-sigma: Fix a register addressing bug (non-issue) 

Fix how the READ_ID register index was passed to the hardware access.
Addresses are sent in nibbles, so shift by eight is wrong here. No harm
was done, as the register's index is zero.
This commit is contained in:
Gerhard Sittig 2017-05-25 21:57:30 +02:00 committed by Uwe Hermann
parent a9016883f8
commit 84a6ed1a12
1 changed files with 1 additions and 1 deletions
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2
src/hardware/asix-sigma/protocol.c
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@ -330,7 +330,7 @@ static int sigma_fpga_init_la(struct dev_context *devc)
/* Initialize the logic analyzer mode. */ /* Initialize the logic analyzer mode. */
uint8_t logic_mode_start[] = { uint8_t logic_mode_start[] = {
REG_ADDR_LOW | (READ_ID & 0xf), REG_ADDR_LOW | (READ_ID & 0xf),
REG_ADDR_HIGH | (READ_ID >> 8), REG_ADDR_HIGH | (READ_ID >> 4),
REG_READ_ADDR, /* Read ID register. */ REG_READ_ADDR, /* Read ID register. */
REG_ADDR_LOW | (WRITE_TEST & 0xf), REG_ADDR_LOW | (WRITE_TEST & 0xf),