saleae-logic16: Change two errors into warnings.

Related to #466, convert two more sanity checks from errors into warnings.
This may allow more devices to work with libsigrok.
This commit is contained in:
Uwe Hermann 2014-11-27 23:22:05 +01:00
parent 5cfcab6603
commit a11e10ec91
1 changed files with 4 additions and 5 deletions

View File

@ -470,8 +470,8 @@ SR_PRIV int logic16_setup_acquisition(const struct sr_dev_inst *sdi,
reg1 &= ~0x20; reg1 &= ~0x20;
if (devc->fpga_variant == FPGA_VARIANT_ORIGINAL && reg1 != 0x08) { if (devc->fpga_variant == FPGA_VARIANT_ORIGINAL && reg1 != 0x08) {
sr_dbg("Invalid state at acquisition setup register 1: 0x%02x != 0x08.", reg1); sr_dbg("Invalid state at acquisition setup register 1: 0x%02x != 0x08. "
return SR_ERR; "Proceeding anyway.", reg1);
} }
if ((ret = write_fpga_register(sdi, 1, 0x40)) != SR_OK) if ((ret = write_fpga_register(sdi, 1, 0x40)) != SR_OK)
@ -507,9 +507,8 @@ SR_PRIV int logic16_setup_acquisition(const struct sr_dev_inst *sdi,
return ret; return ret;
if (devc->fpga_variant == FPGA_VARIANT_ORIGINAL && reg10 != clock_select) { if (devc->fpga_variant == FPGA_VARIANT_ORIGINAL && reg10 != clock_select) {
sr_dbg("Invalid state at acquisition setup register 10: 0x%02x != 0x%02x.", sr_dbg("Invalid state at acquisition setup register 10: 0x%02x != 0x%02x. "
reg10, clock_select); "Proceeding anyway.", reg10, clock_select);
return SR_ERR;
} }
return SR_OK; return SR_OK;