chronovu-la: Use new trigger API.
This commit is contained in:
parent
39c64c6a4f
commit
aeff7fa286
|
@ -26,11 +26,18 @@ static struct sr_dev_driver *di = &chronovu_la_driver_info;
|
||||||
static const int32_t hwcaps[] = {
|
static const int32_t hwcaps[] = {
|
||||||
SR_CONF_LOGIC_ANALYZER,
|
SR_CONF_LOGIC_ANALYZER,
|
||||||
SR_CONF_SAMPLERATE,
|
SR_CONF_SAMPLERATE,
|
||||||
SR_CONF_TRIGGER_TYPE,
|
SR_CONF_TRIGGER_MATCH,
|
||||||
SR_CONF_LIMIT_MSEC, /* TODO: Not yet implemented. */
|
SR_CONF_LIMIT_MSEC, /* TODO: Not yet implemented. */
|
||||||
SR_CONF_LIMIT_SAMPLES, /* TODO: Not yet implemented. */
|
SR_CONF_LIMIT_SAMPLES, /* TODO: Not yet implemented. */
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static const int32_t trigger_matches[] = {
|
||||||
|
SR_TRIGGER_ZERO,
|
||||||
|
SR_TRIGGER_ONE,
|
||||||
|
SR_TRIGGER_RISING,
|
||||||
|
SR_TRIGGER_FALLING,
|
||||||
|
};
|
||||||
|
|
||||||
/* The ChronoVu LA8/LA16 can have multiple VID/PID pairs. */
|
/* The ChronoVu LA8/LA16 can have multiple VID/PID pairs. */
|
||||||
static struct {
|
static struct {
|
||||||
uint16_t vid;
|
uint16_t vid;
|
||||||
|
@ -369,10 +376,11 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
|
||||||
grange[1] = g_variant_new_uint64(MAX_NUM_SAMPLES / 2);
|
grange[1] = g_variant_new_uint64(MAX_NUM_SAMPLES / 2);
|
||||||
*data = g_variant_new_tuple(grange, 2);
|
*data = g_variant_new_tuple(grange, 2);
|
||||||
break;
|
break;
|
||||||
case SR_CONF_TRIGGER_TYPE:
|
case SR_CONF_TRIGGER_MATCH:
|
||||||
if (!sdi || !sdi->priv || !(devc = sdi->priv) || !devc->prof)
|
if (!sdi || !sdi->priv || !(devc = sdi->priv) || !devc->prof)
|
||||||
return SR_ERR_BUG;
|
*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
|
||||||
*data = g_variant_new_string(devc->prof->trigger_type);
|
trigger_matches, devc->prof->num_trigger_matches,
|
||||||
|
sizeof(int32_t));
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
return SR_ERR_NA;
|
return SR_ERR_NA;
|
||||||
|
@ -461,8 +469,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
|
||||||
return SR_ERR;
|
return SR_ERR;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (cv_configure_channels(sdi) != SR_OK) {
|
if (cv_convert_trigger(sdi) != SR_OK) {
|
||||||
sr_err("Failed to configure channels.");
|
sr_err("Failed to configure trigger.");
|
||||||
return SR_ERR;
|
return SR_ERR;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -21,11 +21,9 @@
|
||||||
#include "protocol.h"
|
#include "protocol.h"
|
||||||
|
|
||||||
SR_PRIV const struct cv_profile cv_profiles[] = {
|
SR_PRIV const struct cv_profile cv_profiles[] = {
|
||||||
{ CHRONOVU_LA8, "LA8", "ChronoVu LA8", 8, SR_MHZ(100), "01",
|
{ CHRONOVU_LA8, "LA8", "ChronoVu LA8", 8, SR_MHZ(100), 2, 0.8388608 },
|
||||||
0.8388608 },
|
{ CHRONOVU_LA16, "LA16", "ChronoVu LA16", 16, SR_MHZ(200), 4, 0.042 },
|
||||||
{ CHRONOVU_LA16, "LA16", "ChronoVu LA16", 16, SR_MHZ(200), "01rf",
|
{ 0, NULL, NULL, 0, 0, 0, 0.0 },
|
||||||
0.042 },
|
|
||||||
{ 0, NULL, NULL, 0, 0, NULL, 0.0 },
|
|
||||||
};
|
};
|
||||||
|
|
||||||
/* LA8: channels are numbered 0-7. LA16: channels are numbered 0-15. */
|
/* LA8: channels are numbered 0-7. LA16: channels are numbered 0-15. */
|
||||||
|
@ -260,73 +258,60 @@ static int reset_device(struct dev_context *devc)
|
||||||
return SR_OK;
|
return SR_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
SR_PRIV int cv_configure_channels(const struct sr_dev_inst *sdi)
|
SR_PRIV int cv_convert_trigger(const struct sr_dev_inst *sdi)
|
||||||
{
|
{
|
||||||
struct dev_context *devc;
|
struct dev_context *devc;
|
||||||
const struct sr_channel *ch;
|
struct sr_trigger *trigger;
|
||||||
const GSList *l;
|
struct sr_trigger_stage *stage;
|
||||||
|
struct sr_trigger_match *match;
|
||||||
|
const GSList *l, *m;
|
||||||
uint16_t channel_bit;
|
uint16_t channel_bit;
|
||||||
char *tc;
|
|
||||||
|
|
||||||
devc = sdi->priv;
|
devc = sdi->priv;
|
||||||
devc->trigger_pattern = 0x0000; /* Default to "low" trigger. */
|
devc->trigger_pattern = 0x0000; /* Default to "low" trigger. */
|
||||||
devc->trigger_mask = 0x0000; /* Default to "don't care". */
|
devc->trigger_mask = 0x0000; /* Default to "don't care". */
|
||||||
devc->trigger_edgemask = 0x0000; /* Default to "state triggered". */
|
devc->trigger_edgemask = 0x0000; /* Default to "state triggered". */
|
||||||
|
|
||||||
for (l = sdi->channels; l; l = l->next) {
|
if (!(trigger = sr_session_trigger_get()))
|
||||||
ch = (struct sr_channel *)l->data;
|
return SR_OK;
|
||||||
|
|
||||||
if (!ch) {
|
if (g_slist_length(trigger->stages) > 1) {
|
||||||
sr_err("%s: channel was NULL.", __func__);
|
sr_err("This device only supports 1 trigger stage.");
|
||||||
return SR_ERR;
|
return SR_ERR;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Skip disabled channels. */
|
for (l = trigger->stages; l; l = l->next) {
|
||||||
if (!ch->enabled)
|
stage = l->data;
|
||||||
continue;
|
for (m = stage->matches; m; m = m->next) {
|
||||||
|
match = m->data;
|
||||||
/* Skip (enabled) channels with no configured trigger. */
|
if (!match->channel->enabled)
|
||||||
if (!ch->trigger)
|
/* Ignore disabled channels with a trigger. */
|
||||||
continue;
|
continue;
|
||||||
|
if (devc->prof->model == CHRONOVU_LA8 &&
|
||||||
/* Note: Must only be run if ch->trigger != NULL. */
|
(match->match == SR_TRIGGER_RISING
|
||||||
if (ch->index < 0 || ch->index > (int)devc->prof->num_channels - 1) {
|
|| match->match == SR_TRIGGER_FALLING)) {
|
||||||
sr_err("Invalid channel index %d, must be "
|
sr_err("This model supports only simple triggers.");
|
||||||
"between 0 and %d.", ch->index,
|
|
||||||
devc->prof->num_channels - 1);
|
|
||||||
return SR_ERR;
|
|
||||||
}
|
|
||||||
|
|
||||||
channel_bit = (1 << (ch->index));
|
|
||||||
|
|
||||||
/* Configure the channel's trigger pattern/mask/edgemask. */
|
|
||||||
for (tc = ch->trigger; tc && *tc; tc++) {
|
|
||||||
devc->trigger_mask |= channel_bit;
|
|
||||||
|
|
||||||
/* Sanity check, LA8 only supports low/high trigger. */
|
|
||||||
if ((devc->prof->model == CHRONOVU_LA8) &&
|
|
||||||
(*tc != '0' && *tc != '1')) {
|
|
||||||
sr_err("Invalid trigger '%c', only "
|
|
||||||
"'0'/'1' supported.", *tc);
|
|
||||||
return SR_ERR;
|
return SR_ERR;
|
||||||
}
|
}
|
||||||
|
channel_bit = (1 << (match->channel->index));
|
||||||
|
|
||||||
/* state: 1 == high, edge: 1 == rising edge. */
|
/* state: 1 == high, edge: 1 == rising edge. */
|
||||||
if (*tc == '1' || *tc == 'r')
|
if (match->match == SR_TRIGGER_ONE
|
||||||
|
|| match->match == SR_TRIGGER_RISING)
|
||||||
devc->trigger_pattern |= channel_bit;
|
devc->trigger_pattern |= channel_bit;
|
||||||
|
|
||||||
/* LA16 (but not LA8) supports edge triggering. */
|
/* LA16 (but not LA8) supports edge triggering. */
|
||||||
if ((devc->prof->model == CHRONOVU_LA16)) {
|
if ((devc->prof->model == CHRONOVU_LA16)) {
|
||||||
if (*tc == 'r' || *tc == 'f')
|
if (match->match == SR_TRIGGER_RISING
|
||||||
devc->trigger_edgemask |= channel_bit;
|
|| match->match == SR_TRIGGER_FALLING)
|
||||||
|
devc->trigger_edgemask |= channel_bit;
|
||||||
}
|
}
|
||||||
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
sr_dbg("Trigger pattern/mask/edgemask = 0x%04x / 0x%04x / 0x%04x.",
|
sr_dbg("Trigger pattern/mask/edgemask = 0x%04x / 0x%04x / 0x%04x.",
|
||||||
devc->trigger_pattern, devc->trigger_mask,
|
devc->trigger_pattern, devc->trigger_mask,
|
||||||
devc->trigger_edgemask);
|
devc->trigger_edgemask);
|
||||||
|
|
||||||
return SR_OK;
|
return SR_OK;
|
||||||
}
|
}
|
||||||
|
|
|
@ -47,7 +47,7 @@ struct cv_profile {
|
||||||
const char *iproduct; /* USB iProduct string */
|
const char *iproduct; /* USB iProduct string */
|
||||||
unsigned int num_channels;
|
unsigned int num_channels;
|
||||||
uint64_t max_samplerate;
|
uint64_t max_samplerate;
|
||||||
const char *trigger_type;
|
const int num_trigger_matches;
|
||||||
float trigger_constant;
|
float trigger_constant;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
@ -133,7 +133,7 @@ SR_PRIV void cv_fill_samplerates_if_needed(const struct sr_dev_inst *sdi);
|
||||||
SR_PRIV uint8_t cv_samplerate_to_divcount(const struct sr_dev_inst *sdi,
|
SR_PRIV uint8_t cv_samplerate_to_divcount(const struct sr_dev_inst *sdi,
|
||||||
uint64_t samplerate);
|
uint64_t samplerate);
|
||||||
SR_PRIV int cv_write(struct dev_context *devc, uint8_t *buf, int size);
|
SR_PRIV int cv_write(struct dev_context *devc, uint8_t *buf, int size);
|
||||||
SR_PRIV int cv_configure_channels(const struct sr_dev_inst *sdi);
|
SR_PRIV int cv_convert_trigger(const struct sr_dev_inst *sdi);
|
||||||
SR_PRIV int cv_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate);
|
SR_PRIV int cv_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate);
|
||||||
SR_PRIV int cv_read_block(struct dev_context *devc);
|
SR_PRIV int cv_read_block(struct dev_context *devc);
|
||||||
SR_PRIV void cv_send_block_to_session_bus(struct dev_context *devc, int block);
|
SR_PRIV void cv_send_block_to_session_bus(struct dev_context *devc, int block);
|
||||||
|
|
Loading…
Reference in New Issue