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fx2lafw/dslogic: Added DSLogic Plus and Basic variants

This commit is contained in:
Joel Holdsworth 2017-06-08 10:59:13 -06:00 committed by Uwe Hermann
parent a7600dc5c7
commit c33f32a922
3 changed files with 34 additions and 0 deletions
contrib
z60_libsigrok.rules
src/hardware/fx2lafw
api.cprotocol.h

4
contrib/z60_libsigrok.rules
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@ -83,6 +83,10 @@ ATTRS{idVendor}=="2a0e", ATTRS{idProduct}=="0001", MODE="660", GROUP="plugdev",
ATTRS{idVendor}=="2a0e", ATTRS{idProduct}=="0003", MODE="660", GROUP="plugdev", TAG+="uaccess"
# DreamSourceLab DScope
ATTRS{idVendor}=="2a0e", ATTRS{idProduct}=="0002", MODE="660", GROUP="plugdev", TAG+="uaccess"
# DreamSourceLab DSLogic Plus
ATTRS{idVendor}=="2a0e", ATTRS{idProduct}=="0020", MODE="660", GROUP="plugdev", TAG+="uaccess"
# DreamSourceLab DSLogic Basic
ATTRS{idVendor}=="2a0e", ATTRS{idProduct}=="0021", MODE="660", GROUP="plugdev", TAG+="uaccess"
# HAMEG HO720
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="ed72", MODE="660", GROUP="plugdev", TAG+="uaccess"

28
src/hardware/fx2lafw/api.c
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@ -81,6 +81,24 @@ static const struct fx2lafw_profile supported_fx2[] = {
"dreamsourcelab-dslogic-pro-fx2.fw",
DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
/* DreamSourceLab DSLogic Plus (before FW upload) */
{ 0x2a0e, 0x0020, "DreamSourceLab", "DSLogic Plus", NULL,
"dreamsourcelab-dslogic-plus-fx2.fw",
DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
/* DreamSourceLab DSLogic Plus (after FW upload) */
{ 0x2a0e, 0x0020, "DreamSourceLab", "DSLogic Plus", NULL,
"dreamsourcelab-dslogic-plus-fx2.fw",
DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
/* DreamSourceLab DSLogic Basic (before FW upload) */
{ 0x2a0e, 0x0021, "DreamSourceLab", "DSLogic Basic", NULL,
"dreamsourcelab-dslogic-basic-fx2.fw",
DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
/* DreamSourceLab DSLogic Basic (after FW upload) */
{ 0x2a0e, 0x0021, "DreamSourceLab", "DSLogic Basic", NULL,
"dreamsourcelab-dslogic-basic-fx2.fw",
DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
/*
* Saleae Logic
* EE Electronics ESLA100
@ -388,6 +406,8 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options)
if (!strcmp(prof->model, "DSLogic")
|| !strcmp(prof->model, "DSLogic Pro")
|| !strcmp(prof->model, "DSLogic Plus")
|| !strcmp(prof->model, "DSLogic Basic")
|| !strcmp(prof->model, "DSCope")) {
devc->dslogic = TRUE;
devc->samplerates = dslogic_samplerates;
@ -517,6 +537,10 @@ static int dev_open(struct sr_dev_inst *sdi)
fpga_firmware = DSLOGIC_FPGA_FIRMWARE_5V;
} else if (!strcmp(devc->profile->model, "DSLogic Pro")){
fpga_firmware = DSLOGIC_PRO_FPGA_FIRMWARE;
} else if (!strcmp(devc->profile->model, "DSLogic Plus")){
fpga_firmware = DSLOGIC_PLUS_FPGA_FIRMWARE;
} else if (!strcmp(devc->profile->model, "DSLogic Basic")){
fpga_firmware = DSLOGIC_BASIC_FPGA_FIRMWARE;
} else if (!strcmp(devc->profile->model, "DSCope")) {
fpga_firmware = DSCOPE_FPGA_FIRMWARE;
}
@ -695,6 +719,10 @@ static int config_set(uint32_t key, GVariant *data,
ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_3V3);
} else if (!strcmp(devc->profile->model, "DSLogic Pro")) {
ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE);
} else if (!strcmp(devc->profile->model, "DSLogic Plus")) {
ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PLUS_FPGA_FIRMWARE);
} else if (!strcmp(devc->profile->model, "DSLogic Basic")) {
ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_BASIC_FPGA_FIRMWARE);
}
break;
case SR_CONF_EXTERNAL_CLOCK:

2
src/hardware/fx2lafw/protocol.h
View File

@ -61,6 +61,8 @@
#define DSLOGIC_FPGA_FIRMWARE_3V3 "dreamsourcelab-dslogic-fpga-3v3.fw"
#define DSCOPE_FPGA_FIRMWARE "dreamsourcelab-dscope-fpga.fw"
#define DSLOGIC_PRO_FPGA_FIRMWARE "dreamsourcelab-dslogic-pro-fpga.fw"
#define DSLOGIC_PLUS_FPGA_FIRMWARE "dreamsourcelab-dslogic-plus-fpga.fw"
#define DSLOGIC_BASIC_FPGA_FIRMWARE "dreamsourcelab-dslogic-basic-fpga.fw"
/* Protocol commands */
#define CMD_GET_FW_VERSION 0xb0