Sigma: 50 MHZ falling/rising edge trigger support.
Falling/rising edge and value/mask triggers can be combined, e.g.: --triggers 1=0,2=r,3=1,4=1
This commit is contained in:
Håvard Espeland
parent
f758d0744d
commit
c53d793f03
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@ -49,13 +49,7 @@ static int num_probes = 0;
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static int samples_per_event = 0;
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static int capture_ratio = 50;
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/* Single-pin trigger support (100 and 200 MHz).*/
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static uint8_t triggerpin = 1;
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static uint8_t triggerfall = 0;
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/* Simple trigger support (<= 50 MHz). */
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static uint16_t triggermask = 1;
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static uint16_t triggervalue = 1;
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static struct sigma_trigger trigger;
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static uint64_t supported_samplerates[] = {
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KHZ(200),
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@ -570,15 +564,21 @@ static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerat
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return ret;
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}
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/* Only trigger on single pin supported (in 100-200 MHz modes). */
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/*
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* In 100 and 200 MHz mode, only a single pin rising/falling can be
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* set as trigger. In other modes, two rising/falling triggers can be set,
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* in addition to value/mask trigger for any number of probes.
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*
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* The Sigma supports complex triggers using boolean expressions, but this
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* has not been implemented yet.
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*/
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static int configure_probes(GSList *probes)
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{
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struct probe *probe;
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GSList *l;
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int trigger_set = 0;
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triggermask = 0;
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triggervalue = 0;
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memset(&trigger, 0, sizeof(struct sigma_trigger));
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for (l = probes; l; l = l->next) {
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probe = (struct probe *)l->data;
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@ -587,16 +587,16 @@ static int configure_probes(GSList *probes)
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continue;
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if (cur_samplerate >= MHZ(100)) {
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/* Fast trigger support */
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/* Fast trigger support. */
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if (trigger_set) {
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g_warning("Asix Sigma only supports a single pin trigger "
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"in 100 and 200 MHz mode.");
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return SIGROK_ERR;
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}
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if (probe->trigger[0] == 'f')
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triggerfall = 1;
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trigger.fast_fall = 1;
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else if (probe->trigger[0] == 'r')
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triggerfall = 0;
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trigger.fast_fall = 0;
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else {
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g_warning("Asix Sigma only supports "
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"rising/falling trigger in 100 "
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@ -604,25 +604,34 @@ static int configure_probes(GSList *probes)
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return SIGROK_ERR;
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}
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triggerpin = probe->index - 1;
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} else {
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/* Normal trigger support */
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triggermask |= 1 << (probe->index - 1);
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trigger.fast_pin = probe->index - 1;
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if (probe->trigger[0] == '1')
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triggervalue |= 1 << (probe->index - 1);
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else if (probe->trigger[0] == '0')
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triggervalue |= 0 << (probe->index - 1);
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else {
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g_warning("Asix Sigma only supports "
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"trigger values in <= 50"
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" MHz mode.");
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return SIGROK_ERR;
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++trigger_set;
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} else {
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/* Simple trigger support (event). */
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if (probe->trigger[0] == '1') {
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trigger.simplevalue |= 1 << (probe->index - 1);
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trigger.simplemask |= 1 << (probe->index - 1);
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}
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else if (probe->trigger[0] == '0') {
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trigger.simplevalue |= 0 << (probe->index - 1);
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trigger.simplemask |= 1 << (probe->index - 1);
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}
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else if (probe->trigger[0] == 'f') {
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trigger.fallingmask |= 1 << (probe->index - 1);
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++trigger_set;
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}
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else if (probe->trigger[0] == 'r') {
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trigger.risingmask |= 1 << (probe->index - 1);
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++trigger_set;
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}
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if (trigger_set > 2) {
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g_warning("Asix Sigma only supports 2 rising/"
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"falling triggers.");
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return SIGROK_ERR;
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}
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}
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++trigger_set;
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}
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return SIGROK_OK;
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@ -917,25 +926,14 @@ static int receive_data(int fd, int revents, void *user_data)
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return TRUE;
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}
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/*
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* Build trigger LUTs used by 50 MHz and lower sample rates for supporting
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* simple pin change and state triggers. Only two transitions (rise/fall) can be
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* set at any time, but a full mask and value can be set (0/1).
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*/
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static int build_basic_trigger(struct triggerlut *lut)
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/* Build a LUT entry used by the trigger functions. */
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static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
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{
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int i, j, k, bit;
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memset(lut, 0, sizeof(struct triggerlut));
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/* Unknown */
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lut->m4 = 0xa000;
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/* Set the LUT for controlling value/maske trigger */
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/* For each quad probe. */
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for (i = 0; i < 4; ++i) {
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lut->m2d[i] = 0xffff;
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entry[i] = 0xffff;
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/* For each bit in LUT. */
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for (j = 0; j < 16; ++j)
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@ -944,17 +942,140 @@ static int build_basic_trigger(struct triggerlut *lut)
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for (k = 0; k < 4; ++k) {
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bit = 1 << (i * 4 + k);
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if ((triggermask & bit) &&
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((!(triggervalue & bit)) !=
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/* Set bit in entry */
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if ((mask & bit) &&
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((!(value & bit)) !=
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(!(j & (1 << k)))))
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lut->m2d[i] &= ~(1 << j);
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entry[i] &= ~(1 << j);
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}
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}
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}
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/* Add a logical function to LUT mask. */
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static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
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int index, int neg, uint16_t *mask)
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{
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int i, j;
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int x[2][2], tmp, a, b, aset, bset, rset;
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memset(x, 0, 4 * sizeof(int));
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/* Trigger detect condition. */
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switch (oper) {
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case OP_LEVEL:
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x[0][1] = 1;
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x[1][1] = 1;
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break;
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case OP_NOT:
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x[0][0] = 1;
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x[1][0] = 1;
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break;
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case OP_RISE:
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x[0][1] = 1;
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break;
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case OP_FALL:
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x[1][0] = 1;
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break;
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case OP_RISEFALL:
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x[0][1] = 1;
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x[1][0] = 1;
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break;
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case OP_NOTRISE:
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x[1][1] = 1;
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x[0][0] = 1;
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x[1][0] = 1;
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break;
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case OP_NOTFALL:
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x[1][1] = 1;
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x[0][0] = 1;
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x[0][1] = 1;
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break;
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case OP_NOTRISEFALL:
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x[1][1] = 1;
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x[0][0] = 1;
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break;
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}
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/* Transpose if neg is set. */
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if (neg) {
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for (i = 0; i < 2; ++i)
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for (j = 0; j < 2; ++j) {
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tmp = x[i][j];
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x[i][j] = x[1-i][1-j];
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x[1-i][1-j] = tmp;
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}
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}
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/* Unused when not triggering on transitions */
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lut->m3 = 0xffff;
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/* Update mask with function. */
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for (i = 0; i < 16; ++i) {
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a = (i >> (2 * index + 0)) & 1;
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b = (i >> (2 * index + 1)) & 1;
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/* Triggertype: event */
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aset = (*mask >> i) & 1;
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bset = x[b][a];
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if (func == FUNC_AND || func == FUNC_NAND)
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rset = aset & bset;
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else if (func == FUNC_OR || func == FUNC_NOR)
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rset = aset | bset;
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else if (func == FUNC_XOR || func == FUNC_NXOR)
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rset = aset ^ bset;
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if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
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rset = !rset;
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*mask &= ~(1 << i);
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if (rset)
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*mask |= 1 << i;
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}
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}
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/*
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* Build trigger LUTs used by 50 MHz and lower sample rates for supporting
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* simple pin change and state triggers. Only two transitions (rise/fall) can be
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* set at any time, but a full mask and value can be set (0/1).
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*/
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static int build_basic_trigger(struct triggerlut *lut)
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{
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int i,j;
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uint16_t masks[2] = {0, 0};
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memset(lut, 0, sizeof(struct triggerlut));
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/* Contant for simple triggers. */
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lut->m4 = 0xa000;
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/* Value/mask trigger support. */
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build_lut_entry(trigger.simplevalue, trigger.simplemask, lut->m2d);
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/* Rise/fall trigger support. */
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for (i = 0, j = 0; i < 16; ++i) {
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if (trigger.risingmask & (1 << i) ||
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trigger.fallingmask & (1 << i))
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masks[j++] = 1 << i;
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}
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build_lut_entry(masks[0], masks[0], lut->m0d);
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build_lut_entry(masks[1], masks[1], lut->m1d);
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/* Add glue logic */
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if (masks[0] || masks[1]) {
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/* Transition trigger. */
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if (masks[0] & trigger.risingmask)
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add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
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if (masks[0] & trigger.fallingmask)
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add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
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if (masks[1] & trigger.risingmask)
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add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
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if (masks[1] & trigger.fallingmask)
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add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
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} else {
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/* Only value/mask trigger. */
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lut->m3 = 0xffff;
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}
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/* Triggertype: event. */
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lut->params.selres = 3;
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return SIGROK_OK;
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@ -989,8 +1110,8 @@ static int hw_start_acquisition(int device_index, gpointer session_device_id)
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if (cur_samplerate >= MHZ(100)) {
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sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81);
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triggerselect = (1 << LEDSEL1) | (triggerfall << 3) |
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(triggerpin & 0x7);
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triggerselect = (1 << LEDSEL1) | (trigger.fast_fall << 3) |
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(trigger.fast_pin & 0x7);
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/* All other modes. */
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} else if (cur_samplerate <= MHZ(50)) {
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@ -122,4 +122,43 @@ struct triggerlut {
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} params;
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};
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/* Trigger configuration */
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struct sigma_trigger {
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/* Single-pin trigger support (100 and 200 MHz).*/
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uint8_t fast_pin;
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uint8_t fast_fall;
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/* Simple trigger support (<= 50 MHz). */
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uint16_t simplemask;
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uint16_t simplevalue;
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/* Only two probes can be used in mask */
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uint16_t risingmask;
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uint16_t fallingmask;
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/* TODO: Advanced trigger support (boolean expressions). */
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};
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/* Events for trigger operation. */
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enum triggerop {
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OP_LEVEL = 1,
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OP_NOT,
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OP_RISE,
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OP_FALL,
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OP_RISEFALL,
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OP_NOTRISE,
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OP_NOTFALL,
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OP_NOTRISEFALL,
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};
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/* Logical functions for trigger operation. */
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enum triggerfunc {
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FUNC_AND = 1,
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FUNC_NAND,
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FUNC_OR,
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FUNC_NOR,
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FUNC_XOR,
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FUNC_NXOR,
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};
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#endif
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