saleae-logic-pro: Implement bitstream upload and initialization
The control packets can be longer than 256 bytes, so change the low-level functions accordingly.
This commit is contained in:
Jan Luebbe
parent
f1aca068c7
commit
da39089014
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@ -289,7 +289,7 @@ static int dev_open(struct sr_dev_inst *sdi)
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if (devc->dig_samplerate == 0)
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devc->dig_samplerate = samplerates[3];
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return SR_OK;
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return saleae_logic_pro_init(sdi);
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}
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static int dev_close(struct sr_dev_inst *sdi)
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@ -418,10 +418,6 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
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uint8_t *buf;
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unsigned int i, ret;
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ret = saleae_logic_pro_init(sdi);
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if (ret != SR_OK)
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return ret;
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ret = saleae_logic_pro_prepare(sdi);
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if (ret != SR_OK)
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return ret;
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@ -24,16 +24,23 @@
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#define COMMAND_START_CAPTURE 0x01
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#define COMMAND_STOP_CAPTURE 0x02
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#define COMMAND_READ_EEPROM 0x07
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#define COMMAND_INIT_BITSTREAM 0x7e
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#define COMMAND_SEND_BITSTREAM 0x7f
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#define COMMAND_WRITE_REG 0x80
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#define COMMAND_READ_REG 0x81
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#define COMMAND_READ_TEMP 0x86
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#define COMMAND_WRITE_I2C 0x87
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#define COMMAND_READ_I2C 0x88
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#define COMMAND_WAKE_I2C 0x89
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#define COMMAND_READ_FW_VER 0x8b
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#define REG_ADC_IDX 0x03
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#define REG_ADC_VAL_LSB 0x04
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#define REG_ADC_VAL_MSB 0x05
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#define REG_LED_RED 0x0f
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#define REG_LED_GREEN 0x10
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#define REG_LED_BLUE 0x11
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#define REG_STATUS 0x40
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static void iterate_lfsr(const struct sr_dev_inst *sdi)
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{
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@ -50,11 +57,11 @@ static void iterate_lfsr(const struct sr_dev_inst *sdi)
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(lfsr >> 31) \
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) << 31);
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}
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sr_dbg("Iterate 0x%08x -> 0x%08x", devc->lfsr, lfsr);
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sr_spew("Iterate 0x%08x -> 0x%08x", devc->lfsr, lfsr);
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devc->lfsr = lfsr;
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}
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static void encrypt(const struct sr_dev_inst *sdi, const uint8_t *in, uint8_t *out, uint8_t len)
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static void encrypt(const struct sr_dev_inst *sdi, const uint8_t *in, uint8_t *out, uint16_t len)
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{
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struct dev_context *devc = sdi->priv;
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uint32_t lfsr = devc->lfsr;
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@ -73,7 +80,7 @@ static void encrypt(const struct sr_dev_inst *sdi, const uint8_t *in, uint8_t *o
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iterate_lfsr(sdi);
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}
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static void decrypt(const struct sr_dev_inst *sdi, uint8_t *data, uint8_t len)
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static void decrypt(const struct sr_dev_inst *sdi, uint8_t *data, uint16_t len)
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{
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struct dev_context *devc = sdi->priv;
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uint32_t lfsr = devc->lfsr;
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@ -85,15 +92,15 @@ static void decrypt(const struct sr_dev_inst *sdi, uint8_t *data, uint8_t len)
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}
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static int transact(const struct sr_dev_inst *sdi,
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const uint8_t *req, uint8_t req_len,
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uint8_t *rsp, uint8_t rsp_len)
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const uint8_t *req, uint16_t req_len,
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uint8_t *rsp, uint16_t rsp_len)
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{
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struct sr_usb_dev_inst *usb = sdi->conn;
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uint8_t *req_enc;
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uint8_t rsp_dummy[1] = {};
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int ret, xfer;
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if (req_len < 2 || req_len > 64 || rsp_len > 128 ||
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if (req_len < 2 || req_len > 1024 || rsp_len > 128 ||
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!req || (rsp_len > 0 && !rsp))
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return SR_ERR_ARG;
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@ -174,6 +181,77 @@ static int write_reg(const struct sr_dev_inst *sdi,
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return write_regs(sdi, ®s, 1);
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}
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static int read_regs(const struct sr_dev_inst *sdi,
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const uint8_t *regs, uint8_t *values,
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uint8_t cnt)
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{
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uint8_t req[33];
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int i;
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if (cnt < 1 || cnt > 30)
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return SR_ERR_ARG;
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req[0] = 0x00;
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req[1] = COMMAND_READ_REG;
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req[2] = cnt;
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for (i = 0; i < cnt; i++) {
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req[3 + i] = regs[i];
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}
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return transact(sdi, req, 3 + cnt, values, cnt);
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}
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static int read_reg(const struct sr_dev_inst *sdi,
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uint8_t address, uint8_t *value)
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{
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return read_regs(sdi, &address, value, 1);
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}
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static int write_adc(const struct sr_dev_inst *sdi,
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uint8_t address, uint16_t value)
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{
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uint8_t regs[][2] = {
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{REG_ADC_IDX, address},
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{REG_ADC_VAL_LSB, value},
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{REG_ADC_VAL_MSB, value >> 8},
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};
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return write_regs(sdi, regs, G_N_ELEMENTS(regs));
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}
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static int read_eeprom(const struct sr_dev_inst *sdi,
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uint16_t address, uint8_t *data, uint16_t len)
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{
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uint8_t req[8] = {
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0x00, COMMAND_READ_EEPROM,
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0x33, 0x81, /* Unknown values */
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address, address >> 8,
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len, len >> 8
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};
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return transact(sdi, req, sizeof(req), data, len);
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}
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static int read_eeprom_serial(const struct sr_dev_inst *sdi,
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uint8_t data[8])
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{
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return read_eeprom(sdi, 0x08, data, 0x8);
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}
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static int read_eeprom_magic(const struct sr_dev_inst *sdi,
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uint8_t data[16])
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{
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return read_eeprom(sdi, 0x10, data, 0x10);
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}
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static int read_temperature(const struct sr_dev_inst *sdi, int8_t *temp)
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{
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uint8_t req[2] = {0x00, COMMAND_READ_TEMP};
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return transact(sdi, req, sizeof(req), (uint8_t*)temp, 1);
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}
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static int get_firmware_version(const struct sr_dev_inst *sdi)
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{
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uint8_t req[2] = {0x00, COMMAND_READ_FW_VER};
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@ -386,6 +464,95 @@ static int authenticate(const struct sr_dev_inst *sdi)
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return SR_OK;
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}
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static int upload_bitstream_part(const struct sr_dev_inst *sdi,
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const uint8_t *data, uint16_t len)
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{
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uint8_t req[4 + 1020];
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uint8_t rsp[1];
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int ret;
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if (len < 1 || len > 1020 || !data)
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return SR_ERR_ARG;
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req[0] = 0x00;
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req[1] = COMMAND_SEND_BITSTREAM;
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req[2] = len;
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req[3] = len >> 8;
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memcpy(req + 4, data, len);
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ret = transact(sdi, req, 4 + len, rsp, sizeof(rsp));
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if (ret != SR_OK)
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return ret;
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if (rsp[0] != 0x00) {
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sr_dbg("Failed to do bitstream upload (0x%02x).", rsp[0]);
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return SR_ERR;
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}
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return SR_OK;
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}
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static int upload_bitstream(const struct sr_dev_inst *sdi,
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const char *name)
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{
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struct drv_context *drvc = sdi->driver->context;
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unsigned char *bitstream = NULL;
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uint8_t req[2];
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uint8_t rsp[1];
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uint8_t reg_val;
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int ret = SR_ERR;
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size_t bs_size, bs_offset = 0, bs_part_size;
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bitstream = sr_resource_load(drvc->sr_ctx, SR_RESOURCE_FIRMWARE,
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name, &bs_size, 512 * 1024);
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if (!bitstream)
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goto out;
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sr_info("Uploading bitstream '%s'.", name);
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req[0] = 0x00;
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req[1] = COMMAND_INIT_BITSTREAM;
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ret = transact(sdi, req, sizeof(req), rsp, sizeof(rsp));
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if (ret != SR_OK)
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return ret;
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if (rsp[0] != 0x00) {
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sr_err("Failed to start bitstream upload (0x%02x).", rsp[0]);
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ret = SR_ERR;
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goto out;
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}
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while (bs_offset < bs_size) {
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bs_part_size = MIN(bs_size - bs_offset, 1020);
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sr_spew("Uploading %zd bytes.", bs_part_size);
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ret = upload_bitstream_part(sdi, bitstream + bs_offset, bs_part_size);
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if (ret != SR_OK)
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goto out;
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bs_offset += bs_part_size;
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}
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ret = SR_OK;
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sr_info("Bitstream upload done.");
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/* Check a scratch register? */
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ret = write_reg(sdi, 0x7f, 0xaa);
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if (ret != SR_OK)
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goto out;
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ret = read_reg(sdi, 0x7f, ®_val);
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if (ret != SR_OK)
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goto out;
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if (reg_val != 0xaa) {
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sr_err("Failed FPGA register read-back (0x%02x != 0xaa).", rsp[0]);
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ret = SR_ERR;
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goto out;
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}
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out:
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g_free(bitstream);
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return ret;
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}
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#if 0
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static int set_led(const struct sr_dev_inst *sdi, uint8_t r, uint8_t g, uint8_t b)
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{
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@ -428,8 +595,131 @@ static int configure_channels(const struct sr_dev_inst *sdi)
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SR_PRIV int saleae_logic_pro_init(const struct sr_dev_inst *sdi)
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{
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reseed(sdi);
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get_firmware_version(sdi);
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uint8_t reg_val;
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uint8_t dummy[8];
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uint8_t serial[8];
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uint8_t magic[16];
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int8_t temperature;
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int ret, i;
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ret = reseed(sdi);
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if (ret != SR_OK)
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return ret;
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ret = get_firmware_version(sdi);
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if (ret != SR_OK)
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return ret;
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sr_dbg("read serial");
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ret = read_eeprom_serial(sdi, serial);
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if (ret != SR_OK)
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return ret;
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/* Check if we need to upload the bitstream. */
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ret = read_reg(sdi, 0x7f, ®_val);
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if (ret != SR_OK)
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return ret;
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if (reg_val == 0xaa) {
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sr_info("Skipping bitstream upload.");
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} else {
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ret = upload_bitstream(sdi, "saleae-logicpro16-fpga.bitstream");
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if (ret != SR_OK)
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return ret;
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}
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/* Reset the ADC? */
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sr_dbg("reset ADC");
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ret = write_reg(sdi, 0x00, 0x00);
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x00, 0x80);
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if (ret != SR_OK)
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return ret;
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sr_dbg("init ADC");
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ret = write_adc(sdi, 0x11, 0x0444);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x12, 0x0777);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x25, 0x0000);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x45, 0x0000);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x2a, 0x1111);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x2b, 0x1111);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x46, 0x0004);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x50, 0x0000);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x55, 0x0020);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x56, 0x0000);
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x15, 0x00);
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if (ret != SR_OK)
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return ret;
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ret = write_adc(sdi, 0x0f, 0x0100);
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if (ret != SR_OK)
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return ret;
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/* Resets? */
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sr_dbg("resets");
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ret = write_reg(sdi, 0x00, 0x02); /* bit 1 */
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x00, 0x00);
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x00, 0x04); /* bit 2 */
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x00, 0x00);
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x00, 0x08); /* bit 3 */
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if (ret != SR_OK)
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return ret;
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ret = write_reg(sdi, 0x00, 0x00);
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if (ret != SR_OK)
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return ret;
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sr_dbg("read dummy");
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for (i = 0; i < 8; i++) {
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ret = read_reg(sdi, 0x41 + i, &dummy[i]);
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if (ret != SR_OK)
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return ret;
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}
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/* Read and write back magic EEPROM value. */
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sr_dbg("read/write magic");
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ret = read_eeprom_magic(sdi, magic);
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if (ret != SR_OK)
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return ret;
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for (i = 0; i < 16; i++) {
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ret = write_reg(sdi, 0x17, magic[i]);
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if (ret != SR_OK)
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return ret;
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}
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ret = read_temperature(sdi, &temperature);
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if (ret != SR_OK)
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return ret;
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sr_dbg("temperature = %d", temperature);
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/* Setting the LED doesn't work yet. */
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/* set_led(sdi, 0x00, 0x00, 0xff); */
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@ -522,10 +812,20 @@ SR_PRIV int saleae_logic_pro_stop(const struct sr_dev_inst *sdi)
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{
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uint8_t stop_req[] = {0x00, 0x02};
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uint8_t stop_rsp[2] = {};
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uint8_t status;
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int ret;
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write_reg(sdi, 0x00, 0x00);
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transact(sdi, stop_req, sizeof(stop_req), stop_rsp, sizeof(stop_rsp));
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ret = read_reg(sdi, 0x40, &status);
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if (ret != SR_OK)
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return ret;
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if (status != 0x20) {
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sr_err("Capture error (status reg = 0x%02x).", status);
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return SR_ERR;
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}
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return SR_OK;
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}
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