saleae-logic16: Add voltage threshold conf.

This commit is contained in:
Marcus Comstedt 2013-08-04 16:20:07 +02:00 committed by Uwe Hermann
parent b117363ad7
commit db11d7d2d0
5 changed files with 72 additions and 2 deletions

View File

@ -21,6 +21,7 @@
#include <libusb.h> #include <libusb.h>
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#include <math.h>
#include "libsigrok.h" #include "libsigrok.h"
#include "libsigrok-internal.h" #include "libsigrok-internal.h"
#include "protocol.h" #include "protocol.h"
@ -47,6 +48,7 @@ static const int32_t hwopts[] = {
static const int32_t hwcaps[] = { static const int32_t hwcaps[] = {
SR_CONF_LOGIC_ANALYZER, SR_CONF_LOGIC_ANALYZER,
SR_CONF_SAMPLERATE, SR_CONF_SAMPLERATE,
SR_CONF_VOLTAGE_THRESHOLD,
/* These are really implemented in the driver, not the hardware. */ /* These are really implemented in the driver, not the hardware. */
SR_CONF_LIMIT_SAMPLES, SR_CONF_LIMIT_SAMPLES,
@ -59,6 +61,15 @@ static const char *probe_names[NUM_PROBES + 1] = {
NULL, NULL,
}; };
static const struct {
enum voltage_range range;
gdouble low;
gdouble high;
} volt_thresholds[] = {
{ VOLTAGE_RANGE_18_33_V, 0.7, 1.4 },
{ VOLTAGE_RANGE_5_V, 1.4, 3.6 },
};
static const uint64_t samplerates[] = { static const uint64_t samplerates[] = {
SR_KHZ(500), SR_KHZ(500),
SR_MHZ(1), SR_MHZ(1),
@ -192,6 +203,7 @@ static GSList *scan(GSList *options)
if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
return NULL; return NULL;
devc->selected_voltage_range = VOLTAGE_RANGE_18_33_V;
sdi->priv = devc; sdi->priv = devc;
drvc->instances = g_slist_append(drvc->instances, sdi); drvc->instances = g_slist_append(drvc->instances, sdi);
devices = g_slist_append(devices, sdi); devices = g_slist_append(devices, sdi);
@ -430,8 +442,10 @@ static int config_get(int key, GVariant **data, const struct sr_dev_inst *sdi)
{ {
struct dev_context *devc; struct dev_context *devc;
struct sr_usb_dev_inst *usb; struct sr_usb_dev_inst *usb;
GVariant *range[2];
char str[128]; char str[128];
int ret; int ret;
unsigned i;
ret = SR_OK; ret = SR_OK;
switch (key) { switch (key) {
@ -452,6 +466,21 @@ static int config_get(int key, GVariant **data, const struct sr_dev_inst *sdi)
devc = sdi->priv; devc = sdi->priv;
*data = g_variant_new_uint64(devc->cur_samplerate); *data = g_variant_new_uint64(devc->cur_samplerate);
break; break;
case SR_CONF_VOLTAGE_THRESHOLD:
if (!sdi)
return SR_ERR;
devc = sdi->priv;
ret = SR_ERR;
for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++)
if (devc->selected_voltage_range ==
volt_thresholds[i].range) {
range[0] = g_variant_new_double(volt_thresholds[i].low);
range[1] = g_variant_new_double(volt_thresholds[i].high);
*data = g_variant_new_tuple(range, 2);
ret = SR_OK;
break;
}
break;
default: default:
return SR_ERR_NA; return SR_ERR_NA;
} }
@ -462,7 +491,9 @@ static int config_get(int key, GVariant **data, const struct sr_dev_inst *sdi)
static int config_set(int key, GVariant *data, const struct sr_dev_inst *sdi) static int config_set(int key, GVariant *data, const struct sr_dev_inst *sdi)
{ {
struct dev_context *devc; struct dev_context *devc;
gdouble low, high;
int ret; int ret;
unsigned i;
if (sdi->status != SR_ST_ACTIVE) if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED; return SR_ERR_DEV_CLOSED;
@ -477,6 +508,19 @@ static int config_set(int key, GVariant *data, const struct sr_dev_inst *sdi)
case SR_CONF_LIMIT_SAMPLES: case SR_CONF_LIMIT_SAMPLES:
devc->limit_samples = g_variant_get_uint64(data); devc->limit_samples = g_variant_get_uint64(data);
break; break;
case SR_CONF_VOLTAGE_THRESHOLD:
g_variant_get(data, "(dd)", &low, &high);
ret = SR_ERR_ARG;
for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
if (fabs(volt_thresholds[i].low - low) < 0.1 &&
fabs(volt_thresholds[i].high - high) < 0.1) {
devc->selected_voltage_range =
volt_thresholds[i].range;
ret = SR_OK;
break;
}
}
break;
default: default:
ret = SR_ERR_NA; ret = SR_ERR_NA;
} }
@ -486,9 +530,10 @@ static int config_set(int key, GVariant *data, const struct sr_dev_inst *sdi)
static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi) static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
{ {
GVariant *gvar; GVariant *gvar, *range[2];
GVariantBuilder gvb; GVariantBuilder gvb;
int ret; int ret;
unsigned i;
(void)sdi; (void)sdi;
@ -509,6 +554,16 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar); g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb); *data = g_variant_builder_end(&gvb);
break; break;
case SR_CONF_VOLTAGE_THRESHOLD:
g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
range[0] = g_variant_new_double(volt_thresholds[i].low);
range[1] = g_variant_new_double(volt_thresholds[i].high);
gvar = g_variant_new_tuple(range, 2);
g_variant_builder_add_value(&gvb, gvar);
}
*data = g_variant_builder_end(&gvb);
break;
default: default:
return SR_ERR_NA; return SR_ERR_NA;
} }

View File

@ -429,6 +429,9 @@ SR_PRIV int saleae_logic16_setup_acquisition(const struct sr_dev_inst *sdi,
uint8_t clock_select, reg1, reg10; uint8_t clock_select, reg1, reg10;
uint64_t div; uint64_t div;
int i, ret, nchan = 0; int i, ret, nchan = 0;
struct dev_context *devc;
devc = sdi->priv;
if (samplerate == 0 || samplerate > MAX_SAMPLE_RATE) { if (samplerate == 0 || samplerate > MAX_SAMPLE_RATE) {
sr_err("Unable to sample at %" PRIu64 "Hz.", samplerate); sr_err("Unable to sample at %" PRIu64 "Hz.", samplerate);
@ -460,6 +463,9 @@ SR_PRIV int saleae_logic16_setup_acquisition(const struct sr_dev_inst *sdi,
return SR_ERR; return SR_ERR;
} }
if ((ret = upload_fpga_bitstream(sdi, devc->selected_voltage_range)) != SR_OK)
return ret;
if ((ret = read_fpga_register(sdi, 1, &reg1)) != SR_OK) if ((ret = read_fpga_register(sdi, 1, &reg1)) != SR_OK)
return ret; return ret;
@ -568,7 +574,7 @@ SR_PRIV int saleae_logic16_init_device(const struct sr_dev_inst *sdi)
if ((ret = read_eeprom(sdi, 8, 8, devc->eeprom_data)) != SR_OK) if ((ret = read_eeprom(sdi, 8, 8, devc->eeprom_data)) != SR_OK)
return ret; return ret;
if ((ret = upload_fpga_bitstream(sdi, VOLTAGE_RANGE_18_33_V)) != SR_OK) if ((ret = upload_fpga_bitstream(sdi, devc->selected_voltage_range)) != SR_OK)
return ret; return ret;
return SR_OK; return SR_OK;

View File

@ -59,6 +59,9 @@ struct dev_context {
/** The currently configured input voltage of the device */ /** The currently configured input voltage of the device */
enum voltage_range cur_voltage_range; enum voltage_range cur_voltage_range;
/** The input voltage selected by the user */
enum voltage_range selected_voltage_range;
/** Channels to use */ /** Channels to use */
uint16_t cur_channels; uint16_t cur_channels;

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@ -93,6 +93,8 @@ static struct sr_config_info sr_config_info_data[] = {
"Hold min", NULL}, "Hold min", NULL},
{SR_CONF_SPL_MEASUREMENT_RANGE, SR_T_UINT64_RANGE, "spl_meas_range", {SR_CONF_SPL_MEASUREMENT_RANGE, SR_T_UINT64_RANGE, "spl_meas_range",
"Sound pressure level measurement range", NULL}, "Sound pressure level measurement range", NULL},
{SR_CONF_VOLTAGE_THRESHOLD, SR_T_DOUBLE_RANGE, "voltage_threshold",
"Voltage threshold", NULL },
{SR_CONF_POWER_OFF, SR_T_BOOL, "power_off", {SR_CONF_POWER_OFF, SR_T_BOOL, "power_off",
"Power off", NULL}, "Power off", NULL},
{SR_CONF_DATA_SOURCE, SR_T_CHAR, "data_source", {SR_CONF_DATA_SOURCE, SR_T_CHAR, "data_source",

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@ -142,6 +142,7 @@ enum {
SR_T_RATIONAL_VOLT, SR_T_RATIONAL_VOLT,
SR_T_KEYVALUE, SR_T_KEYVALUE,
SR_T_UINT64_RANGE, SR_T_UINT64_RANGE,
SR_T_DOUBLE_RANGE,
}; };
/** Value for sr_datafeed_packet.type. */ /** Value for sr_datafeed_packet.type. */
@ -681,6 +682,9 @@ enum {
/** Min hold mode. */ /** Min hold mode. */
SR_CONF_HOLD_MIN, SR_CONF_HOLD_MIN,
/** Logic low-high threshold range. */
SR_CONF_VOLTAGE_THRESHOLD,
/*--- Special stuff -------------------------------------------------*/ /*--- Special stuff -------------------------------------------------*/
/** Scan options supported by the driver. */ /** Scan options supported by the driver. */