Rewrote the link-mso19.c into api and protocol. Still need to test and cleanup some more
This commit is contained in:
lelazary
Uwe Hermann
parent
26e6ef346d
commit
df92e5cf6b
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@ -0,0 +1,538 @@
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/*
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* This file is part of the sigrok project.
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*
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* Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "protocol.h"
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#define SERIALCOMM "460800/8n1" //Default communication params
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#define SERIALCONN "/dev/ttyUSB0" //Default communication params
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static const int hwcaps[] = {
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SR_HWCAP_LOGIC_ANALYZER,
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SR_HWCAP_SAMPLERATE,
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// SR_HWCAP_CAPTURE_RATIO,
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SR_HWCAP_LIMIT_SAMPLES,
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// SR_HWCAP_RLE,
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0,
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};
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/*
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* Probes are numbered 0 to 7.
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*
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* See also: http://www.linkinstruments.com/images/mso19_1113.gif
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*/
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SR_PRIV const char *mso19_probe_names[NUM_PROBES + 1] = {
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"0", "1", "2", "3", "4", "5", "6", "7", NULL
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};
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/*supported samplerates */
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static const struct sr_samplerates samplerates = {
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SR_HZ(100),
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SR_HZ(200),
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SR_HZ(500),
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SR_KHZ(1),
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SR_KHZ(2),
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SR_KHZ(5),
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SR_KHZ(10),
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SR_KHZ(20),
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SR_KHZ(50),
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SR_KHZ(100),
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SR_KHZ(200),
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SR_KHZ(500),
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SR_MHZ(1),
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SR_MHZ(2),
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SR_MHZ(5),
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SR_MHZ(10),
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SR_MHZ(20),
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SR_MHZ(50),
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SR_MHZ(100),
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SR_MHZ(200),
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NULL,
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};
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SR_PRIV struct sr_dev_driver link_mso19_driver_info;
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static struct sr_dev_driver *di = &link_mso19_driver_info;
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static int hw_init(struct sr_context *sr_ctx)
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{
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printf("Init driver\n");
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struct drv_context *drvc;
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if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
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sr_err("Driver context malloc failed.");
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return SR_ERR_MALLOC;
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}
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drvc->sr_ctx = sr_ctx;
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di->priv = drvc;
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return SR_OK;
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}
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static GSList *hw_scan(GSList *options)
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{
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//struct sr_hwopt *opt;
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//struct sr_probe *probe;
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//GPollFD probefd;
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//int ret, i;
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//char buf[8];
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//struct udev *udev;
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int i;
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(void)options;
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GSList *devices = NULL;
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sr_info("Checking for link mso19\n");
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const char* conn = NULL;
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const char* serialcomm = NULL;
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GSList *l;
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for (l = options; l; l = l->next) {
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struct sr_hwopt* opt = l->data;
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switch (opt->hwopt) {
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case SR_HWOPT_CONN:
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conn = opt->value;
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break;
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case SR_HWOPT_SERIALCOMM:
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serialcomm = opt->value;
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break;
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}
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}
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if (!conn)
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conn = SERIALCONN;
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if (serialcomm == NULL)
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serialcomm = SERIALCOMM;
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struct udev *udev = udev_new();
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if (!udev) {
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sr_err("Failed to initialize udev.");
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}
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struct udev_enumerate *enumerate = udev_enumerate_new(udev);
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udev_enumerate_add_match_subsystem(enumerate, "usb-serial");
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udev_enumerate_scan_devices(enumerate);
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struct udev_list_entry *devs = udev_enumerate_get_list_entry(enumerate);
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struct udev_list_entry *dev_list_entry;
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for (dev_list_entry = devs;
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dev_list_entry != NULL;
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dev_list_entry = udev_list_entry_get_next(dev_list_entry))
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{
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const char *syspath = udev_list_entry_get_name(dev_list_entry);
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struct udev_device *dev = udev_device_new_from_syspath(udev, syspath);
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const char *sysname = udev_device_get_sysname(dev);
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struct udev_device *parent = udev_device_get_parent_with_subsystem_devtype(
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dev, "usb", "usb_device");
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if (!parent) {
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sr_err("Unable to find parent usb device for %s",
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sysname);
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continue;
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}
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const char *idVendor = udev_device_get_sysattr_value(parent, "idVendor");
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const char *idProduct = udev_device_get_sysattr_value(parent, "idProduct");
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if (strcmp(USB_VENDOR, idVendor)
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|| strcmp(USB_PRODUCT, idProduct))
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continue;
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const char* iSerial = udev_device_get_sysattr_value(parent, "serial");
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const char* iProduct = udev_device_get_sysattr_value(parent, "product");
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char path[32];
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snprintf(path, sizeof(path), "/dev/%s", sysname);
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size_t s = strcspn(iProduct, " ");
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char product[32];
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char manufacturer[32];
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if (s > sizeof(product) ||
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strlen(iProduct) - s > sizeof(manufacturer)) {
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sr_err("Could not parse iProduct: %s.", iProduct);
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continue;
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}
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strncpy(product, iProduct, s);
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product[s] = 0;
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strcpy(manufacturer, iProduct + s);
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//Create the device context and set its params
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struct dev_context *devc;
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if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
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sr_err("Device context malloc failed.");
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return devices;
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}
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if (mso_parse_serial(iSerial, iProduct, devc) != SR_OK) {
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sr_err("Invalid iSerial: %s.", iSerial);
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g_free(devc);
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return devices;
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}
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char hwrev[32];
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sprintf(hwrev, "r%d", devc->hwrev);
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devc->ctlbase1 = 0;
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devc->protocol_trigger.spimode = 0;
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for (i = 0; i < 4; i++) {
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devc->protocol_trigger.word[i] = 0;
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devc->protocol_trigger.mask[i] = 0xff;
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}
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if (!(devc->serial = sr_serial_dev_inst_new(conn, serialcomm)))
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{
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g_free(devc);
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return devices;
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}
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struct sr_dev_inst *sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
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manufacturer, product, hwrev);
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if (!sdi) {
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sr_err("Unable to create device instance for %s",
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sysname);
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sr_dev_inst_free(sdi);
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g_free(devc);
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return devices;
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}
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//sdi->index = 0;
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sdi->driver = di;
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sdi->priv = devc;
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//sdi->model = "
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//sdi->version = "Testing1234";
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//struct sr_probe *probe;
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//sdi->probes = g_slist_append(sdi->probes, probe);
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printf("Add the context\n");
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//Add the driver
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struct drv_context *drvc = di->priv;
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drvc->instances = g_slist_append(drvc->instances, sdi);
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devices = g_slist_append(devices, sdi);
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}
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printf("Return devices\n");
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return devices;
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}
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static GSList *hw_dev_list(void)
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{
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printf("Dev list\n");
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struct drv_context *drvc;
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drvc = di->priv;
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return drvc->instances;
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}
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static int hw_dev_open(struct sr_dev_inst *sdi)
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{
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printf("Dev opewn\n");
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struct dev_context *devc;
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devc = sdi->priv;
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if (serial_open(devc->serial, SERIAL_RDWR) != SR_OK)
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return SR_ERR;
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sdi->status = SR_ST_ACTIVE;
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/* FIXME: discard serial buffer */
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mso_check_trigger(devc->serial, &devc->trigger_state);
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sr_dbg("Trigger state: 0x%x.", devc->trigger_state);
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int ret = mso_reset_adc(sdi);
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if (ret != SR_OK)
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return ret;
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mso_check_trigger(devc->serial, &devc->trigger_state);
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sr_dbg("Trigger state: 0x%x.", devc->trigger_state);
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// ret = mso_reset_fsm(sdi);
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// if (ret != SR_OK)
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// return ret;
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// return SR_ERR;
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return SR_OK;
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}
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static int hw_dev_close(struct sr_dev_inst *sdi)
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{
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printf("dev close\n");
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struct dev_context *devc;
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devc = sdi->priv;
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if (devc->serial && devc->serial->fd != -1) {
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serial_close(devc->serial);
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sdi->status = SR_ST_INACTIVE;
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}
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return SR_OK;
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}
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static int hw_cleanup(void)
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{
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printf("*Dev clearup\n");
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GSList *l;
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struct sr_dev_inst *sdi;
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struct drv_context *drvc;
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struct dev_context *devc;
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int ret = SR_OK;
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if (!(drvc = di->priv))
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return SR_OK;
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/* Properly close and free all devices. */
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for (l = drvc->instances; l; l = l->next) {
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if (!(sdi = l->data)) {
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/* Log error, but continue cleaning up the rest. */
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sr_err("%s: sdi was NULL, continuing", __func__);
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ret = SR_ERR_BUG;
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continue;
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}
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if (!(devc = sdi->priv)) {
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/* Log error, but continue cleaning up the rest. */
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sr_err("%s: sdi->priv was NULL, continuing", __func__);
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ret = SR_ERR_BUG;
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continue;
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}
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hw_dev_close(sdi);
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sr_serial_dev_inst_free(devc->serial);
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sr_dev_inst_free(sdi);
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}
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g_slist_free(drvc->instances);
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drvc->instances = NULL;
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return ret;
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}
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static int hw_info_get(int info_id, const void **data,
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const struct sr_dev_inst *sdi)
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{
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struct dev_context *devc;
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printf("Get info\n");
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switch (info_id) {
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case SR_DI_HWCAPS:
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*data = hwcaps;
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break;
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case SR_DI_NUM_PROBES:
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*data = GINT_TO_POINTER(1);
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break;
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case SR_DI_PROBE_NAMES:
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*data = mso19_probe_names;
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break;
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case SR_DI_SAMPLERATES:
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*data = &samplerates;
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break;
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case SR_DI_TRIGGER_TYPES:
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*data = (char *)TRIGGER_TYPES;
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break;
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case SR_DI_CUR_SAMPLERATE:
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if (sdi) {
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devc = sdi->priv;
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*data = &devc->cur_rate;
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} else
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return SR_ERR;
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||||||
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break;
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default:
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return SR_ERR_ARG;
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}
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return SR_OK;
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|
}
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|
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static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
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const void *value)
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|
{
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struct dev_context *devc;
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int ret;
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||||||
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const uint64_t *tmp_u64;
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printf("Config set\n");
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devc = sdi->priv;
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||||||
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if (sdi->status != SR_ST_ACTIVE)
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return SR_ERR;
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switch (hwcap) {
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case SR_HWCAP_SAMPLERATE:
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return mso_configure_rate(sdi, *(const uint64_t *) value);
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ret = SR_OK;
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break;
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||||||
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case SR_HWCAP_LIMIT_SAMPLES:
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ret = SR_OK;
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break;
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||||||
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case SR_HWCAP_CAPTURE_RATIO:
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||||||
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ret = SR_OK;
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|
break;
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||||||
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case SR_HWCAP_RLE:
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ret = SR_OK;
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||||||
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break;
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||||||
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default:
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ret = SR_ERR;
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||||||
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}
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|
||||||
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return ret;
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||||||
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}
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||||||
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static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
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void *cb_data)
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||||||
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{
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||||||
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struct sr_datafeed_packet *packet;
|
||||||
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struct sr_datafeed_header *header;
|
||||||
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struct sr_datafeed_meta_logic meta;
|
||||||
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struct dev_context *devc;
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||||||
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uint32_t trigger_config[4];
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||||||
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uint32_t data;
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||||||
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uint16_t readcount, delaycount;
|
||||||
|
uint8_t changrp_mask;
|
||||||
|
int num_channels;
|
||||||
|
int i;
|
||||||
|
int ret = SR_ERR;
|
||||||
|
|
||||||
|
|
||||||
|
printf("Accquistion start\n");
|
||||||
|
devc = sdi->priv;
|
||||||
|
|
||||||
|
if (sdi->status != SR_ST_ACTIVE)
|
||||||
|
return SR_ERR;
|
||||||
|
|
||||||
|
//TODO if (ols_configure_probes(sdi) != SR_OK) {
|
||||||
|
//TODO sr_err("Failed to configure probes.");
|
||||||
|
//TODO return SR_ERR;
|
||||||
|
//TODO }
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable/disable channel groups in the flag register according to the
|
||||||
|
* probe mask. Calculate this here, because num_channels is needed
|
||||||
|
* to limit readcount.
|
||||||
|
*/
|
||||||
|
//changrp_mask = 0;
|
||||||
|
//num_channels = 0;
|
||||||
|
//for (i = 0; i < 4; i++) {
|
||||||
|
// if (devc->probe_mask & (0xff << (i * 8))) {
|
||||||
|
// changrp_mask |= (1 << i);
|
||||||
|
// num_channels++;
|
||||||
|
// }
|
||||||
|
//}
|
||||||
|
|
||||||
|
/* FIXME: No need to do full reconfigure every time */
|
||||||
|
// ret = mso_reset_fsm(sdi);
|
||||||
|
// if (ret != SR_OK)
|
||||||
|
// return ret;
|
||||||
|
|
||||||
|
/* FIXME: ACDC Mode */
|
||||||
|
devc->ctlbase1 &= 0x7f;
|
||||||
|
// devc->ctlbase1 |= devc->acdcmode;
|
||||||
|
|
||||||
|
ret = mso_configure_rate(sdi, devc->cur_rate);
|
||||||
|
if (ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
/* set dac offset */
|
||||||
|
ret = mso_dac_out(sdi, devc->dac_offset);
|
||||||
|
if (ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = mso_configure_threshold_level(sdi);
|
||||||
|
if (ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = mso_configure_trigger(sdi);
|
||||||
|
if (ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
/* FIXME: trigger_position */
|
||||||
|
|
||||||
|
|
||||||
|
/* END of config hardware part */
|
||||||
|
|
||||||
|
/* with trigger */
|
||||||
|
ret = mso_arm(sdi);
|
||||||
|
if (ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
/* without trigger */
|
||||||
|
// ret = mso_force_capture(sdi);
|
||||||
|
// if (ret != SR_OK)
|
||||||
|
// return ret;
|
||||||
|
|
||||||
|
/* Start acquisition on the device. */
|
||||||
|
mso_check_trigger(sdi, &devc->trigger_state);
|
||||||
|
ret = mso_check_trigger(sdi, NULL);
|
||||||
|
if (ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
sr_source_add(devc->serial->fd, G_IO_IN, -1, mso_receive_data, cb_data);
|
||||||
|
|
||||||
|
if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
|
||||||
|
sr_err("Datafeed packet malloc failed.");
|
||||||
|
return SR_ERR_MALLOC;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
|
||||||
|
sr_err("Datafeed header malloc failed.");
|
||||||
|
g_free(packet);
|
||||||
|
return SR_ERR_MALLOC;
|
||||||
|
}
|
||||||
|
|
||||||
|
packet->type = SR_DF_HEADER;
|
||||||
|
packet->payload = (unsigned char *)header;
|
||||||
|
header->feed_version = 1;
|
||||||
|
gettimeofday(&header->starttime, NULL);
|
||||||
|
sr_session_send(cb_data, packet);
|
||||||
|
|
||||||
|
packet->type = SR_DF_META_LOGIC;
|
||||||
|
packet->payload = &meta;
|
||||||
|
meta.samplerate = devc->cur_rate;
|
||||||
|
meta.num_probes = NUM_PROBES;
|
||||||
|
sr_session_send(cb_data, packet);
|
||||||
|
|
||||||
|
g_free(header);
|
||||||
|
g_free(packet);
|
||||||
|
|
||||||
|
return SR_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
|
||||||
|
static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
|
||||||
|
{
|
||||||
|
printf("Accuqstion stop\n");
|
||||||
|
/* Avoid compiler warnings. */
|
||||||
|
(void)cb_data;
|
||||||
|
|
||||||
|
stop_acquisition(sdi);
|
||||||
|
|
||||||
|
return SR_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV struct sr_dev_driver link_mso19_driver_info = {
|
||||||
|
.name = "link-mso19",
|
||||||
|
.longname = "Link Instruments MSO-19",
|
||||||
|
.api_version = 1,
|
||||||
|
.init = hw_init,
|
||||||
|
.cleanup = hw_cleanup,
|
||||||
|
.scan = hw_scan,
|
||||||
|
.dev_list = hw_dev_list,
|
||||||
|
.dev_clear = hw_cleanup,
|
||||||
|
.dev_open = hw_dev_open,
|
||||||
|
.dev_close = hw_dev_close,
|
||||||
|
.info_get = hw_info_get,
|
||||||
|
.dev_config_set = hw_dev_config_set,
|
||||||
|
.dev_acquisition_start = hw_dev_acquisition_start,
|
||||||
|
.dev_acquisition_stop = hw_dev_acquisition_stop,
|
||||||
|
.priv = NULL,
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,271 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the sigrok project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
|
||||||
|
*
|
||||||
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "protocol.h"
|
||||||
|
|
||||||
|
extern SR_PRIV struct sr_dev_driver link_mso19_driver_info;
|
||||||
|
static struct sr_dev_driver *di = &link_mso19_driver_info;
|
||||||
|
|
||||||
|
SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
|
||||||
|
struct dev_context *devc)
|
||||||
|
{
|
||||||
|
unsigned int u1, u2, u3, u4, u5, u6;
|
||||||
|
|
||||||
|
iProduct = iProduct;
|
||||||
|
/* FIXME: This code is in the original app, but I think its
|
||||||
|
* used only for the GUI */
|
||||||
|
/* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
|
||||||
|
devc->num_sample_rates = 0x16;
|
||||||
|
else
|
||||||
|
devc->num_sample_rates = 0x10; */
|
||||||
|
|
||||||
|
|
||||||
|
/* parse iSerial */
|
||||||
|
if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
|
||||||
|
&u1, &u2, &u3, &u4, &u5, &u6) != 6)
|
||||||
|
return SR_ERR;
|
||||||
|
devc->hwmodel = u4;
|
||||||
|
devc->hwrev = u5;
|
||||||
|
devc->serial = u6;
|
||||||
|
devc->vbit = u1 / 10000;
|
||||||
|
if (devc->vbit == 0)
|
||||||
|
devc->vbit = 4.19195;
|
||||||
|
devc->dac_offset = u2;
|
||||||
|
if (devc->dac_offset == 0)
|
||||||
|
devc->dac_offset = 0x1ff;
|
||||||
|
devc->offset_range = u3;
|
||||||
|
if (devc->offset_range == 0)
|
||||||
|
devc->offset_range = 0x17d;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FIXME: There is more code on the original software to handle
|
||||||
|
* bigger iSerial strings, but as I can't test on my device
|
||||||
|
* I will not implement it yet
|
||||||
|
*/
|
||||||
|
|
||||||
|
return SR_OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV int mso_send_control_message(struct sr_serial_dev_inst *serial,
|
||||||
|
uint16_t payload[], int n)
|
||||||
|
{
|
||||||
|
int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
|
||||||
|
char *p, *buf;
|
||||||
|
|
||||||
|
ret = SR_ERR;
|
||||||
|
|
||||||
|
if (serial->fd < 0)
|
||||||
|
goto ret;
|
||||||
|
|
||||||
|
if (!(buf = g_try_malloc(s))) {
|
||||||
|
sr_err("Failed to malloc message buffer.");
|
||||||
|
ret = SR_ERR_MALLOC;
|
||||||
|
goto ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
p = buf;
|
||||||
|
memcpy(p, mso_head, sizeof(mso_head));
|
||||||
|
p += sizeof(mso_head);
|
||||||
|
|
||||||
|
for (i = 0; i < n; i++) {
|
||||||
|
*(uint16_t *) p = htons(payload[i]);
|
||||||
|
p += 2;
|
||||||
|
}
|
||||||
|
memcpy(p, mso_foot, sizeof(mso_foot));
|
||||||
|
|
||||||
|
w = 0;
|
||||||
|
while (w < s) {
|
||||||
|
ret = serial_write(serial, buf + w, s - w);
|
||||||
|
if (ret < 0) {
|
||||||
|
ret = SR_ERR;
|
||||||
|
goto free;
|
||||||
|
}
|
||||||
|
w += ret;
|
||||||
|
}
|
||||||
|
ret = SR_OK;
|
||||||
|
free:
|
||||||
|
g_free(buf);
|
||||||
|
ret:
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi)
|
||||||
|
{
|
||||||
|
struct dev_context *devc = sdi->priv;
|
||||||
|
uint16_t ops[2];
|
||||||
|
|
||||||
|
ops[0] = mso_trans(REG_CTL1, (devc->ctlbase1 | BIT_CTL1_RESETADC));
|
||||||
|
ops[1] = mso_trans(REG_CTL1, devc->ctlbase1);
|
||||||
|
devc->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
|
||||||
|
|
||||||
|
sr_dbg("Requesting ADC reset.");
|
||||||
|
return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi)
|
||||||
|
{
|
||||||
|
struct sr_datafeed_packet packet;
|
||||||
|
struct dev_context *devc;
|
||||||
|
|
||||||
|
devc = sdi->priv;
|
||||||
|
sr_source_remove(devc->serial->fd);
|
||||||
|
|
||||||
|
/* Terminate session */
|
||||||
|
packet.type = SR_DF_END;
|
||||||
|
sr_session_send(sdi, &packet);
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val)
|
||||||
|
{
|
||||||
|
uint16_t ops[] = {
|
||||||
|
mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
|
||||||
|
mso_trans(REG_CLKRATE2, val & 0xff),
|
||||||
|
};
|
||||||
|
|
||||||
|
sr_dbg("Setting clkrate word to 0x%x.", val);
|
||||||
|
return mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
|
||||||
|
{
|
||||||
|
struct dev_context *devc = sdi->priv;
|
||||||
|
unsigned int i;
|
||||||
|
int ret = SR_ERR;
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
|
||||||
|
if (rate_map[i].rate == rate) {
|
||||||
|
devc->ctlbase2 = rate_map[i].slowmode;
|
||||||
|
ret = mso_clkrate_out(sdi, rate_map[i].val);
|
||||||
|
if (ret == SR_OK)
|
||||||
|
devc->cur_rate = rate;
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
|
||||||
|
{
|
||||||
|
uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
sr_dbg("Requesting trigger state.");
|
||||||
|
ret = mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
|
||||||
|
if (info == NULL || ret != SR_OK)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
|
||||||
|
uint8_t buf = 0;
|
||||||
|
if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
|
||||||
|
ret = SR_ERR;
|
||||||
|
*info = buf;
|
||||||
|
|
||||||
|
sr_dbg("Trigger state is: 0x%x.", *info);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
|
||||||
|
{
|
||||||
|
|
||||||
|
struct sr_datafeed_packet packet;
|
||||||
|
struct sr_datafeed_logic logic;
|
||||||
|
struct sr_dev_inst *sdi;
|
||||||
|
struct drv_context *drvc;
|
||||||
|
struct dev_context *devc;
|
||||||
|
GSList *l;
|
||||||
|
int num_channels, offset, i, j;
|
||||||
|
unsigned char byte;
|
||||||
|
|
||||||
|
drvc = di->priv;
|
||||||
|
|
||||||
|
/* Find this device's devc struct by its fd. */
|
||||||
|
devc = NULL;
|
||||||
|
for (l = drvc->instances; l; l = l->next) {
|
||||||
|
sdi = l->data;
|
||||||
|
devc = sdi->priv;
|
||||||
|
if (devc->serial->fd == fd)
|
||||||
|
break;
|
||||||
|
devc = NULL;
|
||||||
|
}
|
||||||
|
if (!devc)
|
||||||
|
/* Shouldn't happen. */
|
||||||
|
return TRUE;
|
||||||
|
|
||||||
|
(void)revents;
|
||||||
|
|
||||||
|
uint8_t in[1024];
|
||||||
|
size_t s = serial_read(devc->serial, in, sizeof(in));
|
||||||
|
if (s <= 0)
|
||||||
|
return FALSE;
|
||||||
|
|
||||||
|
/* No samples */
|
||||||
|
if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
|
||||||
|
devc->trigger_state = in[0];
|
||||||
|
if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
|
||||||
|
mso_read_buffer(sdi);
|
||||||
|
devc->buffer_n = 0;
|
||||||
|
} else {
|
||||||
|
mso_check_trigger(devc->serial, NULL);
|
||||||
|
}
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* the hardware always dumps 1024 samples, 24bits each */
|
||||||
|
if (devc->buffer_n < 3072) {
|
||||||
|
memcpy(devc->buffer + devc->buffer_n, in, s);
|
||||||
|
devc->buffer_n += s;
|
||||||
|
}
|
||||||
|
if (devc->buffer_n < 3072)
|
||||||
|
return FALSE;
|
||||||
|
|
||||||
|
/* do the conversion */
|
||||||
|
uint8_t logic_out[1024];
|
||||||
|
double analog_out[1024];
|
||||||
|
for (i = 0; i < 1024; i++) {
|
||||||
|
/* FIXME: Need to do conversion to mV */
|
||||||
|
analog_out[i] = (devc->buffer[i * 3] & 0x3f) |
|
||||||
|
((devc->buffer[i * 3 + 1] & 0xf) << 6);
|
||||||
|
logic_out[i] = ((devc->buffer[i * 3 + 1] & 0x30) >> 4) |
|
||||||
|
((devc->buffer[i * 3 + 2] & 0x3f) << 2);
|
||||||
|
}
|
||||||
|
|
||||||
|
packet.type = SR_DF_LOGIC;
|
||||||
|
packet.payload = &logic;
|
||||||
|
logic.length = 1024;
|
||||||
|
logic.unitsize = 1;
|
||||||
|
logic.data = logic_out;
|
||||||
|
sr_session_send(cb_data, &packet);
|
||||||
|
|
||||||
|
// Dont bother fixing this yet, keep it "old style"
|
||||||
|
/*
|
||||||
|
packet.type = SR_DF_ANALOG;
|
||||||
|
packet.length = 1024;
|
||||||
|
packet.unitsize = sizeof(double);
|
||||||
|
packet.payload = analog_out;
|
||||||
|
sr_session_send(ctx->session_dev_id, &packet);
|
||||||
|
*/
|
||||||
|
|
||||||
|
packet.type = SR_DF_END;
|
||||||
|
sr_session_send(devc->session_dev_id, &packet);
|
||||||
|
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,235 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the sigrok project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
|
||||||
|
*
|
||||||
|
* This program is free software: you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation, either version 3 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
|
||||||
|
#define LIBSIGROK_HARDWARE_LINK_MSO19_PROTOCOL_H
|
||||||
|
|
||||||
|
#define USB_VENDOR "3195"
|
||||||
|
#define USB_PRODUCT "f190"
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <string.h>
|
||||||
|
#include <glib.h>
|
||||||
|
#include "libsigrok.h"
|
||||||
|
#include "libsigrok-internal.h"
|
||||||
|
|
||||||
|
/* Message logging helpers with driver-specific prefix string. */
|
||||||
|
#define DRIVER_LOG_DOMAIN "mso19: "
|
||||||
|
#define sr_log(l, s, args...) sr_log(l, DRIVER_LOG_DOMAIN s, ## args)
|
||||||
|
#define sr_spew(s, args...) sr_spew(DRIVER_LOG_DOMAIN s, ## args)
|
||||||
|
#define sr_dbg(s, args...) sr_dbg(DRIVER_LOG_DOMAIN s, ## args)
|
||||||
|
#define sr_info(s, args...) sr_info(DRIVER_LOG_DOMAIN s, ## args)
|
||||||
|
#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
|
||||||
|
#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
|
||||||
|
|
||||||
|
#define NUM_PROBES 8
|
||||||
|
#define NUM_TRIGGER_STAGES 4
|
||||||
|
#define TRIGGER_TYPES "01"
|
||||||
|
#define SERIAL_SPEED B115200
|
||||||
|
#define CLOCK_RATE SR_MHZ(100)
|
||||||
|
#define MIN_NUM_SAMPLES 4
|
||||||
|
|
||||||
|
|
||||||
|
///* Bitmasks for CMD_FLAGS */
|
||||||
|
//#define FLAG_DEMUX 0x01
|
||||||
|
//#define FLAG_FILTER 0x02
|
||||||
|
//#define FLAG_CHANNELGROUP_1 0x04
|
||||||
|
//#define FLAG_CHANNELGROUP_2 0x08
|
||||||
|
//#define FLAG_CHANNELGROUP_3 0x10
|
||||||
|
//#define FLAG_CHANNELGROUP_4 0x20
|
||||||
|
//#define FLAG_CLOCK_EXTERNAL 0x40
|
||||||
|
//#define FLAG_CLOCK_INVERTED 0x80
|
||||||
|
//#define FLAG_RLE 0x0100
|
||||||
|
|
||||||
|
#define MSO_TRIGGER_UNKNOWN '!'
|
||||||
|
#define MSO_TRIGGER_UNKNOWN1 '1'
|
||||||
|
#define MSO_TRIGGER_UNKNOWN2 '2'
|
||||||
|
#define MSO_TRIGGER_UNKNOWN3 '3'
|
||||||
|
#define MSO_TRIGGER_WAIT '4'
|
||||||
|
#define MSO_TRIGGER_FIRED '5'
|
||||||
|
#define MSO_TRIGGER_DATAREADY '6'
|
||||||
|
|
||||||
|
/* Structure for the pattern generator state */
|
||||||
|
struct mso_patgen {
|
||||||
|
/* Pattern generator clock config */
|
||||||
|
uint16_t clock;
|
||||||
|
/* Buffer start address */
|
||||||
|
uint16_t start;
|
||||||
|
/* Buffer end address */
|
||||||
|
uint16_t end;
|
||||||
|
/* Pattern generator config */
|
||||||
|
uint8_t config;
|
||||||
|
/* Samples buffer */
|
||||||
|
uint8_t buffer[1024];
|
||||||
|
/* Input/output configuration for the samples buffer (?)*/
|
||||||
|
uint8_t io[1024];
|
||||||
|
/* Number of loops for the pattern generator */
|
||||||
|
uint8_t loops;
|
||||||
|
/* Bit enable mask for the I/O lines */
|
||||||
|
uint8_t mask;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Data structure for the protocol trigger state */
|
||||||
|
struct mso_prototrig {
|
||||||
|
/* Word match buffer */
|
||||||
|
uint8_t word[4];
|
||||||
|
/* Masks for the wordmatch buffer */
|
||||||
|
uint8_t mask[4];
|
||||||
|
/* SPI mode 0, 1, 2, 3. Set to 0 for I2C */
|
||||||
|
uint8_t spimode;
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Private, per-device-instance driver context. */
|
||||||
|
struct dev_context {
|
||||||
|
/* info */
|
||||||
|
uint8_t hwmodel;
|
||||||
|
uint8_t hwrev;
|
||||||
|
struct sr_serial_dev_inst *serial;
|
||||||
|
// uint8_t num_sample_rates;
|
||||||
|
/* calibration */
|
||||||
|
double vbit;
|
||||||
|
uint16_t dac_offset;
|
||||||
|
uint16_t offset_range;
|
||||||
|
/* register cache */
|
||||||
|
uint8_t ctlbase1;
|
||||||
|
uint8_t ctlbase2;
|
||||||
|
/* state */
|
||||||
|
uint8_t la_threshold;
|
||||||
|
uint64_t cur_rate;
|
||||||
|
uint8_t dso_probe_attn;
|
||||||
|
uint8_t trigger_chan;
|
||||||
|
uint8_t trigger_slope;
|
||||||
|
uint8_t trigger_outsrc;
|
||||||
|
uint8_t trigger_state;
|
||||||
|
uint8_t la_trigger;
|
||||||
|
uint8_t la_trigger_mask;
|
||||||
|
double dso_trigger_voltage;
|
||||||
|
uint16_t dso_trigger_width;
|
||||||
|
struct mso_prototrig protocol_trigger;
|
||||||
|
void *session_dev_id;
|
||||||
|
uint16_t buffer_n;
|
||||||
|
char buffer[4096];
|
||||||
|
};
|
||||||
|
|
||||||
|
SR_PRIV int mso_parse_serial(const char *iSerial, const char *iProduct,
|
||||||
|
struct dev_context *ctx);
|
||||||
|
SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info);
|
||||||
|
SR_PRIV int mso_reset_adc(struct sr_dev_inst *sdi);
|
||||||
|
SR_PRIV int mso_clkrate_out(struct sr_serial_dev_inst *serial, uint16_t val);
|
||||||
|
SR_PRIV int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate);
|
||||||
|
SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data);
|
||||||
|
SR_PRIV void stop_acquisition(const struct sr_dev_inst *sdi);
|
||||||
|
|
||||||
|
///////////////////////
|
||||||
|
//
|
||||||
|
|
||||||
|
/* serial protocol */
|
||||||
|
#define mso_trans(a, v) \
|
||||||
|
(((v) & 0x3f) | (((v) & 0xc0) << 6) | (((a) & 0xf) << 8) | \
|
||||||
|
((~(v) & 0x20) << 1) | ((~(v) & 0x80) << 7))
|
||||||
|
|
||||||
|
SR_PRIV static const char mso_head[] = { 0x40, 0x4c, 0x44, 0x53, 0x7e };
|
||||||
|
SR_PRIV static const char mso_foot[] = { 0x7e };
|
||||||
|
|
||||||
|
/* bank agnostic registers */
|
||||||
|
#define REG_CTL2 15
|
||||||
|
|
||||||
|
/* bank 0 registers */
|
||||||
|
#define REG_BUFFER 1
|
||||||
|
#define REG_TRIGGER 2
|
||||||
|
#define REG_CLKRATE1 9
|
||||||
|
#define REG_CLKRATE2 10
|
||||||
|
#define REG_DAC1 12
|
||||||
|
#define REG_DAC2 13
|
||||||
|
/* possibly bank agnostic: */
|
||||||
|
#define REG_CTL1 14
|
||||||
|
|
||||||
|
/* bank 2 registers (SPI/I2C protocol trigger) */
|
||||||
|
#define REG_PT_WORD(x) (x)
|
||||||
|
#define REG_PT_MASK(x) (x+4)
|
||||||
|
#define REG_PT_SPIMODE 8
|
||||||
|
|
||||||
|
/* bits - REG_CTL1 */
|
||||||
|
#define BIT_CTL1_RESETFSM (1 << 0)
|
||||||
|
#define BIT_CTL1_ARM (1 << 1)
|
||||||
|
#define BIT_CTL1_ADC_UNKNOWN4 (1 << 4) /* adc enable? */
|
||||||
|
#define BIT_CTL1_RESETADC (1 << 6)
|
||||||
|
#define BIT_CTL1_LED (1 << 7)
|
||||||
|
|
||||||
|
/* bits - REG_CTL2 */
|
||||||
|
#define BITS_CTL2_BANK(x) (x & 0x3)
|
||||||
|
#define BIT_CTL2_SLOWMODE (1 << 5)
|
||||||
|
|
||||||
|
struct rate_map {
|
||||||
|
uint32_t rate;
|
||||||
|
uint16_t val;
|
||||||
|
uint8_t slowmode;
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct rate_map rate_map[] = {
|
||||||
|
{ SR_MHZ(200), 0x0205, 0 },
|
||||||
|
{ SR_MHZ(100), 0x0105, 0 },
|
||||||
|
{ SR_MHZ(50), 0x0005, 0 },
|
||||||
|
{ SR_MHZ(20), 0x0303, 0 },
|
||||||
|
{ SR_MHZ(10), 0x0308, 0 },
|
||||||
|
{ SR_MHZ(5), 0x030c, 0 },
|
||||||
|
{ SR_MHZ(2), 0x0330, 0 },
|
||||||
|
{ SR_MHZ(1), 0x0362, 0 },
|
||||||
|
{ SR_KHZ(500), 0x03c6, 0 },
|
||||||
|
{ SR_KHZ(200), 0x07f2, 0 },
|
||||||
|
{ SR_KHZ(100), 0x0fe6, 0 },
|
||||||
|
{ SR_KHZ(50), 0x1fce, 0 },
|
||||||
|
{ SR_KHZ(20), 0x4f86, 0 },
|
||||||
|
{ SR_KHZ(10), 0x9f0e, 0 },
|
||||||
|
{ SR_KHZ(5), 0x03c7, 0x20 },
|
||||||
|
{ SR_KHZ(2), 0x07f3, 0x20 },
|
||||||
|
{ SR_KHZ(1), 0x0fe7, 0x20 },
|
||||||
|
{ 500, 0x1fcf, 0x20 },
|
||||||
|
{ 200, 0x4f87, 0x20 },
|
||||||
|
{ 100, 0x9f0f, 0x20 },
|
||||||
|
};
|
||||||
|
|
||||||
|
/* FIXME: Determine corresponding voltages */
|
||||||
|
static uint16_t la_threshold_map[] = {
|
||||||
|
0x8600,
|
||||||
|
0x8770,
|
||||||
|
0x88ff,
|
||||||
|
0x8c70,
|
||||||
|
0x8eff,
|
||||||
|
0x8fff,
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
//SR_PRIV extern const char *ols_probe_names[NUM_PROBES + 1];
|
||||||
|
//
|
||||||
|
//SR_PRIV int send_shortcommand(struct sr_serial_dev_inst *serial,
|
||||||
|
// uint8_t command);
|
||||||
|
//SR_PRIV int send_longcommand(struct sr_serial_dev_inst *serial,
|
||||||
|
// uint8_t command, uint32_t data);
|
||||||
|
//SR_PRIV int ols_configure_probes(const struct sr_dev_inst *sdi);
|
||||||
|
//SR_PRIV uint32_t reverse16(uint32_t in);
|
||||||
|
//SR_PRIV uint32_t reverse32(uint32_t in);
|
||||||
|
//SR_PRIV struct dev_context *ols_dev_new(void);
|
||||||
|
//SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial);
|
||||||
|
//SR_PRIV int ols_set_samplerate(const struct sr_dev_inst *sdi,
|
||||||
|
// uint64_t samplerate,
|
||||||
|
// const struct sr_samplerates *samplerates);
|
||||||
|
//SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data);
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue