Sigma: Value/mask trigger support in 50 MHz mode.
This commit is contained in:
Håvard Espeland
parent
eec5275e2f
commit
ee492173a1
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@ -35,7 +35,7 @@
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#define USB_VENDOR_NAME "ASIX"
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#define USB_MODEL_NAME "SIGMA"
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#define USB_MODEL_VERSION ""
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#define TRIGGER_TYPES "rf"
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#define TRIGGER_TYPES "rf10"
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static GSList *device_instances = NULL;
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@ -49,10 +49,14 @@ static int num_probes = 0;
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static int samples_per_event = 0;
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static int capture_ratio = 50;
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/* Single-pin trigger support. */
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/* Single-pin trigger support (100 and 200 MHz).*/
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static uint8_t triggerpin = 1;
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static uint8_t triggerfall = 0;
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/* Simple trigger support (<= 50 MHz). */
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static uint16_t triggermask = 1;
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static uint16_t triggervalue = 1;
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static uint64_t supported_samplerates[] = {
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KHZ(200),
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KHZ(250),
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@ -245,6 +249,64 @@ static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data)
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return sigma_read(data, numchunks * CHUNK_SIZE);
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}
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/* Upload trigger look-up tables to Sigma */
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static int sigma_write_trigger_lut(struct triggerlut *lut)
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{
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int i;
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uint8_t tmp[2];
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uint16_t bit;
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/* Transpose the table and send to Sigma. */
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for (i = 0; i < 16; ++i) {
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bit = 1 << i;
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tmp[0] = tmp[1] = 0;
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if (lut->m2d[0] & bit)
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tmp[0] |= 0x01;
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if (lut->m2d[1] & bit)
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tmp[0] |= 0x02;
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if (lut->m2d[2] & bit)
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tmp[0] |= 0x04;
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if (lut->m2d[3] & bit)
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tmp[0] |= 0x08;
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if (lut->m3 & bit)
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tmp[0] |= 0x10;
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if (lut->m3s & bit)
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tmp[0] |= 0x20;
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if (lut->m4 & bit)
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tmp[0] |= 0x40;
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if (lut->m0d[0] & bit)
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tmp[1] |= 0x01;
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if (lut->m0d[1] & bit)
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tmp[1] |= 0x02;
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if (lut->m0d[2] & bit)
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tmp[1] |= 0x04;
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if (lut->m0d[3] & bit)
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tmp[1] |= 0x08;
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if (lut->m1d[0] & bit)
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tmp[1] |= 0x10;
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if (lut->m1d[1] & bit)
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tmp[1] |= 0x20;
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if (lut->m1d[2] & bit)
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tmp[1] |= 0x40;
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if (lut->m1d[3] & bit)
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tmp[1] |= 0x80;
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sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp));
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sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i);
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}
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/* Send the parameters */
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sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
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sizeof(lut->params));
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return SIGROK_OK;
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}
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/* Generate the bitbang stream for programming the FPGA. */
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static int bin2bitbang(const char *filename,
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unsigned char **buf, size_t *buf_size)
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@ -515,11 +577,8 @@ static int configure_probes(GSList *probes)
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GSList *l;
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int trigger_set = 0;
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if (cur_samplerate <= MHZ(50)) {
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g_warning("Trigger support only implemented "
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"in 100 and 200 MHz mode.");
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return SIGROK_ERR;
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}
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triggermask = 0;
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triggervalue = 0;
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for (l = probes; l; l = l->next) {
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probe = (struct probe *)l->data;
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@ -527,20 +586,43 @@ static int configure_probes(GSList *probes)
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if (!probe->enabled || !probe->trigger)
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continue;
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if (trigger_set) {
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g_warning("Asix Sigma only supports a single pin trigger "
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"in 100 and 200 MHz mode.");
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return SIGROK_ERR;
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if (cur_samplerate >= MHZ(100)) {
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/* Fast trigger support */
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if (trigger_set) {
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g_warning("Asix Sigma only supports a single pin trigger "
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"in 100 and 200 MHz mode.");
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return SIGROK_ERR;
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}
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if (probe->trigger[0] == 'f')
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triggerfall = 1;
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else if (probe->trigger[0] == 'r')
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triggerfall = 0;
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else {
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g_warning("Asix Sigma only supports "
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"rising/falling trigger in 100 "
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"and 200 MHz mode.");
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return SIGROK_ERR;
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}
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triggerpin = probe->index - 1;
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} else {
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/* Normal trigger support */
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triggermask |= 1 << (probe->index - 1);
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if (probe->trigger[0] == '1')
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triggervalue |= 1 << (probe->index - 1);
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else if (probe->trigger[0] == '0')
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triggervalue |= 0 << (probe->index - 1);
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else {
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g_warning("Asix Sigma only supports "
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"trigger values in <= 50"
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" MHz mode.");
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return SIGROK_ERR;
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}
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}
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/* Found trigger. */
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if (probe->trigger[0] == 'f')
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triggerfall = 1;
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else
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triggerfall = 0;
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triggerpin = probe->index - 1;
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trigger_set = 1;
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++trigger_set;
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}
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return SIGROK_OK;
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@ -652,10 +734,20 @@ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
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uint16_t *event;
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uint16_t cur_sample;
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int triggerts = -1;
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int triggeroff = 0;
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/* Find in which cluster the trigger occured. */
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if (triggerpos != -1)
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triggerts = (triggerpos / 7);
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if (triggerpos != -1) {
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if (cur_samplerate <= MHZ(50))
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triggerpos -= EVENTS_PER_CLUSTER;
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else
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triggeroff = 3;
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if (triggerpos < 0)
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triggerpos = 0;
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/* Find in which cluster the trigger occured. */
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triggerts = triggerpos / 7;
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}
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/* For each ts. */
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for (i = 0; i < 64; ++i) {
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@ -706,8 +798,6 @@ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
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}
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}
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*lastsample = samples[n - 1];
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/* Send data up to trigger point (if triggered). */
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sent = 0;
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if (i == triggerts) {
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@ -717,7 +807,7 @@ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
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* in a single event, the trigger does not match the
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* exact sample.
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*/
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tosend = (triggerpos % 7) - 3;
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tosend = (triggerpos % 7) - triggeroff;
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if (tosend > 0) {
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packet.type = DF_LOGIC16;
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@ -741,6 +831,8 @@ static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
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packet.length = tosend * sizeof(uint16_t);
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packet.payload = samples + sent;
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session_bus(user_data, &packet);
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*lastsample = samples[n - 1];
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}
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return SIGROK_OK;
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@ -825,6 +917,46 @@ static int receive_data(int fd, int revents, void *user_data)
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return TRUE;
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}
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/*
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* Build trigger LUTs used by 50 MHz and lower sample rates for supporting
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* simple pin change and state triggers. Only two transitions (rise/fall) can be
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* set at any time, but a full mask and value can be set (0/1).
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*/
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static int build_basic_trigger(struct triggerlut *lut)
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{
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int i, j, k, bit;
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memset(lut, 0, sizeof(struct triggerlut));
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/* Unknown */
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lut->m4 = 0xa000;
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/* Set the LUT for controlling value/maske trigger */
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for (i = 0; i < 4; ++i) {
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lut->m2d[i] = 0xffff;
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for (j = 0; j < 16; ++j)
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for (k = 0; k < 4; ++k) {
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bit = 1 << (i * 4 + k);
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if ((triggermask & bit) &&
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(triggervalue & bit) != (j & (1 << k))) {
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lut->m2d[i] &= ~(1 << j);
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}
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}
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}
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/* Unused when not triggering on transitions */
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lut->m3 = 0xffff;
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/* Triggertype: event */
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lut->params.selres = 3;
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return SIGROK_OK;
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}
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static int hw_start_acquisition(int device_index, gpointer session_device_id)
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{
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struct sigrok_device_instance *sdi;
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@ -834,6 +966,7 @@ static int hw_start_acquisition(int device_index, gpointer session_device_id)
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int frac;
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uint8_t triggerselect;
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struct triggerinout triggerinout_conf;
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struct triggerlut lut;
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session_device_id = session_device_id;
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@ -858,7 +991,9 @@ static int hw_start_acquisition(int device_index, gpointer session_device_id)
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/* All other modes. */
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} else if (cur_samplerate <= MHZ(50)) {
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sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
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build_basic_trigger(&lut);
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sigma_write_trigger_lut(&lut);
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triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
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}
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@ -102,4 +102,24 @@ struct triggerinout {
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uint8_t trgin_enable : 1;
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};
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struct triggerlut {
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/* The actual LUTs. */
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uint16_t m0d[4], m1d[4], m2d[4];
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uint16_t m3, m3s, m4;
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/* Paramters should be sent as a single register write. */
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struct {
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uint8_t selc : 2;
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uint8_t selpresc : 6;
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uint8_t selinc : 2;
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uint8_t selres : 2;
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uint8_t sela : 2;
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uint8_t selb : 2;
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uint16_t cmpb;
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uint16_t cmpa;
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} params;
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};
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#endif
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